1
2use crate::metadata::ir::*;
3pub(crate) static REGISTERS: IR = IR {
4 blocks: &[
5 Block {
6 name: "Otfdec",
7 extends: None,
8 description: Some(
9 "On-The-Fly Decryption engine.",
10 ),
11 items: &[
12 BlockItem {
13 name: "cr",
14 description: Some(
15 "OTFDEC control register.",
16 ),
17 array: None,
18 byte_offset: 0x0,
19 inner: BlockItemInner::Register(
20 Register {
21 access: Access::ReadWrite,
22 bit_size: 32,
23 fieldset: Some(
24 "Cr",
25 ),
26 },
27 ),
28 },
29 BlockItem {
30 name: "privcfgr",
31 description: Some(
32 "OTFDEC_PRIVCFGR.",
33 ),
34 array: None,
35 byte_offset: 0x10,
36 inner: BlockItemInner::Register(
37 Register {
38 access: Access::ReadWrite,
39 bit_size: 32,
40 fieldset: Some(
41 "Privcfgr",
42 ),
43 },
44 ),
45 },
46 BlockItem {
47 name: "region",
48 description: None,
49 array: Some(
50 Array::Regular(
51 RegularArray {
52 len: 4,
53 stride: 48,
54 },
55 ),
56 ),
57 byte_offset: 0x20,
58 inner: BlockItemInner::Block(
59 BlockItemBlock {
60 block: "Region",
61 },
62 ),
63 },
64 BlockItem {
65 name: "isr",
66 description: Some(
67 "OTFDEC interrupt status register.",
68 ),
69 array: None,
70 byte_offset: 0x300,
71 inner: BlockItemInner::Register(
72 Register {
73 access: Access::ReadWrite,
74 bit_size: 32,
75 fieldset: Some(
76 "Isr",
77 ),
78 },
79 ),
80 },
81 BlockItem {
82 name: "icr",
83 description: Some(
84 "OTFDEC interrupt clear register.",
85 ),
86 array: None,
87 byte_offset: 0x304,
88 inner: BlockItemInner::Register(
89 Register {
90 access: Access::ReadWrite,
91 bit_size: 32,
92 fieldset: Some(
93 "Icr",
94 ),
95 },
96 ),
97 },
98 BlockItem {
99 name: "ier",
100 description: Some(
101 "OTFDEC interrupt enable register.",
102 ),
103 array: None,
104 byte_offset: 0x308,
105 inner: BlockItemInner::Register(
106 Register {
107 access: Access::ReadWrite,
108 bit_size: 32,
109 fieldset: Some(
110 "Ier",
111 ),
112 },
113 ),
114 },
115 ],
116 },
117 Block {
118 name: "Region",
119 extends: None,
120 description: None,
121 items: &[
122 BlockItem {
123 name: "cfgr",
124 description: Some(
125 "OTFDEC region 3 configuration register.",
126 ),
127 array: None,
128 byte_offset: 0x0,
129 inner: BlockItemInner::Register(
130 Register {
131 access: Access::ReadWrite,
132 bit_size: 32,
133 fieldset: Some(
134 "RegionCfgr",
135 ),
136 },
137 ),
138 },
139 BlockItem {
140 name: "startaddr",
141 description: Some(
142 "OTFDEC region 3 start address register.",
143 ),
144 array: None,
145 byte_offset: 0x4,
146 inner: BlockItemInner::Register(
147 Register {
148 access: Access::ReadWrite,
149 bit_size: 32,
150 fieldset: None,
151 },
152 ),
153 },
154 BlockItem {
155 name: "endaddr",
156 description: Some(
157 "OTFDEC region 3 end address register.",
158 ),
159 array: None,
160 byte_offset: 0x8,
161 inner: BlockItemInner::Register(
162 Register {
163 access: Access::ReadWrite,
164 bit_size: 32,
165 fieldset: None,
166 },
167 ),
168 },
169 BlockItem {
170 name: "noncer",
171 description: Some(
172 "OTFDEC region 3 nonce register 0.",
173 ),
174 array: Some(
175 Array::Regular(
176 RegularArray {
177 len: 2,
178 stride: 4,
179 },
180 ),
181 ),
182 byte_offset: 0xc,
183 inner: BlockItemInner::Register(
184 Register {
185 access: Access::ReadWrite,
186 bit_size: 32,
187 fieldset: None,
188 },
189 ),
190 },
191 BlockItem {
192 name: "keyr",
193 description: Some(
194 "OTFDEC region 3 key register 0.",
195 ),
196 array: Some(
197 Array::Regular(
198 RegularArray {
199 len: 4,
200 stride: 4,
201 },
202 ),
203 ),
204 byte_offset: 0x14,
205 inner: BlockItemInner::Register(
206 Register {
207 access: Access::ReadWrite,
208 bit_size: 32,
209 fieldset: None,
210 },
211 ),
212 },
213 ],
214 },
215 ],
216 fieldsets: &[
217 FieldSet {
218 name: "Cr",
219 extends: None,
220 description: Some(
221 "OTFDEC control register.",
222 ),
223 bit_size: 32,
224 fields: &[
225 Field {
226 name: "enc",
227 description: Some(
228 "Encryption mode bit When this bit is set, OTFDEC is used in encryption mode, during which application can write clear text data then read back encrypted data. When this bit is cleared (default), OTFDEC is used in decryption mode, during which application only read back decrypted data. For both modes, cryptographic context (keys, nonces, firmware versions) must be properly initialized. When this bit is set, only data accesses are allowed (zeros are returned otherwise, and XONEIF is set). When MODE = 11, enhanced encryption mode is automatically selected. Note: When ENC bit is set, no access to OCTOSPI must be done (registers and Memory‑mapped region).",
229 ),
230 bit_offset: BitOffset::Regular(
231 RegularBitOffset {
232 offset: 0,
233 },
234 ),
235 bit_size: 1,
236 array: None,
237 enumm: Some(
238 "Enc",
239 ),
240 },
241 ],
242 },
243 FieldSet {
244 name: "Icr",
245 extends: None,
246 description: Some(
247 "OTFDEC interrupt clear register.",
248 ),
249 bit_size: 32,
250 fields: &[
251 Field {
252 name: "seif",
253 description: Some(
254 "Security error interrupt flag clear This bit is written by application, and always read as 0.",
255 ),
256 bit_offset: BitOffset::Regular(
257 RegularBitOffset {
258 offset: 0,
259 },
260 ),
261 bit_size: 1,
262 array: None,
263 enumm: None,
264 },
265 Field {
266 name: "xoneif",
267 description: Some(
268 "Execute-only execute-never error interrupt flag clear This bit is written by application, and always read as 0.",
269 ),
270 bit_offset: BitOffset::Regular(
271 RegularBitOffset {
272 offset: 1,
273 },
274 ),
275 bit_size: 1,
276 array: None,
277 enumm: None,
278 },
279 Field {
280 name: "keif",
281 description: Some(
282 "Key error interrupt flag clear This bit is written by application, and always read as 0. Note: Clearing KEIF does not solve the source of the problem (bad key registers). To be able to access again any encrypted region, OTFDEC key registers must be properly initialized again.",
283 ),
284 bit_offset: BitOffset::Regular(
285 RegularBitOffset {
286 offset: 2,
287 },
288 ),
289 bit_size: 1,
290 array: None,
291 enumm: None,
292 },
293 ],
294 },
295 FieldSet {
296 name: "Ier",
297 extends: None,
298 description: Some(
299 "OTFDEC interrupt enable register.",
300 ),
301 bit_size: 32,
302 fields: &[
303 Field {
304 name: "seie",
305 description: Some(
306 "Security error interrupt enable This bit is read and written by application. It controls the OTFDEC interrupt generation when SEIF flag status is set.",
307 ),
308 bit_offset: BitOffset::Regular(
309 RegularBitOffset {
310 offset: 0,
311 },
312 ),
313 bit_size: 1,
314 array: None,
315 enumm: None,
316 },
317 Field {
318 name: "xoneie",
319 description: Some(
320 "Execute-only execute-never error interrupt enable This bit is read and written by application. It controls the OTFDEC interrupt generation when XONEIF flag status is set.",
321 ),
322 bit_offset: BitOffset::Regular(
323 RegularBitOffset {
324 offset: 1,
325 },
326 ),
327 bit_size: 1,
328 array: None,
329 enumm: None,
330 },
331 Field {
332 name: "keie",
333 description: Some(
334 "Key error interrupt enable This bit is read and written by application. It controls the OTFDEC interrupt generation when KEIF flag status is set.",
335 ),
336 bit_offset: BitOffset::Regular(
337 RegularBitOffset {
338 offset: 2,
339 },
340 ),
341 bit_size: 1,
342 array: None,
343 enumm: None,
344 },
345 ],
346 },
347 FieldSet {
348 name: "Isr",
349 extends: None,
350 description: Some(
351 "OTFDEC interrupt status register.",
352 ),
353 bit_size: 32,
354 fields: &[
355 Field {
356 name: "seif",
357 description: Some(
358 "Security error interrupt flag status This bit is set by hardware and read only by application. This bit is set when at least one security error has been detected. This bit is cleared when application sets in OTFDEC_ICR the corresponding bit to 1.",
359 ),
360 bit_offset: BitOffset::Regular(
361 RegularBitOffset {
362 offset: 0,
363 },
364 ),
365 bit_size: 1,
366 array: None,
367 enumm: None,
368 },
369 Field {
370 name: "xoneif",
371 description: Some(
372 "Execute-only execute-never error interrupt flag status This bit is set by hardware and read only by application. This bit is set when a read access and not an instruction fetch is detected on any encrypted region with MODE bits set to 11. Lastly, XONEIF is also set when an execute access is detected while encryption mode is enabled. This bit is cleared when application sets in OTFDEC_ICR the corresponding bit to 1.",
373 ),
374 bit_offset: BitOffset::Regular(
375 RegularBitOffset {
376 offset: 1,
377 },
378 ),
379 bit_size: 1,
380 array: None,
381 enumm: None,
382 },
383 Field {
384 name: "keif",
385 description: Some(
386 "Key error interrupt flag status This bit is set by hardware and read only by application. The bit is set when a read access occurs on an encrypted region, while its key registers is null or not properly initialized (KEYCRC = 0x0). This bit is cleared when the application sets in OTFDEC_ICR the corresponding bit to 1. After KEIF is set any subsequent read to the region with bad key registers returns a zeroed value. This state remains until those key registers are properly initialized (KEYCRC not zero).",
387 ),
388 bit_offset: BitOffset::Regular(
389 RegularBitOffset {
390 offset: 2,
391 },
392 ),
393 bit_size: 1,
394 array: None,
395 enumm: None,
396 },
397 ],
398 },
399 FieldSet {
400 name: "Privcfgr",
401 extends: None,
402 description: Some(
403 "OTFDEC_PRIVCFGR.",
404 ),
405 bit_size: 32,
406 fields: &[
407 Field {
408 name: "priv_",
409 description: Some(
410 "Privileged access protection. Unprivileged read accesses to registers return zeros Unprivileged write accesses to registers are ignored. Note: This bit can only be written in privileged mode. There is no limitations on reads.",
411 ),
412 bit_offset: BitOffset::Regular(
413 RegularBitOffset {
414 offset: 0,
415 },
416 ),
417 bit_size: 1,
418 array: None,
419 enumm: None,
420 },
421 ],
422 },
423 FieldSet {
424 name: "RegionCfgr",
425 extends: None,
426 description: Some(
427 "OTFDEC region 3 configuration register.",
428 ),
429 bit_size: 32,
430 fields: &[
431 Field {
432 name: "reg_en",
433 description: Some(
434 "region on-the-fly decryption enable Note: Garbage is decrypted if region context (version, key, nonce) is not valid when this bit is set.",
435 ),
436 bit_offset: BitOffset::Regular(
437 RegularBitOffset {
438 offset: 0,
439 },
440 ),
441 bit_size: 1,
442 array: None,
443 enumm: None,
444 },
445 Field {
446 name: "configlock",
447 description: Some(
448 "region config lock Note: This bit is set once. If this bit is set, it can only be reset to 0 if OTFDEC is reset. Setting this bit forces KEYLOCK bit to 1.",
449 ),
450 bit_offset: BitOffset::Regular(
451 RegularBitOffset {
452 offset: 1,
453 },
454 ),
455 bit_size: 1,
456 array: None,
457 enumm: None,
458 },
459 Field {
460 name: "keylock",
461 description: Some(
462 "region key lock Note: This bit is set once: if this bit is set, it can only be reset to 0 if the OTFDEC is reset.",
463 ),
464 bit_offset: BitOffset::Regular(
465 RegularBitOffset {
466 offset: 2,
467 },
468 ),
469 bit_size: 1,
470 array: None,
471 enumm: None,
472 },
473 Field {
474 name: "mode",
475 description: Some(
476 "operating mode This bitfield selects the OTFDEC operating mode for this region: Others: Reserved When MODE ≠ 11, the standard AES encryption mode is activated. When either of the MODE bits are changed, the region key and associated CRC are zeroed.",
477 ),
478 bit_offset: BitOffset::Regular(
479 RegularBitOffset {
480 offset: 4,
481 },
482 ),
483 bit_size: 2,
484 array: None,
485 enumm: Some(
486 "Mode",
487 ),
488 },
489 Field {
490 name: "keycrc",
491 description: Some(
492 "region key 8-bit CRC When KEYLOCK = 0, KEYCRC bitfield is automatically computed by hardware while loading the key of this region in this exact sequence: KEYR0 then KEYR1 then KEYR2 then finally KEYR3 (all written once). A new computation starts as soon as a new valid sequence is initiated, and KEYCRC is read as zero until a valid sequence is completed. When KEYLOCK = 1, KEYCRC remains unchanged until the next reset. CRC computation is an 8-bit checksum using the standard CRC-8-CCITT algorithm X8 + X2 + X + 1 (according the convention). Source code is available in . This field is read only. Note: CRC information is updated only after the last bit of the key has been written.",
493 ),
494 bit_offset: BitOffset::Regular(
495 RegularBitOffset {
496 offset: 8,
497 },
498 ),
499 bit_size: 8,
500 array: None,
501 enumm: None,
502 },
503 Field {
504 name: "reg_version",
505 description: Some(
506 "region firmware version This 16-bit bitfield must be correctly initialized before the region corresponding REG_EN bit is set in OTFDEC_RxCFGR.",
507 ),
508 bit_offset: BitOffset::Regular(
509 RegularBitOffset {
510 offset: 16,
511 },
512 ),
513 bit_size: 16,
514 array: None,
515 enumm: None,
516 },
517 ],
518 },
519 ],
520 enums: &[
521 Enum {
522 name: "Enc",
523 description: None,
524 bit_size: 1,
525 variants: &[
526 EnumVariant {
527 name: "DECRYPTION",
528 description: Some(
529 "OTFDEC working in decryption mode",
530 ),
531 value: 0,
532 },
533 EnumVariant {
534 name: "ENCRYPTION",
535 description: Some(
536 "OTFDEC working in encryption mode",
537 ),
538 value: 1,
539 },
540 ],
541 },
542 Enum {
543 name: "Mode",
544 description: None,
545 bit_size: 2,
546 variants: &[
547 EnumVariant {
548 name: "STANDARD",
549 description: Some(
550 "All read accesses are decrypted (instruction or data).",
551 ),
552 value: 2,
553 },
554 EnumVariant {
555 name: "ENHANCED",
556 description: Some(
557 "Enhanced encryption mode is activated, and only instruction accesses are decrypted",
558 ),
559 value: 3,
560 },
561 ],
562 },
563 ],
564};
565