1 | |
2 | use crate::metadata::ir::*; |
3 | pub(crate) static REGISTERS: IR = IR { |
4 | blocks: &[ |
5 | Block { |
6 | name: "Otg" , |
7 | extends: None, |
8 | description: Some( |
9 | "USB OTG core by Synopsys (more docs at <https://www.intel.com/content/www/us/en/programmable/hps/agilex5/index_frames.html>)" , |
10 | ), |
11 | items: &[ |
12 | BlockItem { |
13 | name: "gotgctl" , |
14 | description: Some( |
15 | "Control and status register" , |
16 | ), |
17 | array: None, |
18 | byte_offset: 0x0, |
19 | inner: BlockItemInner::Register( |
20 | Register { |
21 | access: Access::ReadWrite, |
22 | bit_size: 32, |
23 | fieldset: Some( |
24 | "Gotgctl" , |
25 | ), |
26 | }, |
27 | ), |
28 | }, |
29 | BlockItem { |
30 | name: "gotgint" , |
31 | description: Some( |
32 | "Interrupt register" , |
33 | ), |
34 | array: None, |
35 | byte_offset: 0x4, |
36 | inner: BlockItemInner::Register( |
37 | Register { |
38 | access: Access::ReadWrite, |
39 | bit_size: 32, |
40 | fieldset: Some( |
41 | "Gotgint" , |
42 | ), |
43 | }, |
44 | ), |
45 | }, |
46 | BlockItem { |
47 | name: "gahbcfg" , |
48 | description: Some( |
49 | "AHB configuration register" , |
50 | ), |
51 | array: None, |
52 | byte_offset: 0x8, |
53 | inner: BlockItemInner::Register( |
54 | Register { |
55 | access: Access::ReadWrite, |
56 | bit_size: 32, |
57 | fieldset: Some( |
58 | "Gahbcfg" , |
59 | ), |
60 | }, |
61 | ), |
62 | }, |
63 | BlockItem { |
64 | name: "gusbcfg" , |
65 | description: Some( |
66 | "USB configuration register" , |
67 | ), |
68 | array: None, |
69 | byte_offset: 0xc, |
70 | inner: BlockItemInner::Register( |
71 | Register { |
72 | access: Access::ReadWrite, |
73 | bit_size: 32, |
74 | fieldset: Some( |
75 | "Gusbcfg" , |
76 | ), |
77 | }, |
78 | ), |
79 | }, |
80 | BlockItem { |
81 | name: "grstctl" , |
82 | description: Some( |
83 | "Reset register" , |
84 | ), |
85 | array: None, |
86 | byte_offset: 0x10, |
87 | inner: BlockItemInner::Register( |
88 | Register { |
89 | access: Access::ReadWrite, |
90 | bit_size: 32, |
91 | fieldset: Some( |
92 | "Grstctl" , |
93 | ), |
94 | }, |
95 | ), |
96 | }, |
97 | BlockItem { |
98 | name: "gintsts" , |
99 | description: Some( |
100 | "Core interrupt register" , |
101 | ), |
102 | array: None, |
103 | byte_offset: 0x14, |
104 | inner: BlockItemInner::Register( |
105 | Register { |
106 | access: Access::ReadWrite, |
107 | bit_size: 32, |
108 | fieldset: Some( |
109 | "Gintsts" , |
110 | ), |
111 | }, |
112 | ), |
113 | }, |
114 | BlockItem { |
115 | name: "gintmsk" , |
116 | description: Some( |
117 | "Interrupt mask register" , |
118 | ), |
119 | array: None, |
120 | byte_offset: 0x18, |
121 | inner: BlockItemInner::Register( |
122 | Register { |
123 | access: Access::ReadWrite, |
124 | bit_size: 32, |
125 | fieldset: Some( |
126 | "Gintmsk" , |
127 | ), |
128 | }, |
129 | ), |
130 | }, |
131 | BlockItem { |
132 | name: "grxstsr" , |
133 | description: Some( |
134 | "Receive status debug read register" , |
135 | ), |
136 | array: None, |
137 | byte_offset: 0x1c, |
138 | inner: BlockItemInner::Register( |
139 | Register { |
140 | access: Access::Read, |
141 | bit_size: 32, |
142 | fieldset: Some( |
143 | "Grxsts" , |
144 | ), |
145 | }, |
146 | ), |
147 | }, |
148 | BlockItem { |
149 | name: "grxstsp" , |
150 | description: Some( |
151 | "Status read and pop register" , |
152 | ), |
153 | array: None, |
154 | byte_offset: 0x20, |
155 | inner: BlockItemInner::Register( |
156 | Register { |
157 | access: Access::Read, |
158 | bit_size: 32, |
159 | fieldset: Some( |
160 | "Grxsts" , |
161 | ), |
162 | }, |
163 | ), |
164 | }, |
165 | BlockItem { |
166 | name: "grxfsiz" , |
167 | description: Some( |
168 | "Receive FIFO size register" , |
169 | ), |
170 | array: None, |
171 | byte_offset: 0x24, |
172 | inner: BlockItemInner::Register( |
173 | Register { |
174 | access: Access::ReadWrite, |
175 | bit_size: 32, |
176 | fieldset: Some( |
177 | "Grxfsiz" , |
178 | ), |
179 | }, |
180 | ), |
181 | }, |
182 | BlockItem { |
183 | name: "dieptxf0" , |
184 | description: Some( |
185 | "Endpoint 0 transmit FIFO size register (device mode)" , |
186 | ), |
187 | array: None, |
188 | byte_offset: 0x28, |
189 | inner: BlockItemInner::Register( |
190 | Register { |
191 | access: Access::ReadWrite, |
192 | bit_size: 32, |
193 | fieldset: Some( |
194 | "Fsiz" , |
195 | ), |
196 | }, |
197 | ), |
198 | }, |
199 | BlockItem { |
200 | name: "hnptxfsiz" , |
201 | description: Some( |
202 | "Non-periodic transmit FIFO size register (host mode)" , |
203 | ), |
204 | array: None, |
205 | byte_offset: 0x28, |
206 | inner: BlockItemInner::Register( |
207 | Register { |
208 | access: Access::ReadWrite, |
209 | bit_size: 32, |
210 | fieldset: Some( |
211 | "Fsiz" , |
212 | ), |
213 | }, |
214 | ), |
215 | }, |
216 | BlockItem { |
217 | name: "hnptxsts" , |
218 | description: Some( |
219 | "Non-periodic transmit FIFO/queue status register (host mode)" , |
220 | ), |
221 | array: None, |
222 | byte_offset: 0x2c, |
223 | inner: BlockItemInner::Register( |
224 | Register { |
225 | access: Access::Read, |
226 | bit_size: 32, |
227 | fieldset: Some( |
228 | "Hnptxsts" , |
229 | ), |
230 | }, |
231 | ), |
232 | }, |
233 | BlockItem { |
234 | name: "gi2cctl" , |
235 | description: Some( |
236 | "OTG I2C access register" , |
237 | ), |
238 | array: None, |
239 | byte_offset: 0x30, |
240 | inner: BlockItemInner::Register( |
241 | Register { |
242 | access: Access::ReadWrite, |
243 | bit_size: 32, |
244 | fieldset: Some( |
245 | "Gi2cctl" , |
246 | ), |
247 | }, |
248 | ), |
249 | }, |
250 | BlockItem { |
251 | name: "gccfg_v1" , |
252 | description: Some( |
253 | "General core configuration register, for core_id 0x0000_1xxx" , |
254 | ), |
255 | array: None, |
256 | byte_offset: 0x38, |
257 | inner: BlockItemInner::Register( |
258 | Register { |
259 | access: Access::ReadWrite, |
260 | bit_size: 32, |
261 | fieldset: Some( |
262 | "GccfgV1" , |
263 | ), |
264 | }, |
265 | ), |
266 | }, |
267 | BlockItem { |
268 | name: "gccfg_v2" , |
269 | description: Some( |
270 | "General core configuration register, for core_id 0x0000_[23]xxx" , |
271 | ), |
272 | array: None, |
273 | byte_offset: 0x38, |
274 | inner: BlockItemInner::Register( |
275 | Register { |
276 | access: Access::ReadWrite, |
277 | bit_size: 32, |
278 | fieldset: Some( |
279 | "GccfgV2" , |
280 | ), |
281 | }, |
282 | ), |
283 | }, |
284 | BlockItem { |
285 | name: "gccfg_v3" , |
286 | description: Some( |
287 | "General core configuration register, for core_id 0x0000_5xxx" , |
288 | ), |
289 | array: None, |
290 | byte_offset: 0x38, |
291 | inner: BlockItemInner::Register( |
292 | Register { |
293 | access: Access::ReadWrite, |
294 | bit_size: 32, |
295 | fieldset: Some( |
296 | "GccfgV3" , |
297 | ), |
298 | }, |
299 | ), |
300 | }, |
301 | BlockItem { |
302 | name: "cid" , |
303 | description: Some( |
304 | "Core ID register" , |
305 | ), |
306 | array: None, |
307 | byte_offset: 0x3c, |
308 | inner: BlockItemInner::Register( |
309 | Register { |
310 | access: Access::ReadWrite, |
311 | bit_size: 32, |
312 | fieldset: Some( |
313 | "Cid" , |
314 | ), |
315 | }, |
316 | ), |
317 | }, |
318 | BlockItem { |
319 | name: "snpsid" , |
320 | description: Some( |
321 | "Synopsis ID Register" , |
322 | ), |
323 | array: None, |
324 | byte_offset: 0x40, |
325 | inner: BlockItemInner::Register( |
326 | Register { |
327 | access: Access::ReadWrite, |
328 | bit_size: 32, |
329 | fieldset: None, |
330 | }, |
331 | ), |
332 | }, |
333 | BlockItem { |
334 | name: "hwcfg1" , |
335 | description: Some( |
336 | "User HW Config 1 Register" , |
337 | ), |
338 | array: None, |
339 | byte_offset: 0x44, |
340 | inner: BlockItemInner::Register( |
341 | Register { |
342 | access: Access::ReadWrite, |
343 | bit_size: 32, |
344 | fieldset: None, |
345 | }, |
346 | ), |
347 | }, |
348 | BlockItem { |
349 | name: "hwcfg2" , |
350 | description: Some( |
351 | "User HW Config 2 Register" , |
352 | ), |
353 | array: None, |
354 | byte_offset: 0x48, |
355 | inner: BlockItemInner::Register( |
356 | Register { |
357 | access: Access::ReadWrite, |
358 | bit_size: 32, |
359 | fieldset: None, |
360 | }, |
361 | ), |
362 | }, |
363 | BlockItem { |
364 | name: "hwcfg3" , |
365 | description: Some( |
366 | "User HW Config 3 Register" , |
367 | ), |
368 | array: None, |
369 | byte_offset: 0x4c, |
370 | inner: BlockItemInner::Register( |
371 | Register { |
372 | access: Access::ReadWrite, |
373 | bit_size: 32, |
374 | fieldset: None, |
375 | }, |
376 | ), |
377 | }, |
378 | BlockItem { |
379 | name: "hwcfg4" , |
380 | description: Some( |
381 | "User HW Config 4 Register" , |
382 | ), |
383 | array: None, |
384 | byte_offset: 0x50, |
385 | inner: BlockItemInner::Register( |
386 | Register { |
387 | access: Access::ReadWrite, |
388 | bit_size: 32, |
389 | fieldset: None, |
390 | }, |
391 | ), |
392 | }, |
393 | BlockItem { |
394 | name: "glpmcfg" , |
395 | description: Some( |
396 | "OTG core LPM configuration register" , |
397 | ), |
398 | array: None, |
399 | byte_offset: 0x54, |
400 | inner: BlockItemInner::Register( |
401 | Register { |
402 | access: Access::ReadWrite, |
403 | bit_size: 32, |
404 | fieldset: Some( |
405 | "Glpmcfg" , |
406 | ), |
407 | }, |
408 | ), |
409 | }, |
410 | BlockItem { |
411 | name: "gpwrdn" , |
412 | description: Some( |
413 | "Global PowerDn Register" , |
414 | ), |
415 | array: None, |
416 | byte_offset: 0x58, |
417 | inner: BlockItemInner::Register( |
418 | Register { |
419 | access: Access::ReadWrite, |
420 | bit_size: 32, |
421 | fieldset: None, |
422 | }, |
423 | ), |
424 | }, |
425 | BlockItem { |
426 | name: "gdfifocfg" , |
427 | description: Some( |
428 | "Global DFIFO SW Config Register" , |
429 | ), |
430 | array: None, |
431 | byte_offset: 0x5c, |
432 | inner: BlockItemInner::Register( |
433 | Register { |
434 | access: Access::ReadWrite, |
435 | bit_size: 32, |
436 | fieldset: None, |
437 | }, |
438 | ), |
439 | }, |
440 | BlockItem { |
441 | name: "adpctl" , |
442 | description: Some( |
443 | "ADP (Attach Detection Protocol) Control Register" , |
444 | ), |
445 | array: None, |
446 | byte_offset: 0x60, |
447 | inner: BlockItemInner::Register( |
448 | Register { |
449 | access: Access::ReadWrite, |
450 | bit_size: 32, |
451 | fieldset: Some( |
452 | "Adpctl" , |
453 | ), |
454 | }, |
455 | ), |
456 | }, |
457 | BlockItem { |
458 | name: "hptxfsiz" , |
459 | description: Some( |
460 | "Host periodic transmit FIFO size register" , |
461 | ), |
462 | array: None, |
463 | byte_offset: 0x100, |
464 | inner: BlockItemInner::Register( |
465 | Register { |
466 | access: Access::ReadWrite, |
467 | bit_size: 32, |
468 | fieldset: Some( |
469 | "Fsiz" , |
470 | ), |
471 | }, |
472 | ), |
473 | }, |
474 | BlockItem { |
475 | name: "dieptxf" , |
476 | description: Some( |
477 | "Device IN endpoint transmit FIFO size register" , |
478 | ), |
479 | array: Some( |
480 | Array::Regular( |
481 | RegularArray { |
482 | len: 7, |
483 | stride: 4, |
484 | }, |
485 | ), |
486 | ), |
487 | byte_offset: 0x104, |
488 | inner: BlockItemInner::Register( |
489 | Register { |
490 | access: Access::ReadWrite, |
491 | bit_size: 32, |
492 | fieldset: Some( |
493 | "Fsiz" , |
494 | ), |
495 | }, |
496 | ), |
497 | }, |
498 | BlockItem { |
499 | name: "hcfg" , |
500 | description: Some( |
501 | "Host configuration register" , |
502 | ), |
503 | array: None, |
504 | byte_offset: 0x400, |
505 | inner: BlockItemInner::Register( |
506 | Register { |
507 | access: Access::ReadWrite, |
508 | bit_size: 32, |
509 | fieldset: Some( |
510 | "Hcfg" , |
511 | ), |
512 | }, |
513 | ), |
514 | }, |
515 | BlockItem { |
516 | name: "hfir" , |
517 | description: Some( |
518 | "Host frame interval register" , |
519 | ), |
520 | array: None, |
521 | byte_offset: 0x404, |
522 | inner: BlockItemInner::Register( |
523 | Register { |
524 | access: Access::ReadWrite, |
525 | bit_size: 32, |
526 | fieldset: Some( |
527 | "Hfir" , |
528 | ), |
529 | }, |
530 | ), |
531 | }, |
532 | BlockItem { |
533 | name: "hfnum" , |
534 | description: Some( |
535 | "Host frame number/frame time remaining register" , |
536 | ), |
537 | array: None, |
538 | byte_offset: 0x408, |
539 | inner: BlockItemInner::Register( |
540 | Register { |
541 | access: Access::Read, |
542 | bit_size: 32, |
543 | fieldset: Some( |
544 | "Hfnum" , |
545 | ), |
546 | }, |
547 | ), |
548 | }, |
549 | BlockItem { |
550 | name: "hptxsts" , |
551 | description: Some( |
552 | "Periodic transmit FIFO/queue status register" , |
553 | ), |
554 | array: None, |
555 | byte_offset: 0x410, |
556 | inner: BlockItemInner::Register( |
557 | Register { |
558 | access: Access::ReadWrite, |
559 | bit_size: 32, |
560 | fieldset: Some( |
561 | "Hptxsts" , |
562 | ), |
563 | }, |
564 | ), |
565 | }, |
566 | BlockItem { |
567 | name: "haint" , |
568 | description: Some( |
569 | "Host all channels interrupt register" , |
570 | ), |
571 | array: None, |
572 | byte_offset: 0x414, |
573 | inner: BlockItemInner::Register( |
574 | Register { |
575 | access: Access::Read, |
576 | bit_size: 32, |
577 | fieldset: Some( |
578 | "Haint" , |
579 | ), |
580 | }, |
581 | ), |
582 | }, |
583 | BlockItem { |
584 | name: "haintmsk" , |
585 | description: Some( |
586 | "Host all channels interrupt mask register" , |
587 | ), |
588 | array: None, |
589 | byte_offset: 0x418, |
590 | inner: BlockItemInner::Register( |
591 | Register { |
592 | access: Access::ReadWrite, |
593 | bit_size: 32, |
594 | fieldset: Some( |
595 | "Haintmsk" , |
596 | ), |
597 | }, |
598 | ), |
599 | }, |
600 | BlockItem { |
601 | name: "hflbaddr" , |
602 | description: Some( |
603 | "Host Frame Scheduling List Register" , |
604 | ), |
605 | array: None, |
606 | byte_offset: 0x41c, |
607 | inner: BlockItemInner::Register( |
608 | Register { |
609 | access: Access::ReadWrite, |
610 | bit_size: 32, |
611 | fieldset: None, |
612 | }, |
613 | ), |
614 | }, |
615 | BlockItem { |
616 | name: "hprt" , |
617 | description: Some( |
618 | "Host port control and status register" , |
619 | ), |
620 | array: None, |
621 | byte_offset: 0x440, |
622 | inner: BlockItemInner::Register( |
623 | Register { |
624 | access: Access::ReadWrite, |
625 | bit_size: 32, |
626 | fieldset: Some( |
627 | "Hprt" , |
628 | ), |
629 | }, |
630 | ), |
631 | }, |
632 | BlockItem { |
633 | name: "hcchar" , |
634 | description: Some( |
635 | "Host channel characteristics register" , |
636 | ), |
637 | array: Some( |
638 | Array::Regular( |
639 | RegularArray { |
640 | len: 12, |
641 | stride: 32, |
642 | }, |
643 | ), |
644 | ), |
645 | byte_offset: 0x500, |
646 | inner: BlockItemInner::Register( |
647 | Register { |
648 | access: Access::ReadWrite, |
649 | bit_size: 32, |
650 | fieldset: Some( |
651 | "Hcchar" , |
652 | ), |
653 | }, |
654 | ), |
655 | }, |
656 | BlockItem { |
657 | name: "hcsplt" , |
658 | description: Some( |
659 | "Host channel split control register" , |
660 | ), |
661 | array: Some( |
662 | Array::Regular( |
663 | RegularArray { |
664 | len: 12, |
665 | stride: 32, |
666 | }, |
667 | ), |
668 | ), |
669 | byte_offset: 0x504, |
670 | inner: BlockItemInner::Register( |
671 | Register { |
672 | access: Access::ReadWrite, |
673 | bit_size: 32, |
674 | fieldset: None, |
675 | }, |
676 | ), |
677 | }, |
678 | BlockItem { |
679 | name: "hcint" , |
680 | description: Some( |
681 | "Host channel interrupt register" , |
682 | ), |
683 | array: Some( |
684 | Array::Regular( |
685 | RegularArray { |
686 | len: 12, |
687 | stride: 32, |
688 | }, |
689 | ), |
690 | ), |
691 | byte_offset: 0x508, |
692 | inner: BlockItemInner::Register( |
693 | Register { |
694 | access: Access::ReadWrite, |
695 | bit_size: 32, |
696 | fieldset: Some( |
697 | "Hcint" , |
698 | ), |
699 | }, |
700 | ), |
701 | }, |
702 | BlockItem { |
703 | name: "hcintmsk" , |
704 | description: Some( |
705 | "Host channel mask register" , |
706 | ), |
707 | array: Some( |
708 | Array::Regular( |
709 | RegularArray { |
710 | len: 12, |
711 | stride: 32, |
712 | }, |
713 | ), |
714 | ), |
715 | byte_offset: 0x50c, |
716 | inner: BlockItemInner::Register( |
717 | Register { |
718 | access: Access::ReadWrite, |
719 | bit_size: 32, |
720 | fieldset: Some( |
721 | "Hcintmsk" , |
722 | ), |
723 | }, |
724 | ), |
725 | }, |
726 | BlockItem { |
727 | name: "hctsiz" , |
728 | description: Some( |
729 | "Host channel transfer size register" , |
730 | ), |
731 | array: Some( |
732 | Array::Regular( |
733 | RegularArray { |
734 | len: 12, |
735 | stride: 32, |
736 | }, |
737 | ), |
738 | ), |
739 | byte_offset: 0x510, |
740 | inner: BlockItemInner::Register( |
741 | Register { |
742 | access: Access::ReadWrite, |
743 | bit_size: 32, |
744 | fieldset: Some( |
745 | "Hctsiz" , |
746 | ), |
747 | }, |
748 | ), |
749 | }, |
750 | BlockItem { |
751 | name: "hcdma" , |
752 | description: Some( |
753 | "Host channel DMA address register (config for scatter/gather)" , |
754 | ), |
755 | array: Some( |
756 | Array::Regular( |
757 | RegularArray { |
758 | len: 12, |
759 | stride: 32, |
760 | }, |
761 | ), |
762 | ), |
763 | byte_offset: 0x514, |
764 | inner: BlockItemInner::Register( |
765 | Register { |
766 | access: Access::ReadWrite, |
767 | bit_size: 32, |
768 | fieldset: Some( |
769 | "Hcdma" , |
770 | ), |
771 | }, |
772 | ), |
773 | }, |
774 | BlockItem { |
775 | name: "hcdmab" , |
776 | description: Some( |
777 | "Host channel DMA address register (address for current transfer; debug)" , |
778 | ), |
779 | array: Some( |
780 | Array::Regular( |
781 | RegularArray { |
782 | len: 12, |
783 | stride: 32, |
784 | }, |
785 | ), |
786 | ), |
787 | byte_offset: 0x51c, |
788 | inner: BlockItemInner::Register( |
789 | Register { |
790 | access: Access::ReadWrite, |
791 | bit_size: 32, |
792 | fieldset: None, |
793 | }, |
794 | ), |
795 | }, |
796 | BlockItem { |
797 | name: "dcfg" , |
798 | description: Some( |
799 | "Device configuration register" , |
800 | ), |
801 | array: None, |
802 | byte_offset: 0x800, |
803 | inner: BlockItemInner::Register( |
804 | Register { |
805 | access: Access::ReadWrite, |
806 | bit_size: 32, |
807 | fieldset: Some( |
808 | "Dcfg" , |
809 | ), |
810 | }, |
811 | ), |
812 | }, |
813 | BlockItem { |
814 | name: "dctl" , |
815 | description: Some( |
816 | "Device control register" , |
817 | ), |
818 | array: None, |
819 | byte_offset: 0x804, |
820 | inner: BlockItemInner::Register( |
821 | Register { |
822 | access: Access::ReadWrite, |
823 | bit_size: 32, |
824 | fieldset: Some( |
825 | "Dctl" , |
826 | ), |
827 | }, |
828 | ), |
829 | }, |
830 | BlockItem { |
831 | name: "dsts" , |
832 | description: Some( |
833 | "Device status register" , |
834 | ), |
835 | array: None, |
836 | byte_offset: 0x808, |
837 | inner: BlockItemInner::Register( |
838 | Register { |
839 | access: Access::Read, |
840 | bit_size: 32, |
841 | fieldset: Some( |
842 | "Dsts" , |
843 | ), |
844 | }, |
845 | ), |
846 | }, |
847 | BlockItem { |
848 | name: "diepmsk" , |
849 | description: Some( |
850 | "Device IN endpoint common interrupt mask register" , |
851 | ), |
852 | array: None, |
853 | byte_offset: 0x810, |
854 | inner: BlockItemInner::Register( |
855 | Register { |
856 | access: Access::ReadWrite, |
857 | bit_size: 32, |
858 | fieldset: Some( |
859 | "Diepmsk" , |
860 | ), |
861 | }, |
862 | ), |
863 | }, |
864 | BlockItem { |
865 | name: "doepmsk" , |
866 | description: Some( |
867 | "Device OUT endpoint common interrupt mask register" , |
868 | ), |
869 | array: None, |
870 | byte_offset: 0x814, |
871 | inner: BlockItemInner::Register( |
872 | Register { |
873 | access: Access::ReadWrite, |
874 | bit_size: 32, |
875 | fieldset: Some( |
876 | "Doepmsk" , |
877 | ), |
878 | }, |
879 | ), |
880 | }, |
881 | BlockItem { |
882 | name: "daint" , |
883 | description: Some( |
884 | "Device all endpoints interrupt register" , |
885 | ), |
886 | array: None, |
887 | byte_offset: 0x818, |
888 | inner: BlockItemInner::Register( |
889 | Register { |
890 | access: Access::Read, |
891 | bit_size: 32, |
892 | fieldset: Some( |
893 | "Daint" , |
894 | ), |
895 | }, |
896 | ), |
897 | }, |
898 | BlockItem { |
899 | name: "daintmsk" , |
900 | description: Some( |
901 | "All endpoints interrupt mask register" , |
902 | ), |
903 | array: None, |
904 | byte_offset: 0x81c, |
905 | inner: BlockItemInner::Register( |
906 | Register { |
907 | access: Access::ReadWrite, |
908 | bit_size: 32, |
909 | fieldset: Some( |
910 | "Daintmsk" , |
911 | ), |
912 | }, |
913 | ), |
914 | }, |
915 | BlockItem { |
916 | name: "dvbusdis" , |
917 | description: Some( |
918 | "Device VBUS discharge time register" , |
919 | ), |
920 | array: None, |
921 | byte_offset: 0x828, |
922 | inner: BlockItemInner::Register( |
923 | Register { |
924 | access: Access::ReadWrite, |
925 | bit_size: 32, |
926 | fieldset: Some( |
927 | "Dvbusdis" , |
928 | ), |
929 | }, |
930 | ), |
931 | }, |
932 | BlockItem { |
933 | name: "dvbuspulse" , |
934 | description: Some( |
935 | "Device VBUS pulsing time register" , |
936 | ), |
937 | array: None, |
938 | byte_offset: 0x82c, |
939 | inner: BlockItemInner::Register( |
940 | Register { |
941 | access: Access::ReadWrite, |
942 | bit_size: 32, |
943 | fieldset: Some( |
944 | "Dvbuspulse" , |
945 | ), |
946 | }, |
947 | ), |
948 | }, |
949 | BlockItem { |
950 | name: "diepempmsk" , |
951 | description: Some( |
952 | "Device IN endpoint FIFO empty interrupt mask register" , |
953 | ), |
954 | array: None, |
955 | byte_offset: 0x834, |
956 | inner: BlockItemInner::Register( |
957 | Register { |
958 | access: Access::ReadWrite, |
959 | bit_size: 32, |
960 | fieldset: Some( |
961 | "Diepempmsk" , |
962 | ), |
963 | }, |
964 | ), |
965 | }, |
966 | BlockItem { |
967 | name: "diepctl" , |
968 | description: Some( |
969 | "Device IN endpoint control register" , |
970 | ), |
971 | array: Some( |
972 | Array::Regular( |
973 | RegularArray { |
974 | len: 16, |
975 | stride: 32, |
976 | }, |
977 | ), |
978 | ), |
979 | byte_offset: 0x900, |
980 | inner: BlockItemInner::Register( |
981 | Register { |
982 | access: Access::ReadWrite, |
983 | bit_size: 32, |
984 | fieldset: Some( |
985 | "Diepctl" , |
986 | ), |
987 | }, |
988 | ), |
989 | }, |
990 | BlockItem { |
991 | name: "diepint" , |
992 | description: Some( |
993 | "Device IN endpoint interrupt register" , |
994 | ), |
995 | array: Some( |
996 | Array::Regular( |
997 | RegularArray { |
998 | len: 16, |
999 | stride: 32, |
1000 | }, |
1001 | ), |
1002 | ), |
1003 | byte_offset: 0x908, |
1004 | inner: BlockItemInner::Register( |
1005 | Register { |
1006 | access: Access::ReadWrite, |
1007 | bit_size: 32, |
1008 | fieldset: Some( |
1009 | "Diepint" , |
1010 | ), |
1011 | }, |
1012 | ), |
1013 | }, |
1014 | BlockItem { |
1015 | name: "dieptsiz" , |
1016 | description: Some( |
1017 | "Device IN endpoint transfer size register" , |
1018 | ), |
1019 | array: Some( |
1020 | Array::Regular( |
1021 | RegularArray { |
1022 | len: 16, |
1023 | stride: 32, |
1024 | }, |
1025 | ), |
1026 | ), |
1027 | byte_offset: 0x910, |
1028 | inner: BlockItemInner::Register( |
1029 | Register { |
1030 | access: Access::ReadWrite, |
1031 | bit_size: 32, |
1032 | fieldset: Some( |
1033 | "Dieptsiz" , |
1034 | ), |
1035 | }, |
1036 | ), |
1037 | }, |
1038 | BlockItem { |
1039 | name: "dtxfsts" , |
1040 | description: Some( |
1041 | "Device IN endpoint transmit FIFO status register" , |
1042 | ), |
1043 | array: Some( |
1044 | Array::Regular( |
1045 | RegularArray { |
1046 | len: 16, |
1047 | stride: 32, |
1048 | }, |
1049 | ), |
1050 | ), |
1051 | byte_offset: 0x918, |
1052 | inner: BlockItemInner::Register( |
1053 | Register { |
1054 | access: Access::Read, |
1055 | bit_size: 32, |
1056 | fieldset: Some( |
1057 | "Dtxfsts" , |
1058 | ), |
1059 | }, |
1060 | ), |
1061 | }, |
1062 | BlockItem { |
1063 | name: "doepctl" , |
1064 | description: Some( |
1065 | "Device OUT endpoint control register" , |
1066 | ), |
1067 | array: Some( |
1068 | Array::Regular( |
1069 | RegularArray { |
1070 | len: 16, |
1071 | stride: 32, |
1072 | }, |
1073 | ), |
1074 | ), |
1075 | byte_offset: 0xb00, |
1076 | inner: BlockItemInner::Register( |
1077 | Register { |
1078 | access: Access::ReadWrite, |
1079 | bit_size: 32, |
1080 | fieldset: Some( |
1081 | "Doepctl" , |
1082 | ), |
1083 | }, |
1084 | ), |
1085 | }, |
1086 | BlockItem { |
1087 | name: "doepint" , |
1088 | description: Some( |
1089 | "Device OUT endpoint interrupt register" , |
1090 | ), |
1091 | array: Some( |
1092 | Array::Regular( |
1093 | RegularArray { |
1094 | len: 16, |
1095 | stride: 32, |
1096 | }, |
1097 | ), |
1098 | ), |
1099 | byte_offset: 0xb08, |
1100 | inner: BlockItemInner::Register( |
1101 | Register { |
1102 | access: Access::ReadWrite, |
1103 | bit_size: 32, |
1104 | fieldset: Some( |
1105 | "Doepint" , |
1106 | ), |
1107 | }, |
1108 | ), |
1109 | }, |
1110 | BlockItem { |
1111 | name: "doeptsiz" , |
1112 | description: Some( |
1113 | "Device OUT endpoint transfer size register" , |
1114 | ), |
1115 | array: Some( |
1116 | Array::Regular( |
1117 | RegularArray { |
1118 | len: 16, |
1119 | stride: 32, |
1120 | }, |
1121 | ), |
1122 | ), |
1123 | byte_offset: 0xb10, |
1124 | inner: BlockItemInner::Register( |
1125 | Register { |
1126 | access: Access::ReadWrite, |
1127 | bit_size: 32, |
1128 | fieldset: Some( |
1129 | "Doeptsiz" , |
1130 | ), |
1131 | }, |
1132 | ), |
1133 | }, |
1134 | BlockItem { |
1135 | name: "doepdma" , |
1136 | description: Some( |
1137 | "Device OUT/IN endpoint DMA address register" , |
1138 | ), |
1139 | array: Some( |
1140 | Array::Regular( |
1141 | RegularArray { |
1142 | len: 16, |
1143 | stride: 32, |
1144 | }, |
1145 | ), |
1146 | ), |
1147 | byte_offset: 0xb14, |
1148 | inner: BlockItemInner::Register( |
1149 | Register { |
1150 | access: Access::ReadWrite, |
1151 | bit_size: 32, |
1152 | fieldset: None, |
1153 | }, |
1154 | ), |
1155 | }, |
1156 | BlockItem { |
1157 | name: "pcgcctl" , |
1158 | description: Some( |
1159 | "Power and clock gating control register" , |
1160 | ), |
1161 | array: None, |
1162 | byte_offset: 0xe00, |
1163 | inner: BlockItemInner::Register( |
1164 | Register { |
1165 | access: Access::ReadWrite, |
1166 | bit_size: 32, |
1167 | fieldset: Some( |
1168 | "Pcgcctl" , |
1169 | ), |
1170 | }, |
1171 | ), |
1172 | }, |
1173 | BlockItem { |
1174 | name: "fifo" , |
1175 | description: Some( |
1176 | "Device endpoint / host channel FIFO register" , |
1177 | ), |
1178 | array: Some( |
1179 | Array::Regular( |
1180 | RegularArray { |
1181 | len: 16, |
1182 | stride: 4096, |
1183 | }, |
1184 | ), |
1185 | ), |
1186 | byte_offset: 0x1000, |
1187 | inner: BlockItemInner::Register( |
1188 | Register { |
1189 | access: Access::ReadWrite, |
1190 | bit_size: 32, |
1191 | fieldset: Some( |
1192 | "Fifo" , |
1193 | ), |
1194 | }, |
1195 | ), |
1196 | }, |
1197 | ], |
1198 | }, |
1199 | ], |
1200 | fieldsets: &[ |
1201 | FieldSet { |
1202 | name: "Adpctl" , |
1203 | extends: None, |
1204 | description: Some( |
1205 | "ADP (Attach Detection Protocol) Control Register" , |
1206 | ), |
1207 | bit_size: 32, |
1208 | fields: &[ |
1209 | Field { |
1210 | name: "prb_dschg" , |
1211 | description: Some( |
1212 | "Probe Discharge time (times for TADP_DSCHG)" , |
1213 | ), |
1214 | bit_offset: BitOffset::Regular( |
1215 | RegularBitOffset { |
1216 | offset: 0, |
1217 | }, |
1218 | ), |
1219 | bit_size: 2, |
1220 | array: None, |
1221 | enumm: None, |
1222 | }, |
1223 | Field { |
1224 | name: "prb_delta" , |
1225 | description: Some( |
1226 | "Probe Delta (resolution for RTIM)" , |
1227 | ), |
1228 | bit_offset: BitOffset::Regular( |
1229 | RegularBitOffset { |
1230 | offset: 2, |
1231 | }, |
1232 | ), |
1233 | bit_size: 2, |
1234 | array: None, |
1235 | enumm: None, |
1236 | }, |
1237 | Field { |
1238 | name: "prb_per" , |
1239 | description: Some( |
1240 | "Probe Period (TADP_PRD)" , |
1241 | ), |
1242 | bit_offset: BitOffset::Regular( |
1243 | RegularBitOffset { |
1244 | offset: 4, |
1245 | }, |
1246 | ), |
1247 | bit_size: 2, |
1248 | array: None, |
1249 | enumm: None, |
1250 | }, |
1251 | Field { |
1252 | name: "rtim" , |
1253 | description: Some( |
1254 | "Probe Period (TADP_PRD)" , |
1255 | ), |
1256 | bit_offset: BitOffset::Regular( |
1257 | RegularBitOffset { |
1258 | offset: 6, |
1259 | }, |
1260 | ), |
1261 | bit_size: 11, |
1262 | array: None, |
1263 | enumm: None, |
1264 | }, |
1265 | Field { |
1266 | name: "enaprb" , |
1267 | description: Some( |
1268 | "Enable Probe" , |
1269 | ), |
1270 | bit_offset: BitOffset::Regular( |
1271 | RegularBitOffset { |
1272 | offset: 17, |
1273 | }, |
1274 | ), |
1275 | bit_size: 1, |
1276 | array: None, |
1277 | enumm: None, |
1278 | }, |
1279 | Field { |
1280 | name: "enasns" , |
1281 | description: Some( |
1282 | "Enable Sense" , |
1283 | ), |
1284 | bit_offset: BitOffset::Regular( |
1285 | RegularBitOffset { |
1286 | offset: 18, |
1287 | }, |
1288 | ), |
1289 | bit_size: 1, |
1290 | array: None, |
1291 | enumm: None, |
1292 | }, |
1293 | Field { |
1294 | name: "adpres" , |
1295 | description: Some( |
1296 | "ADP Reset" , |
1297 | ), |
1298 | bit_offset: BitOffset::Regular( |
1299 | RegularBitOffset { |
1300 | offset: 19, |
1301 | }, |
1302 | ), |
1303 | bit_size: 1, |
1304 | array: None, |
1305 | enumm: None, |
1306 | }, |
1307 | Field { |
1308 | name: "adpen" , |
1309 | description: Some( |
1310 | "ADP Enable" , |
1311 | ), |
1312 | bit_offset: BitOffset::Regular( |
1313 | RegularBitOffset { |
1314 | offset: 20, |
1315 | }, |
1316 | ), |
1317 | bit_size: 1, |
1318 | array: None, |
1319 | enumm: None, |
1320 | }, |
1321 | Field { |
1322 | name: "adp_prb_int" , |
1323 | description: Some( |
1324 | "ADP Probe Interrupt Enable" , |
1325 | ), |
1326 | bit_offset: BitOffset::Regular( |
1327 | RegularBitOffset { |
1328 | offset: 21, |
1329 | }, |
1330 | ), |
1331 | bit_size: 1, |
1332 | array: None, |
1333 | enumm: None, |
1334 | }, |
1335 | Field { |
1336 | name: "adp_sns_int" , |
1337 | description: Some( |
1338 | "ADP Sense Interrupt Enable" , |
1339 | ), |
1340 | bit_offset: BitOffset::Regular( |
1341 | RegularBitOffset { |
1342 | offset: 22, |
1343 | }, |
1344 | ), |
1345 | bit_size: 1, |
1346 | array: None, |
1347 | enumm: None, |
1348 | }, |
1349 | Field { |
1350 | name: "adp_tmout_int" , |
1351 | description: Some( |
1352 | "ADP Timeout Interrupt Enable" , |
1353 | ), |
1354 | bit_offset: BitOffset::Regular( |
1355 | RegularBitOffset { |
1356 | offset: 23, |
1357 | }, |
1358 | ), |
1359 | bit_size: 1, |
1360 | array: None, |
1361 | enumm: None, |
1362 | }, |
1363 | Field { |
1364 | name: "adp_prb_msk" , |
1365 | description: Some( |
1366 | "ADP Probe Interrupt Mask" , |
1367 | ), |
1368 | bit_offset: BitOffset::Regular( |
1369 | RegularBitOffset { |
1370 | offset: 24, |
1371 | }, |
1372 | ), |
1373 | bit_size: 1, |
1374 | array: None, |
1375 | enumm: None, |
1376 | }, |
1377 | Field { |
1378 | name: "adp_tmout_msk" , |
1379 | description: Some( |
1380 | "ADP Timeout Interrupt Mask" , |
1381 | ), |
1382 | bit_offset: BitOffset::Regular( |
1383 | RegularBitOffset { |
1384 | offset: 25, |
1385 | }, |
1386 | ), |
1387 | bit_size: 1, |
1388 | array: None, |
1389 | enumm: None, |
1390 | }, |
1391 | Field { |
1392 | name: "ar" , |
1393 | description: Some( |
1394 | "Access Request" , |
1395 | ), |
1396 | bit_offset: BitOffset::Regular( |
1397 | RegularBitOffset { |
1398 | offset: 26, |
1399 | }, |
1400 | ), |
1401 | bit_size: 1, |
1402 | array: None, |
1403 | enumm: None, |
1404 | }, |
1405 | ], |
1406 | }, |
1407 | FieldSet { |
1408 | name: "Cid" , |
1409 | extends: None, |
1410 | description: Some( |
1411 | "Core ID register" , |
1412 | ), |
1413 | bit_size: 32, |
1414 | fields: &[ |
1415 | Field { |
1416 | name: "product_id" , |
1417 | description: Some( |
1418 | "Product ID field" , |
1419 | ), |
1420 | bit_offset: BitOffset::Regular( |
1421 | RegularBitOffset { |
1422 | offset: 0, |
1423 | }, |
1424 | ), |
1425 | bit_size: 32, |
1426 | array: None, |
1427 | enumm: None, |
1428 | }, |
1429 | ], |
1430 | }, |
1431 | FieldSet { |
1432 | name: "Daint" , |
1433 | extends: None, |
1434 | description: Some( |
1435 | "Device all endpoints interrupt register" , |
1436 | ), |
1437 | bit_size: 32, |
1438 | fields: &[ |
1439 | Field { |
1440 | name: "iepint" , |
1441 | description: Some( |
1442 | "IN endpoint interrupt bits" , |
1443 | ), |
1444 | bit_offset: BitOffset::Regular( |
1445 | RegularBitOffset { |
1446 | offset: 0, |
1447 | }, |
1448 | ), |
1449 | bit_size: 16, |
1450 | array: None, |
1451 | enumm: None, |
1452 | }, |
1453 | Field { |
1454 | name: "oepint" , |
1455 | description: Some( |
1456 | "OUT endpoint interrupt bits" , |
1457 | ), |
1458 | bit_offset: BitOffset::Regular( |
1459 | RegularBitOffset { |
1460 | offset: 16, |
1461 | }, |
1462 | ), |
1463 | bit_size: 16, |
1464 | array: None, |
1465 | enumm: None, |
1466 | }, |
1467 | ], |
1468 | }, |
1469 | FieldSet { |
1470 | name: "Daintmsk" , |
1471 | extends: None, |
1472 | description: Some( |
1473 | "All endpoints interrupt mask register" , |
1474 | ), |
1475 | bit_size: 32, |
1476 | fields: &[ |
1477 | Field { |
1478 | name: "iepm" , |
1479 | description: Some( |
1480 | "IN EP interrupt mask bits" , |
1481 | ), |
1482 | bit_offset: BitOffset::Regular( |
1483 | RegularBitOffset { |
1484 | offset: 0, |
1485 | }, |
1486 | ), |
1487 | bit_size: 16, |
1488 | array: None, |
1489 | enumm: None, |
1490 | }, |
1491 | Field { |
1492 | name: "oepm" , |
1493 | description: Some( |
1494 | "OUT EP interrupt mask bits" , |
1495 | ), |
1496 | bit_offset: BitOffset::Regular( |
1497 | RegularBitOffset { |
1498 | offset: 16, |
1499 | }, |
1500 | ), |
1501 | bit_size: 16, |
1502 | array: None, |
1503 | enumm: None, |
1504 | }, |
1505 | ], |
1506 | }, |
1507 | FieldSet { |
1508 | name: "Dcfg" , |
1509 | extends: None, |
1510 | description: Some( |
1511 | "Device configuration register" , |
1512 | ), |
1513 | bit_size: 32, |
1514 | fields: &[ |
1515 | Field { |
1516 | name: "dspd" , |
1517 | description: Some( |
1518 | "Device speed" , |
1519 | ), |
1520 | bit_offset: BitOffset::Regular( |
1521 | RegularBitOffset { |
1522 | offset: 0, |
1523 | }, |
1524 | ), |
1525 | bit_size: 2, |
1526 | array: None, |
1527 | enumm: Some( |
1528 | "Dspd" , |
1529 | ), |
1530 | }, |
1531 | Field { |
1532 | name: "nzlsohsk" , |
1533 | description: Some( |
1534 | "Non-zero-length status OUT handshake" , |
1535 | ), |
1536 | bit_offset: BitOffset::Regular( |
1537 | RegularBitOffset { |
1538 | offset: 2, |
1539 | }, |
1540 | ), |
1541 | bit_size: 1, |
1542 | array: None, |
1543 | enumm: None, |
1544 | }, |
1545 | Field { |
1546 | name: "dad" , |
1547 | description: Some( |
1548 | "Device address" , |
1549 | ), |
1550 | bit_offset: BitOffset::Regular( |
1551 | RegularBitOffset { |
1552 | offset: 4, |
1553 | }, |
1554 | ), |
1555 | bit_size: 7, |
1556 | array: None, |
1557 | enumm: None, |
1558 | }, |
1559 | Field { |
1560 | name: "pfivl" , |
1561 | description: Some( |
1562 | "Periodic frame interval" , |
1563 | ), |
1564 | bit_offset: BitOffset::Regular( |
1565 | RegularBitOffset { |
1566 | offset: 11, |
1567 | }, |
1568 | ), |
1569 | bit_size: 2, |
1570 | array: None, |
1571 | enumm: Some( |
1572 | "Pfivl" , |
1573 | ), |
1574 | }, |
1575 | Field { |
1576 | name: "xcvrdly" , |
1577 | description: Some( |
1578 | "Transceiver delay" , |
1579 | ), |
1580 | bit_offset: BitOffset::Regular( |
1581 | RegularBitOffset { |
1582 | offset: 14, |
1583 | }, |
1584 | ), |
1585 | bit_size: 1, |
1586 | array: None, |
1587 | enumm: None, |
1588 | }, |
1589 | ], |
1590 | }, |
1591 | FieldSet { |
1592 | name: "Dctl" , |
1593 | extends: None, |
1594 | description: Some( |
1595 | "Device control register" , |
1596 | ), |
1597 | bit_size: 32, |
1598 | fields: &[ |
1599 | Field { |
1600 | name: "rwusig" , |
1601 | description: Some( |
1602 | "Remote wakeup signaling" , |
1603 | ), |
1604 | bit_offset: BitOffset::Regular( |
1605 | RegularBitOffset { |
1606 | offset: 0, |
1607 | }, |
1608 | ), |
1609 | bit_size: 1, |
1610 | array: None, |
1611 | enumm: None, |
1612 | }, |
1613 | Field { |
1614 | name: "sdis" , |
1615 | description: Some( |
1616 | "Soft disconnect" , |
1617 | ), |
1618 | bit_offset: BitOffset::Regular( |
1619 | RegularBitOffset { |
1620 | offset: 1, |
1621 | }, |
1622 | ), |
1623 | bit_size: 1, |
1624 | array: None, |
1625 | enumm: None, |
1626 | }, |
1627 | Field { |
1628 | name: "ginsts" , |
1629 | description: Some( |
1630 | "Global IN NAK status" , |
1631 | ), |
1632 | bit_offset: BitOffset::Regular( |
1633 | RegularBitOffset { |
1634 | offset: 2, |
1635 | }, |
1636 | ), |
1637 | bit_size: 1, |
1638 | array: None, |
1639 | enumm: None, |
1640 | }, |
1641 | Field { |
1642 | name: "gonsts" , |
1643 | description: Some( |
1644 | "Global OUT NAK status" , |
1645 | ), |
1646 | bit_offset: BitOffset::Regular( |
1647 | RegularBitOffset { |
1648 | offset: 3, |
1649 | }, |
1650 | ), |
1651 | bit_size: 1, |
1652 | array: None, |
1653 | enumm: None, |
1654 | }, |
1655 | Field { |
1656 | name: "tctl" , |
1657 | description: Some( |
1658 | "Test control" , |
1659 | ), |
1660 | bit_offset: BitOffset::Regular( |
1661 | RegularBitOffset { |
1662 | offset: 4, |
1663 | }, |
1664 | ), |
1665 | bit_size: 3, |
1666 | array: None, |
1667 | enumm: None, |
1668 | }, |
1669 | Field { |
1670 | name: "sginak" , |
1671 | description: Some( |
1672 | "Set global IN NAK" , |
1673 | ), |
1674 | bit_offset: BitOffset::Regular( |
1675 | RegularBitOffset { |
1676 | offset: 7, |
1677 | }, |
1678 | ), |
1679 | bit_size: 1, |
1680 | array: None, |
1681 | enumm: None, |
1682 | }, |
1683 | Field { |
1684 | name: "cginak" , |
1685 | description: Some( |
1686 | "Clear global IN NAK" , |
1687 | ), |
1688 | bit_offset: BitOffset::Regular( |
1689 | RegularBitOffset { |
1690 | offset: 8, |
1691 | }, |
1692 | ), |
1693 | bit_size: 1, |
1694 | array: None, |
1695 | enumm: None, |
1696 | }, |
1697 | Field { |
1698 | name: "sgonak" , |
1699 | description: Some( |
1700 | "Set global OUT NAK" , |
1701 | ), |
1702 | bit_offset: BitOffset::Regular( |
1703 | RegularBitOffset { |
1704 | offset: 9, |
1705 | }, |
1706 | ), |
1707 | bit_size: 1, |
1708 | array: None, |
1709 | enumm: None, |
1710 | }, |
1711 | Field { |
1712 | name: "cgonak" , |
1713 | description: Some( |
1714 | "Clear global OUT NAK" , |
1715 | ), |
1716 | bit_offset: BitOffset::Regular( |
1717 | RegularBitOffset { |
1718 | offset: 10, |
1719 | }, |
1720 | ), |
1721 | bit_size: 1, |
1722 | array: None, |
1723 | enumm: None, |
1724 | }, |
1725 | Field { |
1726 | name: "poprgdne" , |
1727 | description: Some( |
1728 | "Power-on programming done" , |
1729 | ), |
1730 | bit_offset: BitOffset::Regular( |
1731 | RegularBitOffset { |
1732 | offset: 11, |
1733 | }, |
1734 | ), |
1735 | bit_size: 1, |
1736 | array: None, |
1737 | enumm: None, |
1738 | }, |
1739 | ], |
1740 | }, |
1741 | FieldSet { |
1742 | name: "Diepctl" , |
1743 | extends: None, |
1744 | description: Some( |
1745 | "Device endpoint control register" , |
1746 | ), |
1747 | bit_size: 32, |
1748 | fields: &[ |
1749 | Field { |
1750 | name: "mpsiz" , |
1751 | description: Some( |
1752 | "MPSIZ" , |
1753 | ), |
1754 | bit_offset: BitOffset::Regular( |
1755 | RegularBitOffset { |
1756 | offset: 0, |
1757 | }, |
1758 | ), |
1759 | bit_size: 11, |
1760 | array: None, |
1761 | enumm: None, |
1762 | }, |
1763 | Field { |
1764 | name: "usbaep" , |
1765 | description: Some( |
1766 | "USBAEP" , |
1767 | ), |
1768 | bit_offset: BitOffset::Regular( |
1769 | RegularBitOffset { |
1770 | offset: 15, |
1771 | }, |
1772 | ), |
1773 | bit_size: 1, |
1774 | array: None, |
1775 | enumm: None, |
1776 | }, |
1777 | Field { |
1778 | name: "eonum_dpid" , |
1779 | description: Some( |
1780 | "EONUM/DPID" , |
1781 | ), |
1782 | bit_offset: BitOffset::Regular( |
1783 | RegularBitOffset { |
1784 | offset: 16, |
1785 | }, |
1786 | ), |
1787 | bit_size: 1, |
1788 | array: None, |
1789 | enumm: None, |
1790 | }, |
1791 | Field { |
1792 | name: "naksts" , |
1793 | description: Some( |
1794 | "NAKSTS" , |
1795 | ), |
1796 | bit_offset: BitOffset::Regular( |
1797 | RegularBitOffset { |
1798 | offset: 17, |
1799 | }, |
1800 | ), |
1801 | bit_size: 1, |
1802 | array: None, |
1803 | enumm: None, |
1804 | }, |
1805 | Field { |
1806 | name: "eptyp" , |
1807 | description: Some( |
1808 | "EPTYP" , |
1809 | ), |
1810 | bit_offset: BitOffset::Regular( |
1811 | RegularBitOffset { |
1812 | offset: 18, |
1813 | }, |
1814 | ), |
1815 | bit_size: 2, |
1816 | array: None, |
1817 | enumm: Some( |
1818 | "Eptyp" , |
1819 | ), |
1820 | }, |
1821 | Field { |
1822 | name: "snpm" , |
1823 | description: Some( |
1824 | "SNPM" , |
1825 | ), |
1826 | bit_offset: BitOffset::Regular( |
1827 | RegularBitOffset { |
1828 | offset: 20, |
1829 | }, |
1830 | ), |
1831 | bit_size: 1, |
1832 | array: None, |
1833 | enumm: None, |
1834 | }, |
1835 | Field { |
1836 | name: "stall" , |
1837 | description: Some( |
1838 | "STALL" , |
1839 | ), |
1840 | bit_offset: BitOffset::Regular( |
1841 | RegularBitOffset { |
1842 | offset: 21, |
1843 | }, |
1844 | ), |
1845 | bit_size: 1, |
1846 | array: None, |
1847 | enumm: None, |
1848 | }, |
1849 | Field { |
1850 | name: "txfnum" , |
1851 | description: Some( |
1852 | "TXFNUM" , |
1853 | ), |
1854 | bit_offset: BitOffset::Regular( |
1855 | RegularBitOffset { |
1856 | offset: 22, |
1857 | }, |
1858 | ), |
1859 | bit_size: 4, |
1860 | array: None, |
1861 | enumm: None, |
1862 | }, |
1863 | Field { |
1864 | name: "cnak" , |
1865 | description: Some( |
1866 | "CNAK" , |
1867 | ), |
1868 | bit_offset: BitOffset::Regular( |
1869 | RegularBitOffset { |
1870 | offset: 26, |
1871 | }, |
1872 | ), |
1873 | bit_size: 1, |
1874 | array: None, |
1875 | enumm: None, |
1876 | }, |
1877 | Field { |
1878 | name: "snak" , |
1879 | description: Some( |
1880 | "SNAK" , |
1881 | ), |
1882 | bit_offset: BitOffset::Regular( |
1883 | RegularBitOffset { |
1884 | offset: 27, |
1885 | }, |
1886 | ), |
1887 | bit_size: 1, |
1888 | array: None, |
1889 | enumm: None, |
1890 | }, |
1891 | Field { |
1892 | name: "sd0pid_sevnfrm" , |
1893 | description: Some( |
1894 | "SD0PID/SEVNFRM" , |
1895 | ), |
1896 | bit_offset: BitOffset::Regular( |
1897 | RegularBitOffset { |
1898 | offset: 28, |
1899 | }, |
1900 | ), |
1901 | bit_size: 1, |
1902 | array: None, |
1903 | enumm: None, |
1904 | }, |
1905 | Field { |
1906 | name: "soddfrm_sd1pid" , |
1907 | description: Some( |
1908 | "SODDFRM/SD1PID" , |
1909 | ), |
1910 | bit_offset: BitOffset::Regular( |
1911 | RegularBitOffset { |
1912 | offset: 29, |
1913 | }, |
1914 | ), |
1915 | bit_size: 1, |
1916 | array: None, |
1917 | enumm: None, |
1918 | }, |
1919 | Field { |
1920 | name: "epdis" , |
1921 | description: Some( |
1922 | "EPDIS" , |
1923 | ), |
1924 | bit_offset: BitOffset::Regular( |
1925 | RegularBitOffset { |
1926 | offset: 30, |
1927 | }, |
1928 | ), |
1929 | bit_size: 1, |
1930 | array: None, |
1931 | enumm: None, |
1932 | }, |
1933 | Field { |
1934 | name: "epena" , |
1935 | description: Some( |
1936 | "EPENA" , |
1937 | ), |
1938 | bit_offset: BitOffset::Regular( |
1939 | RegularBitOffset { |
1940 | offset: 31, |
1941 | }, |
1942 | ), |
1943 | bit_size: 1, |
1944 | array: None, |
1945 | enumm: None, |
1946 | }, |
1947 | ], |
1948 | }, |
1949 | FieldSet { |
1950 | name: "Diepempmsk" , |
1951 | extends: None, |
1952 | description: Some( |
1953 | "Device IN endpoint FIFO empty interrupt mask register" , |
1954 | ), |
1955 | bit_size: 32, |
1956 | fields: &[ |
1957 | Field { |
1958 | name: "ineptxfem" , |
1959 | description: Some( |
1960 | "IN EP Tx FIFO empty interrupt mask bits" , |
1961 | ), |
1962 | bit_offset: BitOffset::Regular( |
1963 | RegularBitOffset { |
1964 | offset: 0, |
1965 | }, |
1966 | ), |
1967 | bit_size: 16, |
1968 | array: None, |
1969 | enumm: None, |
1970 | }, |
1971 | ], |
1972 | }, |
1973 | FieldSet { |
1974 | name: "Diepint" , |
1975 | extends: None, |
1976 | description: Some( |
1977 | "Device endpoint interrupt register" , |
1978 | ), |
1979 | bit_size: 32, |
1980 | fields: &[ |
1981 | Field { |
1982 | name: "xfrc" , |
1983 | description: Some( |
1984 | "XFRC" , |
1985 | ), |
1986 | bit_offset: BitOffset::Regular( |
1987 | RegularBitOffset { |
1988 | offset: 0, |
1989 | }, |
1990 | ), |
1991 | bit_size: 1, |
1992 | array: None, |
1993 | enumm: None, |
1994 | }, |
1995 | Field { |
1996 | name: "epdisd" , |
1997 | description: Some( |
1998 | "EPDISD" , |
1999 | ), |
2000 | bit_offset: BitOffset::Regular( |
2001 | RegularBitOffset { |
2002 | offset: 1, |
2003 | }, |
2004 | ), |
2005 | bit_size: 1, |
2006 | array: None, |
2007 | enumm: None, |
2008 | }, |
2009 | Field { |
2010 | name: "toc" , |
2011 | description: Some( |
2012 | "TOC" , |
2013 | ), |
2014 | bit_offset: BitOffset::Regular( |
2015 | RegularBitOffset { |
2016 | offset: 3, |
2017 | }, |
2018 | ), |
2019 | bit_size: 1, |
2020 | array: None, |
2021 | enumm: None, |
2022 | }, |
2023 | Field { |
2024 | name: "ittxfe" , |
2025 | description: Some( |
2026 | "ITTXFE" , |
2027 | ), |
2028 | bit_offset: BitOffset::Regular( |
2029 | RegularBitOffset { |
2030 | offset: 4, |
2031 | }, |
2032 | ), |
2033 | bit_size: 1, |
2034 | array: None, |
2035 | enumm: None, |
2036 | }, |
2037 | Field { |
2038 | name: "inepne" , |
2039 | description: Some( |
2040 | "INEPNE" , |
2041 | ), |
2042 | bit_offset: BitOffset::Regular( |
2043 | RegularBitOffset { |
2044 | offset: 6, |
2045 | }, |
2046 | ), |
2047 | bit_size: 1, |
2048 | array: None, |
2049 | enumm: None, |
2050 | }, |
2051 | Field { |
2052 | name: "txfe" , |
2053 | description: Some( |
2054 | "TXFE" , |
2055 | ), |
2056 | bit_offset: BitOffset::Regular( |
2057 | RegularBitOffset { |
2058 | offset: 7, |
2059 | }, |
2060 | ), |
2061 | bit_size: 1, |
2062 | array: None, |
2063 | enumm: None, |
2064 | }, |
2065 | ], |
2066 | }, |
2067 | FieldSet { |
2068 | name: "Diepmsk" , |
2069 | extends: None, |
2070 | description: Some( |
2071 | "Device IN endpoint common interrupt mask register" , |
2072 | ), |
2073 | bit_size: 32, |
2074 | fields: &[ |
2075 | Field { |
2076 | name: "xfrcm" , |
2077 | description: Some( |
2078 | "Transfer completed interrupt mask" , |
2079 | ), |
2080 | bit_offset: BitOffset::Regular( |
2081 | RegularBitOffset { |
2082 | offset: 0, |
2083 | }, |
2084 | ), |
2085 | bit_size: 1, |
2086 | array: None, |
2087 | enumm: None, |
2088 | }, |
2089 | Field { |
2090 | name: "epdm" , |
2091 | description: Some( |
2092 | "Endpoint disabled interrupt mask" , |
2093 | ), |
2094 | bit_offset: BitOffset::Regular( |
2095 | RegularBitOffset { |
2096 | offset: 1, |
2097 | }, |
2098 | ), |
2099 | bit_size: 1, |
2100 | array: None, |
2101 | enumm: None, |
2102 | }, |
2103 | Field { |
2104 | name: "tom" , |
2105 | description: Some( |
2106 | "Timeout condition mask (Non-isochronous endpoints)" , |
2107 | ), |
2108 | bit_offset: BitOffset::Regular( |
2109 | RegularBitOffset { |
2110 | offset: 3, |
2111 | }, |
2112 | ), |
2113 | bit_size: 1, |
2114 | array: None, |
2115 | enumm: None, |
2116 | }, |
2117 | Field { |
2118 | name: "ittxfemsk" , |
2119 | description: Some( |
2120 | "IN token received when TxFIFO empty mask" , |
2121 | ), |
2122 | bit_offset: BitOffset::Regular( |
2123 | RegularBitOffset { |
2124 | offset: 4, |
2125 | }, |
2126 | ), |
2127 | bit_size: 1, |
2128 | array: None, |
2129 | enumm: None, |
2130 | }, |
2131 | Field { |
2132 | name: "inepnmm" , |
2133 | description: Some( |
2134 | "IN token received with EP mismatch mask" , |
2135 | ), |
2136 | bit_offset: BitOffset::Regular( |
2137 | RegularBitOffset { |
2138 | offset: 5, |
2139 | }, |
2140 | ), |
2141 | bit_size: 1, |
2142 | array: None, |
2143 | enumm: None, |
2144 | }, |
2145 | Field { |
2146 | name: "inepnem" , |
2147 | description: Some( |
2148 | "IN endpoint NAK effective mask" , |
2149 | ), |
2150 | bit_offset: BitOffset::Regular( |
2151 | RegularBitOffset { |
2152 | offset: 6, |
2153 | }, |
2154 | ), |
2155 | bit_size: 1, |
2156 | array: None, |
2157 | enumm: None, |
2158 | }, |
2159 | ], |
2160 | }, |
2161 | FieldSet { |
2162 | name: "Dieptsiz" , |
2163 | extends: None, |
2164 | description: Some( |
2165 | "Device endpoint transfer size register" , |
2166 | ), |
2167 | bit_size: 32, |
2168 | fields: &[ |
2169 | Field { |
2170 | name: "xfrsiz" , |
2171 | description: Some( |
2172 | "Transfer size" , |
2173 | ), |
2174 | bit_offset: BitOffset::Regular( |
2175 | RegularBitOffset { |
2176 | offset: 0, |
2177 | }, |
2178 | ), |
2179 | bit_size: 19, |
2180 | array: None, |
2181 | enumm: None, |
2182 | }, |
2183 | Field { |
2184 | name: "pktcnt" , |
2185 | description: Some( |
2186 | "Packet count" , |
2187 | ), |
2188 | bit_offset: BitOffset::Regular( |
2189 | RegularBitOffset { |
2190 | offset: 19, |
2191 | }, |
2192 | ), |
2193 | bit_size: 10, |
2194 | array: None, |
2195 | enumm: None, |
2196 | }, |
2197 | Field { |
2198 | name: "mcnt" , |
2199 | description: Some( |
2200 | "Multi count" , |
2201 | ), |
2202 | bit_offset: BitOffset::Regular( |
2203 | RegularBitOffset { |
2204 | offset: 29, |
2205 | }, |
2206 | ), |
2207 | bit_size: 2, |
2208 | array: None, |
2209 | enumm: None, |
2210 | }, |
2211 | ], |
2212 | }, |
2213 | FieldSet { |
2214 | name: "Doepctl" , |
2215 | extends: None, |
2216 | description: Some( |
2217 | "Device endpoint control register" , |
2218 | ), |
2219 | bit_size: 32, |
2220 | fields: &[ |
2221 | Field { |
2222 | name: "mpsiz" , |
2223 | description: Some( |
2224 | "MPSIZ" , |
2225 | ), |
2226 | bit_offset: BitOffset::Regular( |
2227 | RegularBitOffset { |
2228 | offset: 0, |
2229 | }, |
2230 | ), |
2231 | bit_size: 11, |
2232 | array: None, |
2233 | enumm: None, |
2234 | }, |
2235 | Field { |
2236 | name: "usbaep" , |
2237 | description: Some( |
2238 | "USBAEP" , |
2239 | ), |
2240 | bit_offset: BitOffset::Regular( |
2241 | RegularBitOffset { |
2242 | offset: 15, |
2243 | }, |
2244 | ), |
2245 | bit_size: 1, |
2246 | array: None, |
2247 | enumm: None, |
2248 | }, |
2249 | Field { |
2250 | name: "eonum_dpid" , |
2251 | description: Some( |
2252 | "EONUM/DPID" , |
2253 | ), |
2254 | bit_offset: BitOffset::Regular( |
2255 | RegularBitOffset { |
2256 | offset: 16, |
2257 | }, |
2258 | ), |
2259 | bit_size: 1, |
2260 | array: None, |
2261 | enumm: None, |
2262 | }, |
2263 | Field { |
2264 | name: "naksts" , |
2265 | description: Some( |
2266 | "NAKSTS" , |
2267 | ), |
2268 | bit_offset: BitOffset::Regular( |
2269 | RegularBitOffset { |
2270 | offset: 17, |
2271 | }, |
2272 | ), |
2273 | bit_size: 1, |
2274 | array: None, |
2275 | enumm: None, |
2276 | }, |
2277 | Field { |
2278 | name: "eptyp" , |
2279 | description: Some( |
2280 | "EPTYP" , |
2281 | ), |
2282 | bit_offset: BitOffset::Regular( |
2283 | RegularBitOffset { |
2284 | offset: 18, |
2285 | }, |
2286 | ), |
2287 | bit_size: 2, |
2288 | array: None, |
2289 | enumm: Some( |
2290 | "Eptyp" , |
2291 | ), |
2292 | }, |
2293 | Field { |
2294 | name: "snpm" , |
2295 | description: Some( |
2296 | "SNPM" , |
2297 | ), |
2298 | bit_offset: BitOffset::Regular( |
2299 | RegularBitOffset { |
2300 | offset: 20, |
2301 | }, |
2302 | ), |
2303 | bit_size: 1, |
2304 | array: None, |
2305 | enumm: None, |
2306 | }, |
2307 | Field { |
2308 | name: "stall" , |
2309 | description: Some( |
2310 | "STALL" , |
2311 | ), |
2312 | bit_offset: BitOffset::Regular( |
2313 | RegularBitOffset { |
2314 | offset: 21, |
2315 | }, |
2316 | ), |
2317 | bit_size: 1, |
2318 | array: None, |
2319 | enumm: None, |
2320 | }, |
2321 | Field { |
2322 | name: "cnak" , |
2323 | description: Some( |
2324 | "CNAK" , |
2325 | ), |
2326 | bit_offset: BitOffset::Regular( |
2327 | RegularBitOffset { |
2328 | offset: 26, |
2329 | }, |
2330 | ), |
2331 | bit_size: 1, |
2332 | array: None, |
2333 | enumm: None, |
2334 | }, |
2335 | Field { |
2336 | name: "snak" , |
2337 | description: Some( |
2338 | "SNAK" , |
2339 | ), |
2340 | bit_offset: BitOffset::Regular( |
2341 | RegularBitOffset { |
2342 | offset: 27, |
2343 | }, |
2344 | ), |
2345 | bit_size: 1, |
2346 | array: None, |
2347 | enumm: None, |
2348 | }, |
2349 | Field { |
2350 | name: "sd0pid_sevnfrm" , |
2351 | description: Some( |
2352 | "SD0PID/SEVNFRM" , |
2353 | ), |
2354 | bit_offset: BitOffset::Regular( |
2355 | RegularBitOffset { |
2356 | offset: 28, |
2357 | }, |
2358 | ), |
2359 | bit_size: 1, |
2360 | array: None, |
2361 | enumm: None, |
2362 | }, |
2363 | Field { |
2364 | name: "soddfrm" , |
2365 | description: Some( |
2366 | "SODDFRM" , |
2367 | ), |
2368 | bit_offset: BitOffset::Regular( |
2369 | RegularBitOffset { |
2370 | offset: 29, |
2371 | }, |
2372 | ), |
2373 | bit_size: 1, |
2374 | array: None, |
2375 | enumm: None, |
2376 | }, |
2377 | Field { |
2378 | name: "epdis" , |
2379 | description: Some( |
2380 | "EPDIS" , |
2381 | ), |
2382 | bit_offset: BitOffset::Regular( |
2383 | RegularBitOffset { |
2384 | offset: 30, |
2385 | }, |
2386 | ), |
2387 | bit_size: 1, |
2388 | array: None, |
2389 | enumm: None, |
2390 | }, |
2391 | Field { |
2392 | name: "epena" , |
2393 | description: Some( |
2394 | "EPENA" , |
2395 | ), |
2396 | bit_offset: BitOffset::Regular( |
2397 | RegularBitOffset { |
2398 | offset: 31, |
2399 | }, |
2400 | ), |
2401 | bit_size: 1, |
2402 | array: None, |
2403 | enumm: None, |
2404 | }, |
2405 | ], |
2406 | }, |
2407 | FieldSet { |
2408 | name: "Doepint" , |
2409 | extends: None, |
2410 | description: Some( |
2411 | "Device endpoint interrupt register" , |
2412 | ), |
2413 | bit_size: 32, |
2414 | fields: &[ |
2415 | Field { |
2416 | name: "xfrc" , |
2417 | description: Some( |
2418 | "XFRC" , |
2419 | ), |
2420 | bit_offset: BitOffset::Regular( |
2421 | RegularBitOffset { |
2422 | offset: 0, |
2423 | }, |
2424 | ), |
2425 | bit_size: 1, |
2426 | array: None, |
2427 | enumm: None, |
2428 | }, |
2429 | Field { |
2430 | name: "epdisd" , |
2431 | description: Some( |
2432 | "EPDISD" , |
2433 | ), |
2434 | bit_offset: BitOffset::Regular( |
2435 | RegularBitOffset { |
2436 | offset: 1, |
2437 | }, |
2438 | ), |
2439 | bit_size: 1, |
2440 | array: None, |
2441 | enumm: None, |
2442 | }, |
2443 | Field { |
2444 | name: "stup" , |
2445 | description: Some( |
2446 | "STUP" , |
2447 | ), |
2448 | bit_offset: BitOffset::Regular( |
2449 | RegularBitOffset { |
2450 | offset: 3, |
2451 | }, |
2452 | ), |
2453 | bit_size: 1, |
2454 | array: None, |
2455 | enumm: None, |
2456 | }, |
2457 | Field { |
2458 | name: "otepdis" , |
2459 | description: Some( |
2460 | "OTEPDIS" , |
2461 | ), |
2462 | bit_offset: BitOffset::Regular( |
2463 | RegularBitOffset { |
2464 | offset: 4, |
2465 | }, |
2466 | ), |
2467 | bit_size: 1, |
2468 | array: None, |
2469 | enumm: None, |
2470 | }, |
2471 | Field { |
2472 | name: "b2bstup" , |
2473 | description: Some( |
2474 | "B2BSTUP" , |
2475 | ), |
2476 | bit_offset: BitOffset::Regular( |
2477 | RegularBitOffset { |
2478 | offset: 6, |
2479 | }, |
2480 | ), |
2481 | bit_size: 1, |
2482 | array: None, |
2483 | enumm: None, |
2484 | }, |
2485 | ], |
2486 | }, |
2487 | FieldSet { |
2488 | name: "Doepmsk" , |
2489 | extends: None, |
2490 | description: Some( |
2491 | "Device OUT endpoint common interrupt mask register" , |
2492 | ), |
2493 | bit_size: 32, |
2494 | fields: &[ |
2495 | Field { |
2496 | name: "xfrcm" , |
2497 | description: Some( |
2498 | "Transfer completed interrupt mask" , |
2499 | ), |
2500 | bit_offset: BitOffset::Regular( |
2501 | RegularBitOffset { |
2502 | offset: 0, |
2503 | }, |
2504 | ), |
2505 | bit_size: 1, |
2506 | array: None, |
2507 | enumm: None, |
2508 | }, |
2509 | Field { |
2510 | name: "epdm" , |
2511 | description: Some( |
2512 | "Endpoint disabled interrupt mask" , |
2513 | ), |
2514 | bit_offset: BitOffset::Regular( |
2515 | RegularBitOffset { |
2516 | offset: 1, |
2517 | }, |
2518 | ), |
2519 | bit_size: 1, |
2520 | array: None, |
2521 | enumm: None, |
2522 | }, |
2523 | Field { |
2524 | name: "stupm" , |
2525 | description: Some( |
2526 | "SETUP phase done mask" , |
2527 | ), |
2528 | bit_offset: BitOffset::Regular( |
2529 | RegularBitOffset { |
2530 | offset: 3, |
2531 | }, |
2532 | ), |
2533 | bit_size: 1, |
2534 | array: None, |
2535 | enumm: None, |
2536 | }, |
2537 | Field { |
2538 | name: "otepdm" , |
2539 | description: Some( |
2540 | "OUT token received when endpoint disabled mask" , |
2541 | ), |
2542 | bit_offset: BitOffset::Regular( |
2543 | RegularBitOffset { |
2544 | offset: 4, |
2545 | }, |
2546 | ), |
2547 | bit_size: 1, |
2548 | array: None, |
2549 | enumm: None, |
2550 | }, |
2551 | ], |
2552 | }, |
2553 | FieldSet { |
2554 | name: "Doeptsiz" , |
2555 | extends: None, |
2556 | description: Some( |
2557 | "Device OUT endpoint transfer size register" , |
2558 | ), |
2559 | bit_size: 32, |
2560 | fields: &[ |
2561 | Field { |
2562 | name: "xfrsiz" , |
2563 | description: Some( |
2564 | "Transfer size" , |
2565 | ), |
2566 | bit_offset: BitOffset::Regular( |
2567 | RegularBitOffset { |
2568 | offset: 0, |
2569 | }, |
2570 | ), |
2571 | bit_size: 19, |
2572 | array: None, |
2573 | enumm: None, |
2574 | }, |
2575 | Field { |
2576 | name: "pktcnt" , |
2577 | description: Some( |
2578 | "Packet count" , |
2579 | ), |
2580 | bit_offset: BitOffset::Regular( |
2581 | RegularBitOffset { |
2582 | offset: 19, |
2583 | }, |
2584 | ), |
2585 | bit_size: 10, |
2586 | array: None, |
2587 | enumm: None, |
2588 | }, |
2589 | Field { |
2590 | name: "rxdpid_stupcnt" , |
2591 | description: Some( |
2592 | "Received data PID/SETUP packet count" , |
2593 | ), |
2594 | bit_offset: BitOffset::Regular( |
2595 | RegularBitOffset { |
2596 | offset: 29, |
2597 | }, |
2598 | ), |
2599 | bit_size: 2, |
2600 | array: None, |
2601 | enumm: None, |
2602 | }, |
2603 | ], |
2604 | }, |
2605 | FieldSet { |
2606 | name: "Dsts" , |
2607 | extends: None, |
2608 | description: Some( |
2609 | "Device status register" , |
2610 | ), |
2611 | bit_size: 32, |
2612 | fields: &[ |
2613 | Field { |
2614 | name: "suspsts" , |
2615 | description: Some( |
2616 | "Suspend status" , |
2617 | ), |
2618 | bit_offset: BitOffset::Regular( |
2619 | RegularBitOffset { |
2620 | offset: 0, |
2621 | }, |
2622 | ), |
2623 | bit_size: 1, |
2624 | array: None, |
2625 | enumm: None, |
2626 | }, |
2627 | Field { |
2628 | name: "enumspd" , |
2629 | description: Some( |
2630 | "Enumerated speed" , |
2631 | ), |
2632 | bit_offset: BitOffset::Regular( |
2633 | RegularBitOffset { |
2634 | offset: 1, |
2635 | }, |
2636 | ), |
2637 | bit_size: 2, |
2638 | array: None, |
2639 | enumm: Some( |
2640 | "Dspd" , |
2641 | ), |
2642 | }, |
2643 | Field { |
2644 | name: "eerr" , |
2645 | description: Some( |
2646 | "Erratic error" , |
2647 | ), |
2648 | bit_offset: BitOffset::Regular( |
2649 | RegularBitOffset { |
2650 | offset: 3, |
2651 | }, |
2652 | ), |
2653 | bit_size: 1, |
2654 | array: None, |
2655 | enumm: None, |
2656 | }, |
2657 | Field { |
2658 | name: "fnsof" , |
2659 | description: Some( |
2660 | "Frame number of the received SOF" , |
2661 | ), |
2662 | bit_offset: BitOffset::Regular( |
2663 | RegularBitOffset { |
2664 | offset: 8, |
2665 | }, |
2666 | ), |
2667 | bit_size: 14, |
2668 | array: None, |
2669 | enumm: None, |
2670 | }, |
2671 | ], |
2672 | }, |
2673 | FieldSet { |
2674 | name: "Dtxfsts" , |
2675 | extends: None, |
2676 | description: Some( |
2677 | "Device IN endpoint transmit FIFO status register" , |
2678 | ), |
2679 | bit_size: 32, |
2680 | fields: &[ |
2681 | Field { |
2682 | name: "ineptfsav" , |
2683 | description: Some( |
2684 | "IN endpoint TxFIFO space available" , |
2685 | ), |
2686 | bit_offset: BitOffset::Regular( |
2687 | RegularBitOffset { |
2688 | offset: 0, |
2689 | }, |
2690 | ), |
2691 | bit_size: 16, |
2692 | array: None, |
2693 | enumm: None, |
2694 | }, |
2695 | ], |
2696 | }, |
2697 | FieldSet { |
2698 | name: "Dvbusdis" , |
2699 | extends: None, |
2700 | description: Some( |
2701 | "Device VBUS discharge time register" , |
2702 | ), |
2703 | bit_size: 32, |
2704 | fields: &[ |
2705 | Field { |
2706 | name: "vbusdt" , |
2707 | description: Some( |
2708 | "Device VBUS discharge time" , |
2709 | ), |
2710 | bit_offset: BitOffset::Regular( |
2711 | RegularBitOffset { |
2712 | offset: 0, |
2713 | }, |
2714 | ), |
2715 | bit_size: 16, |
2716 | array: None, |
2717 | enumm: None, |
2718 | }, |
2719 | ], |
2720 | }, |
2721 | FieldSet { |
2722 | name: "Dvbuspulse" , |
2723 | extends: None, |
2724 | description: Some( |
2725 | "Device VBUS pulsing time register" , |
2726 | ), |
2727 | bit_size: 32, |
2728 | fields: &[ |
2729 | Field { |
2730 | name: "dvbusp" , |
2731 | description: Some( |
2732 | "Device VBUS pulsing time" , |
2733 | ), |
2734 | bit_offset: BitOffset::Regular( |
2735 | RegularBitOffset { |
2736 | offset: 0, |
2737 | }, |
2738 | ), |
2739 | bit_size: 12, |
2740 | array: None, |
2741 | enumm: None, |
2742 | }, |
2743 | ], |
2744 | }, |
2745 | FieldSet { |
2746 | name: "Fifo" , |
2747 | extends: None, |
2748 | description: Some( |
2749 | "FIFO register" , |
2750 | ), |
2751 | bit_size: 32, |
2752 | fields: &[ |
2753 | Field { |
2754 | name: "data" , |
2755 | description: Some( |
2756 | "Data" , |
2757 | ), |
2758 | bit_offset: BitOffset::Regular( |
2759 | RegularBitOffset { |
2760 | offset: 0, |
2761 | }, |
2762 | ), |
2763 | bit_size: 32, |
2764 | array: None, |
2765 | enumm: None, |
2766 | }, |
2767 | ], |
2768 | }, |
2769 | FieldSet { |
2770 | name: "Fsiz" , |
2771 | extends: None, |
2772 | description: Some( |
2773 | "FIFO size register" , |
2774 | ), |
2775 | bit_size: 32, |
2776 | fields: &[ |
2777 | Field { |
2778 | name: "sa" , |
2779 | description: Some( |
2780 | "RAM start address" , |
2781 | ), |
2782 | bit_offset: BitOffset::Regular( |
2783 | RegularBitOffset { |
2784 | offset: 0, |
2785 | }, |
2786 | ), |
2787 | bit_size: 16, |
2788 | array: None, |
2789 | enumm: None, |
2790 | }, |
2791 | Field { |
2792 | name: "fd" , |
2793 | description: Some( |
2794 | "FIFO depth" , |
2795 | ), |
2796 | bit_offset: BitOffset::Regular( |
2797 | RegularBitOffset { |
2798 | offset: 16, |
2799 | }, |
2800 | ), |
2801 | bit_size: 16, |
2802 | array: None, |
2803 | enumm: None, |
2804 | }, |
2805 | ], |
2806 | }, |
2807 | FieldSet { |
2808 | name: "Gahbcfg" , |
2809 | extends: None, |
2810 | description: Some( |
2811 | "AHB configuration register" , |
2812 | ), |
2813 | bit_size: 32, |
2814 | fields: &[ |
2815 | Field { |
2816 | name: "gint" , |
2817 | description: Some( |
2818 | "Global interrupt mask" , |
2819 | ), |
2820 | bit_offset: BitOffset::Regular( |
2821 | RegularBitOffset { |
2822 | offset: 0, |
2823 | }, |
2824 | ), |
2825 | bit_size: 1, |
2826 | array: None, |
2827 | enumm: None, |
2828 | }, |
2829 | Field { |
2830 | name: "hbstlen" , |
2831 | description: Some( |
2832 | "Burst length/type" , |
2833 | ), |
2834 | bit_offset: BitOffset::Regular( |
2835 | RegularBitOffset { |
2836 | offset: 1, |
2837 | }, |
2838 | ), |
2839 | bit_size: 4, |
2840 | array: None, |
2841 | enumm: None, |
2842 | }, |
2843 | Field { |
2844 | name: "dmaen" , |
2845 | description: Some( |
2846 | "DMA enable" , |
2847 | ), |
2848 | bit_offset: BitOffset::Regular( |
2849 | RegularBitOffset { |
2850 | offset: 5, |
2851 | }, |
2852 | ), |
2853 | bit_size: 1, |
2854 | array: None, |
2855 | enumm: None, |
2856 | }, |
2857 | Field { |
2858 | name: "txfelvl" , |
2859 | description: Some( |
2860 | "TxFIFO empty level" , |
2861 | ), |
2862 | bit_offset: BitOffset::Regular( |
2863 | RegularBitOffset { |
2864 | offset: 7, |
2865 | }, |
2866 | ), |
2867 | bit_size: 1, |
2868 | array: None, |
2869 | enumm: None, |
2870 | }, |
2871 | Field { |
2872 | name: "ptxfelvl" , |
2873 | description: Some( |
2874 | "Periodic TxFIFO empty level" , |
2875 | ), |
2876 | bit_offset: BitOffset::Regular( |
2877 | RegularBitOffset { |
2878 | offset: 8, |
2879 | }, |
2880 | ), |
2881 | bit_size: 1, |
2882 | array: None, |
2883 | enumm: None, |
2884 | }, |
2885 | ], |
2886 | }, |
2887 | FieldSet { |
2888 | name: "GccfgV1" , |
2889 | extends: None, |
2890 | description: Some( |
2891 | "General core configuration register" , |
2892 | ), |
2893 | bit_size: 32, |
2894 | fields: &[ |
2895 | Field { |
2896 | name: "pwrdwn" , |
2897 | description: Some( |
2898 | "Power down" , |
2899 | ), |
2900 | bit_offset: BitOffset::Regular( |
2901 | RegularBitOffset { |
2902 | offset: 16, |
2903 | }, |
2904 | ), |
2905 | bit_size: 1, |
2906 | array: None, |
2907 | enumm: None, |
2908 | }, |
2909 | Field { |
2910 | name: "vbusasen" , |
2911 | description: Some( |
2912 | "Enable the VBUS \"A \" sensing device" , |
2913 | ), |
2914 | bit_offset: BitOffset::Regular( |
2915 | RegularBitOffset { |
2916 | offset: 18, |
2917 | }, |
2918 | ), |
2919 | bit_size: 1, |
2920 | array: None, |
2921 | enumm: None, |
2922 | }, |
2923 | Field { |
2924 | name: "vbusbsen" , |
2925 | description: Some( |
2926 | "Enable the VBUS \"B \" sensing device" , |
2927 | ), |
2928 | bit_offset: BitOffset::Regular( |
2929 | RegularBitOffset { |
2930 | offset: 19, |
2931 | }, |
2932 | ), |
2933 | bit_size: 1, |
2934 | array: None, |
2935 | enumm: None, |
2936 | }, |
2937 | Field { |
2938 | name: "sofouten" , |
2939 | description: Some( |
2940 | "SOF output enable" , |
2941 | ), |
2942 | bit_offset: BitOffset::Regular( |
2943 | RegularBitOffset { |
2944 | offset: 20, |
2945 | }, |
2946 | ), |
2947 | bit_size: 1, |
2948 | array: None, |
2949 | enumm: None, |
2950 | }, |
2951 | Field { |
2952 | name: "novbussens" , |
2953 | description: Some( |
2954 | "VBUS sensing disable" , |
2955 | ), |
2956 | bit_offset: BitOffset::Regular( |
2957 | RegularBitOffset { |
2958 | offset: 21, |
2959 | }, |
2960 | ), |
2961 | bit_size: 1, |
2962 | array: None, |
2963 | enumm: None, |
2964 | }, |
2965 | ], |
2966 | }, |
2967 | FieldSet { |
2968 | name: "GccfgV2" , |
2969 | extends: None, |
2970 | description: Some( |
2971 | "General core configuration register" , |
2972 | ), |
2973 | bit_size: 32, |
2974 | fields: &[ |
2975 | Field { |
2976 | name: "dcdet" , |
2977 | description: Some( |
2978 | "Data contact detection (DCD) status" , |
2979 | ), |
2980 | bit_offset: BitOffset::Regular( |
2981 | RegularBitOffset { |
2982 | offset: 0, |
2983 | }, |
2984 | ), |
2985 | bit_size: 1, |
2986 | array: None, |
2987 | enumm: None, |
2988 | }, |
2989 | Field { |
2990 | name: "pdet" , |
2991 | description: Some( |
2992 | "Primary detection (PD) status" , |
2993 | ), |
2994 | bit_offset: BitOffset::Regular( |
2995 | RegularBitOffset { |
2996 | offset: 1, |
2997 | }, |
2998 | ), |
2999 | bit_size: 1, |
3000 | array: None, |
3001 | enumm: None, |
3002 | }, |
3003 | Field { |
3004 | name: "sdet" , |
3005 | description: Some( |
3006 | "Secondary detection (SD) status" , |
3007 | ), |
3008 | bit_offset: BitOffset::Regular( |
3009 | RegularBitOffset { |
3010 | offset: 2, |
3011 | }, |
3012 | ), |
3013 | bit_size: 1, |
3014 | array: None, |
3015 | enumm: None, |
3016 | }, |
3017 | Field { |
3018 | name: "ps2det" , |
3019 | description: Some( |
3020 | "DM pull-up detection status" , |
3021 | ), |
3022 | bit_offset: BitOffset::Regular( |
3023 | RegularBitOffset { |
3024 | offset: 3, |
3025 | }, |
3026 | ), |
3027 | bit_size: 1, |
3028 | array: None, |
3029 | enumm: None, |
3030 | }, |
3031 | Field { |
3032 | name: "pwrdwn" , |
3033 | description: Some( |
3034 | "Power down" , |
3035 | ), |
3036 | bit_offset: BitOffset::Regular( |
3037 | RegularBitOffset { |
3038 | offset: 16, |
3039 | }, |
3040 | ), |
3041 | bit_size: 1, |
3042 | array: None, |
3043 | enumm: None, |
3044 | }, |
3045 | Field { |
3046 | name: "bcden" , |
3047 | description: Some( |
3048 | "Battery charging detector (BCD) enable" , |
3049 | ), |
3050 | bit_offset: BitOffset::Regular( |
3051 | RegularBitOffset { |
3052 | offset: 17, |
3053 | }, |
3054 | ), |
3055 | bit_size: 1, |
3056 | array: None, |
3057 | enumm: None, |
3058 | }, |
3059 | Field { |
3060 | name: "dcden" , |
3061 | description: Some( |
3062 | "Data contact detection (DCD) mode enable" , |
3063 | ), |
3064 | bit_offset: BitOffset::Regular( |
3065 | RegularBitOffset { |
3066 | offset: 18, |
3067 | }, |
3068 | ), |
3069 | bit_size: 1, |
3070 | array: None, |
3071 | enumm: None, |
3072 | }, |
3073 | Field { |
3074 | name: "pden" , |
3075 | description: Some( |
3076 | "Primary detection (PD) mode enable" , |
3077 | ), |
3078 | bit_offset: BitOffset::Regular( |
3079 | RegularBitOffset { |
3080 | offset: 19, |
3081 | }, |
3082 | ), |
3083 | bit_size: 1, |
3084 | array: None, |
3085 | enumm: None, |
3086 | }, |
3087 | Field { |
3088 | name: "sden" , |
3089 | description: Some( |
3090 | "Secondary detection (SD) mode enable" , |
3091 | ), |
3092 | bit_offset: BitOffset::Regular( |
3093 | RegularBitOffset { |
3094 | offset: 20, |
3095 | }, |
3096 | ), |
3097 | bit_size: 1, |
3098 | array: None, |
3099 | enumm: None, |
3100 | }, |
3101 | Field { |
3102 | name: "vbden" , |
3103 | description: Some( |
3104 | "USB VBUS detection enable" , |
3105 | ), |
3106 | bit_offset: BitOffset::Regular( |
3107 | RegularBitOffset { |
3108 | offset: 21, |
3109 | }, |
3110 | ), |
3111 | bit_size: 1, |
3112 | array: None, |
3113 | enumm: None, |
3114 | }, |
3115 | Field { |
3116 | name: "phyhsen" , |
3117 | description: Some( |
3118 | "Internal high-speed PHY enable." , |
3119 | ), |
3120 | bit_offset: BitOffset::Regular( |
3121 | RegularBitOffset { |
3122 | offset: 23, |
3123 | }, |
3124 | ), |
3125 | bit_size: 1, |
3126 | array: None, |
3127 | enumm: None, |
3128 | }, |
3129 | ], |
3130 | }, |
3131 | FieldSet { |
3132 | name: "GccfgV3" , |
3133 | extends: None, |
3134 | description: Some( |
3135 | "OTG general core configuration register." , |
3136 | ), |
3137 | bit_size: 32, |
3138 | fields: &[ |
3139 | Field { |
3140 | name: "chgdet" , |
3141 | description: Some( |
3142 | "Charger detection, result of the current mode (primary or secondary)." , |
3143 | ), |
3144 | bit_offset: BitOffset::Regular( |
3145 | RegularBitOffset { |
3146 | offset: 0, |
3147 | }, |
3148 | ), |
3149 | bit_size: 1, |
3150 | array: None, |
3151 | enumm: None, |
3152 | }, |
3153 | Field { |
3154 | name: "fsvplus" , |
3155 | description: Some( |
3156 | "Single-Ended DP indicator This bit gives the voltage level on DP (also result of the comparison with V<sub>LGC</sub> threshold as defined in BC v1.2 standard)." , |
3157 | ), |
3158 | bit_offset: BitOffset::Regular( |
3159 | RegularBitOffset { |
3160 | offset: 1, |
3161 | }, |
3162 | ), |
3163 | bit_size: 1, |
3164 | array: None, |
3165 | enumm: None, |
3166 | }, |
3167 | Field { |
3168 | name: "fsvminus" , |
3169 | description: Some( |
3170 | "Single-Ended DM indicator This bit gives the voltage level on DM (also result of the comparison with V<sub>LGC</sub> threshold as defined in BC v1.2 standard)." , |
3171 | ), |
3172 | bit_offset: BitOffset::Regular( |
3173 | RegularBitOffset { |
3174 | offset: 2, |
3175 | }, |
3176 | ), |
3177 | bit_size: 1, |
3178 | array: None, |
3179 | enumm: None, |
3180 | }, |
3181 | Field { |
3182 | name: "sessvld" , |
3183 | description: Some( |
3184 | "VBUS session indicator Indicates if VBUS is above VBUS session threshold." , |
3185 | ), |
3186 | bit_offset: BitOffset::Regular( |
3187 | RegularBitOffset { |
3188 | offset: 3, |
3189 | }, |
3190 | ), |
3191 | bit_size: 1, |
3192 | array: None, |
3193 | enumm: None, |
3194 | }, |
3195 | Field { |
3196 | name: "hcdpen" , |
3197 | description: Some( |
3198 | "Host CDP behavior enable." , |
3199 | ), |
3200 | bit_offset: BitOffset::Regular( |
3201 | RegularBitOffset { |
3202 | offset: 16, |
3203 | }, |
3204 | ), |
3205 | bit_size: 1, |
3206 | array: None, |
3207 | enumm: None, |
3208 | }, |
3209 | Field { |
3210 | name: "hcdpdeten" , |
3211 | description: Some( |
3212 | "Host CDP port voltage detector enable on DP." , |
3213 | ), |
3214 | bit_offset: BitOffset::Regular( |
3215 | RegularBitOffset { |
3216 | offset: 17, |
3217 | }, |
3218 | ), |
3219 | bit_size: 1, |
3220 | array: None, |
3221 | enumm: None, |
3222 | }, |
3223 | Field { |
3224 | name: "hvdmsrcen" , |
3225 | description: Some( |
3226 | "Host CDP port Voltage source enable on DM." , |
3227 | ), |
3228 | bit_offset: BitOffset::Regular( |
3229 | RegularBitOffset { |
3230 | offset: 18, |
3231 | }, |
3232 | ), |
3233 | bit_size: 1, |
3234 | array: None, |
3235 | enumm: None, |
3236 | }, |
3237 | Field { |
3238 | name: "dcden" , |
3239 | description: Some( |
3240 | "Data Contact Detection enable." , |
3241 | ), |
3242 | bit_offset: BitOffset::Regular( |
3243 | RegularBitOffset { |
3244 | offset: 19, |
3245 | }, |
3246 | ), |
3247 | bit_size: 1, |
3248 | array: None, |
3249 | enumm: None, |
3250 | }, |
3251 | Field { |
3252 | name: "pden" , |
3253 | description: Some( |
3254 | "Primary detection enable." , |
3255 | ), |
3256 | bit_offset: BitOffset::Regular( |
3257 | RegularBitOffset { |
3258 | offset: 20, |
3259 | }, |
3260 | ), |
3261 | bit_size: 1, |
3262 | array: None, |
3263 | enumm: None, |
3264 | }, |
3265 | Field { |
3266 | name: "vbden" , |
3267 | description: Some( |
3268 | "VBUS detection enable Enables VBUS Sensing Comparators in order to detect VBUS presence and/or perform OTG operation." , |
3269 | ), |
3270 | bit_offset: BitOffset::Regular( |
3271 | RegularBitOffset { |
3272 | offset: 21, |
3273 | }, |
3274 | ), |
3275 | bit_size: 1, |
3276 | array: None, |
3277 | enumm: None, |
3278 | }, |
3279 | Field { |
3280 | name: "sden" , |
3281 | description: Some( |
3282 | "Secondary detection enable." , |
3283 | ), |
3284 | bit_offset: BitOffset::Regular( |
3285 | RegularBitOffset { |
3286 | offset: 22, |
3287 | }, |
3288 | ), |
3289 | bit_size: 1, |
3290 | array: None, |
3291 | enumm: None, |
3292 | }, |
3293 | Field { |
3294 | name: "vbvaloval" , |
3295 | description: Some( |
3296 | "Software override value of the VBUS B-session detection." , |
3297 | ), |
3298 | bit_offset: BitOffset::Regular( |
3299 | RegularBitOffset { |
3300 | offset: 23, |
3301 | }, |
3302 | ), |
3303 | bit_size: 1, |
3304 | array: None, |
3305 | enumm: None, |
3306 | }, |
3307 | Field { |
3308 | name: "vbvaloven" , |
3309 | description: Some( |
3310 | "Enables a software override of the VBUS B-session detection." , |
3311 | ), |
3312 | bit_offset: BitOffset::Regular( |
3313 | RegularBitOffset { |
3314 | offset: 24, |
3315 | }, |
3316 | ), |
3317 | bit_size: 1, |
3318 | array: None, |
3319 | enumm: None, |
3320 | }, |
3321 | Field { |
3322 | name: "forcehostpd" , |
3323 | description: Some( |
3324 | "Force host mode pull-downs If the ID pin functions are enabled, the host mode pull-downs on DP and DM activate automatically. However, whenever that is not the case, yet host mode is required, this bit must be used to force the pull-downs active." , |
3325 | ), |
3326 | bit_offset: BitOffset::Regular( |
3327 | RegularBitOffset { |
3328 | offset: 25, |
3329 | }, |
3330 | ), |
3331 | bit_size: 1, |
3332 | array: None, |
3333 | enumm: None, |
3334 | }, |
3335 | ], |
3336 | }, |
3337 | FieldSet { |
3338 | name: "Gi2cctl" , |
3339 | extends: None, |
3340 | description: Some( |
3341 | "I2C access register" , |
3342 | ), |
3343 | bit_size: 32, |
3344 | fields: &[ |
3345 | Field { |
3346 | name: "rwdata" , |
3347 | description: Some( |
3348 | "I2C Read/Write Data" , |
3349 | ), |
3350 | bit_offset: BitOffset::Regular( |
3351 | RegularBitOffset { |
3352 | offset: 0, |
3353 | }, |
3354 | ), |
3355 | bit_size: 8, |
3356 | array: None, |
3357 | enumm: None, |
3358 | }, |
3359 | Field { |
3360 | name: "regaddr" , |
3361 | description: Some( |
3362 | "I2C Register Address" , |
3363 | ), |
3364 | bit_offset: BitOffset::Regular( |
3365 | RegularBitOffset { |
3366 | offset: 8, |
3367 | }, |
3368 | ), |
3369 | bit_size: 8, |
3370 | array: None, |
3371 | enumm: None, |
3372 | }, |
3373 | Field { |
3374 | name: "addr" , |
3375 | description: Some( |
3376 | "I2C Address" , |
3377 | ), |
3378 | bit_offset: BitOffset::Regular( |
3379 | RegularBitOffset { |
3380 | offset: 16, |
3381 | }, |
3382 | ), |
3383 | bit_size: 7, |
3384 | array: None, |
3385 | enumm: None, |
3386 | }, |
3387 | Field { |
3388 | name: "i2cen" , |
3389 | description: Some( |
3390 | "I2C Enable" , |
3391 | ), |
3392 | bit_offset: BitOffset::Regular( |
3393 | RegularBitOffset { |
3394 | offset: 23, |
3395 | }, |
3396 | ), |
3397 | bit_size: 1, |
3398 | array: None, |
3399 | enumm: None, |
3400 | }, |
3401 | Field { |
3402 | name: "ack" , |
3403 | description: Some( |
3404 | "I2C ACK" , |
3405 | ), |
3406 | bit_offset: BitOffset::Regular( |
3407 | RegularBitOffset { |
3408 | offset: 24, |
3409 | }, |
3410 | ), |
3411 | bit_size: 1, |
3412 | array: None, |
3413 | enumm: None, |
3414 | }, |
3415 | Field { |
3416 | name: "i2cdevadr" , |
3417 | description: Some( |
3418 | "I2C Device Address" , |
3419 | ), |
3420 | bit_offset: BitOffset::Regular( |
3421 | RegularBitOffset { |
3422 | offset: 26, |
3423 | }, |
3424 | ), |
3425 | bit_size: 2, |
3426 | array: None, |
3427 | enumm: None, |
3428 | }, |
3429 | Field { |
3430 | name: "i2cdatse0" , |
3431 | description: Some( |
3432 | "I2C DatSe0 USB mode" , |
3433 | ), |
3434 | bit_offset: BitOffset::Regular( |
3435 | RegularBitOffset { |
3436 | offset: 28, |
3437 | }, |
3438 | ), |
3439 | bit_size: 1, |
3440 | array: None, |
3441 | enumm: None, |
3442 | }, |
3443 | Field { |
3444 | name: "rw" , |
3445 | description: Some( |
3446 | "Read/Write Indicator" , |
3447 | ), |
3448 | bit_offset: BitOffset::Regular( |
3449 | RegularBitOffset { |
3450 | offset: 30, |
3451 | }, |
3452 | ), |
3453 | bit_size: 1, |
3454 | array: None, |
3455 | enumm: None, |
3456 | }, |
3457 | Field { |
3458 | name: "bsydne" , |
3459 | description: Some( |
3460 | "I2C Busy/Done" , |
3461 | ), |
3462 | bit_offset: BitOffset::Regular( |
3463 | RegularBitOffset { |
3464 | offset: 31, |
3465 | }, |
3466 | ), |
3467 | bit_size: 1, |
3468 | array: None, |
3469 | enumm: None, |
3470 | }, |
3471 | ], |
3472 | }, |
3473 | FieldSet { |
3474 | name: "Gintmsk" , |
3475 | extends: None, |
3476 | description: Some( |
3477 | "Interrupt mask register" , |
3478 | ), |
3479 | bit_size: 32, |
3480 | fields: &[ |
3481 | Field { |
3482 | name: "mmism" , |
3483 | description: Some( |
3484 | "Mode mismatch interrupt mask" , |
3485 | ), |
3486 | bit_offset: BitOffset::Regular( |
3487 | RegularBitOffset { |
3488 | offset: 1, |
3489 | }, |
3490 | ), |
3491 | bit_size: 1, |
3492 | array: None, |
3493 | enumm: None, |
3494 | }, |
3495 | Field { |
3496 | name: "otgint" , |
3497 | description: Some( |
3498 | "OTG interrupt mask" , |
3499 | ), |
3500 | bit_offset: BitOffset::Regular( |
3501 | RegularBitOffset { |
3502 | offset: 2, |
3503 | }, |
3504 | ), |
3505 | bit_size: 1, |
3506 | array: None, |
3507 | enumm: None, |
3508 | }, |
3509 | Field { |
3510 | name: "sofm" , |
3511 | description: Some( |
3512 | "Start of frame mask" , |
3513 | ), |
3514 | bit_offset: BitOffset::Regular( |
3515 | RegularBitOffset { |
3516 | offset: 3, |
3517 | }, |
3518 | ), |
3519 | bit_size: 1, |
3520 | array: None, |
3521 | enumm: None, |
3522 | }, |
3523 | Field { |
3524 | name: "rxflvlm" , |
3525 | description: Some( |
3526 | "Receive FIFO non-empty mask" , |
3527 | ), |
3528 | bit_offset: BitOffset::Regular( |
3529 | RegularBitOffset { |
3530 | offset: 4, |
3531 | }, |
3532 | ), |
3533 | bit_size: 1, |
3534 | array: None, |
3535 | enumm: None, |
3536 | }, |
3537 | Field { |
3538 | name: "nptxfem" , |
3539 | description: Some( |
3540 | "Non-periodic TxFIFO empty mask" , |
3541 | ), |
3542 | bit_offset: BitOffset::Regular( |
3543 | RegularBitOffset { |
3544 | offset: 5, |
3545 | }, |
3546 | ), |
3547 | bit_size: 1, |
3548 | array: None, |
3549 | enumm: None, |
3550 | }, |
3551 | Field { |
3552 | name: "ginakeffm" , |
3553 | description: Some( |
3554 | "Global non-periodic IN NAK effective mask" , |
3555 | ), |
3556 | bit_offset: BitOffset::Regular( |
3557 | RegularBitOffset { |
3558 | offset: 6, |
3559 | }, |
3560 | ), |
3561 | bit_size: 1, |
3562 | array: None, |
3563 | enumm: None, |
3564 | }, |
3565 | Field { |
3566 | name: "gonakeffm" , |
3567 | description: Some( |
3568 | "Global OUT NAK effective mask" , |
3569 | ), |
3570 | bit_offset: BitOffset::Regular( |
3571 | RegularBitOffset { |
3572 | offset: 7, |
3573 | }, |
3574 | ), |
3575 | bit_size: 1, |
3576 | array: None, |
3577 | enumm: None, |
3578 | }, |
3579 | Field { |
3580 | name: "esuspm" , |
3581 | description: Some( |
3582 | "Early suspend mask" , |
3583 | ), |
3584 | bit_offset: BitOffset::Regular( |
3585 | RegularBitOffset { |
3586 | offset: 10, |
3587 | }, |
3588 | ), |
3589 | bit_size: 1, |
3590 | array: None, |
3591 | enumm: None, |
3592 | }, |
3593 | Field { |
3594 | name: "usbsuspm" , |
3595 | description: Some( |
3596 | "USB suspend mask" , |
3597 | ), |
3598 | bit_offset: BitOffset::Regular( |
3599 | RegularBitOffset { |
3600 | offset: 11, |
3601 | }, |
3602 | ), |
3603 | bit_size: 1, |
3604 | array: None, |
3605 | enumm: None, |
3606 | }, |
3607 | Field { |
3608 | name: "usbrst" , |
3609 | description: Some( |
3610 | "USB reset mask" , |
3611 | ), |
3612 | bit_offset: BitOffset::Regular( |
3613 | RegularBitOffset { |
3614 | offset: 12, |
3615 | }, |
3616 | ), |
3617 | bit_size: 1, |
3618 | array: None, |
3619 | enumm: None, |
3620 | }, |
3621 | Field { |
3622 | name: "enumdnem" , |
3623 | description: Some( |
3624 | "Enumeration done mask" , |
3625 | ), |
3626 | bit_offset: BitOffset::Regular( |
3627 | RegularBitOffset { |
3628 | offset: 13, |
3629 | }, |
3630 | ), |
3631 | bit_size: 1, |
3632 | array: None, |
3633 | enumm: None, |
3634 | }, |
3635 | Field { |
3636 | name: "isoodrpm" , |
3637 | description: Some( |
3638 | "Isochronous OUT packet dropped interrupt mask" , |
3639 | ), |
3640 | bit_offset: BitOffset::Regular( |
3641 | RegularBitOffset { |
3642 | offset: 14, |
3643 | }, |
3644 | ), |
3645 | bit_size: 1, |
3646 | array: None, |
3647 | enumm: None, |
3648 | }, |
3649 | Field { |
3650 | name: "eopfm" , |
3651 | description: Some( |
3652 | "End of periodic frame interrupt mask" , |
3653 | ), |
3654 | bit_offset: BitOffset::Regular( |
3655 | RegularBitOffset { |
3656 | offset: 15, |
3657 | }, |
3658 | ), |
3659 | bit_size: 1, |
3660 | array: None, |
3661 | enumm: None, |
3662 | }, |
3663 | Field { |
3664 | name: "epmism" , |
3665 | description: Some( |
3666 | "Endpoint mismatch interrupt mask" , |
3667 | ), |
3668 | bit_offset: BitOffset::Regular( |
3669 | RegularBitOffset { |
3670 | offset: 17, |
3671 | }, |
3672 | ), |
3673 | bit_size: 1, |
3674 | array: None, |
3675 | enumm: None, |
3676 | }, |
3677 | Field { |
3678 | name: "iepint" , |
3679 | description: Some( |
3680 | "IN endpoints interrupt mask" , |
3681 | ), |
3682 | bit_offset: BitOffset::Regular( |
3683 | RegularBitOffset { |
3684 | offset: 18, |
3685 | }, |
3686 | ), |
3687 | bit_size: 1, |
3688 | array: None, |
3689 | enumm: None, |
3690 | }, |
3691 | Field { |
3692 | name: "oepint" , |
3693 | description: Some( |
3694 | "OUT endpoints interrupt mask" , |
3695 | ), |
3696 | bit_offset: BitOffset::Regular( |
3697 | RegularBitOffset { |
3698 | offset: 19, |
3699 | }, |
3700 | ), |
3701 | bit_size: 1, |
3702 | array: None, |
3703 | enumm: None, |
3704 | }, |
3705 | Field { |
3706 | name: "iisoixfrm" , |
3707 | description: Some( |
3708 | "Incomplete isochronous IN transfer mask" , |
3709 | ), |
3710 | bit_offset: BitOffset::Regular( |
3711 | RegularBitOffset { |
3712 | offset: 20, |
3713 | }, |
3714 | ), |
3715 | bit_size: 1, |
3716 | array: None, |
3717 | enumm: None, |
3718 | }, |
3719 | Field { |
3720 | name: "ipxfrm_iisooxfrm" , |
3721 | description: Some( |
3722 | "Incomplete periodic transfer mask (host mode) / Incomplete isochronous OUT transfer mask (device mode)" , |
3723 | ), |
3724 | bit_offset: BitOffset::Regular( |
3725 | RegularBitOffset { |
3726 | offset: 21, |
3727 | }, |
3728 | ), |
3729 | bit_size: 1, |
3730 | array: None, |
3731 | enumm: None, |
3732 | }, |
3733 | Field { |
3734 | name: "fsuspm" , |
3735 | description: Some( |
3736 | "Data fetch suspended mask" , |
3737 | ), |
3738 | bit_offset: BitOffset::Regular( |
3739 | RegularBitOffset { |
3740 | offset: 22, |
3741 | }, |
3742 | ), |
3743 | bit_size: 1, |
3744 | array: None, |
3745 | enumm: None, |
3746 | }, |
3747 | Field { |
3748 | name: "rstde" , |
3749 | description: Some( |
3750 | "Reset detected interrupt mask" , |
3751 | ), |
3752 | bit_offset: BitOffset::Regular( |
3753 | RegularBitOffset { |
3754 | offset: 23, |
3755 | }, |
3756 | ), |
3757 | bit_size: 1, |
3758 | array: None, |
3759 | enumm: None, |
3760 | }, |
3761 | Field { |
3762 | name: "prtim" , |
3763 | description: Some( |
3764 | "Host port interrupt mask" , |
3765 | ), |
3766 | bit_offset: BitOffset::Regular( |
3767 | RegularBitOffset { |
3768 | offset: 24, |
3769 | }, |
3770 | ), |
3771 | bit_size: 1, |
3772 | array: None, |
3773 | enumm: None, |
3774 | }, |
3775 | Field { |
3776 | name: "hcim" , |
3777 | description: Some( |
3778 | "Host channels interrupt mask" , |
3779 | ), |
3780 | bit_offset: BitOffset::Regular( |
3781 | RegularBitOffset { |
3782 | offset: 25, |
3783 | }, |
3784 | ), |
3785 | bit_size: 1, |
3786 | array: None, |
3787 | enumm: None, |
3788 | }, |
3789 | Field { |
3790 | name: "ptxfem" , |
3791 | description: Some( |
3792 | "Periodic TxFIFO empty mask" , |
3793 | ), |
3794 | bit_offset: BitOffset::Regular( |
3795 | RegularBitOffset { |
3796 | offset: 26, |
3797 | }, |
3798 | ), |
3799 | bit_size: 1, |
3800 | array: None, |
3801 | enumm: None, |
3802 | }, |
3803 | Field { |
3804 | name: "lpmintm" , |
3805 | description: Some( |
3806 | "LPM interrupt mask" , |
3807 | ), |
3808 | bit_offset: BitOffset::Regular( |
3809 | RegularBitOffset { |
3810 | offset: 27, |
3811 | }, |
3812 | ), |
3813 | bit_size: 1, |
3814 | array: None, |
3815 | enumm: None, |
3816 | }, |
3817 | Field { |
3818 | name: "cidschgm" , |
3819 | description: Some( |
3820 | "Connector ID status change mask" , |
3821 | ), |
3822 | bit_offset: BitOffset::Regular( |
3823 | RegularBitOffset { |
3824 | offset: 28, |
3825 | }, |
3826 | ), |
3827 | bit_size: 1, |
3828 | array: None, |
3829 | enumm: None, |
3830 | }, |
3831 | Field { |
3832 | name: "discint" , |
3833 | description: Some( |
3834 | "Disconnect detected interrupt mask" , |
3835 | ), |
3836 | bit_offset: BitOffset::Regular( |
3837 | RegularBitOffset { |
3838 | offset: 29, |
3839 | }, |
3840 | ), |
3841 | bit_size: 1, |
3842 | array: None, |
3843 | enumm: None, |
3844 | }, |
3845 | Field { |
3846 | name: "srqim" , |
3847 | description: Some( |
3848 | "Session request/new session detected interrupt mask" , |
3849 | ), |
3850 | bit_offset: BitOffset::Regular( |
3851 | RegularBitOffset { |
3852 | offset: 30, |
3853 | }, |
3854 | ), |
3855 | bit_size: 1, |
3856 | array: None, |
3857 | enumm: None, |
3858 | }, |
3859 | Field { |
3860 | name: "wuim" , |
3861 | description: Some( |
3862 | "Resume/remote wakeup detected interrupt mask" , |
3863 | ), |
3864 | bit_offset: BitOffset::Regular( |
3865 | RegularBitOffset { |
3866 | offset: 31, |
3867 | }, |
3868 | ), |
3869 | bit_size: 1, |
3870 | array: None, |
3871 | enumm: None, |
3872 | }, |
3873 | ], |
3874 | }, |
3875 | FieldSet { |
3876 | name: "Gintsts" , |
3877 | extends: None, |
3878 | description: Some( |
3879 | "Core interrupt register" , |
3880 | ), |
3881 | bit_size: 32, |
3882 | fields: &[ |
3883 | Field { |
3884 | name: "cmod" , |
3885 | description: Some( |
3886 | "Current mode of operation" , |
3887 | ), |
3888 | bit_offset: BitOffset::Regular( |
3889 | RegularBitOffset { |
3890 | offset: 0, |
3891 | }, |
3892 | ), |
3893 | bit_size: 1, |
3894 | array: None, |
3895 | enumm: None, |
3896 | }, |
3897 | Field { |
3898 | name: "mmis" , |
3899 | description: Some( |
3900 | "Mode mismatch interrupt" , |
3901 | ), |
3902 | bit_offset: BitOffset::Regular( |
3903 | RegularBitOffset { |
3904 | offset: 1, |
3905 | }, |
3906 | ), |
3907 | bit_size: 1, |
3908 | array: None, |
3909 | enumm: None, |
3910 | }, |
3911 | Field { |
3912 | name: "otgint" , |
3913 | description: Some( |
3914 | "OTG interrupt" , |
3915 | ), |
3916 | bit_offset: BitOffset::Regular( |
3917 | RegularBitOffset { |
3918 | offset: 2, |
3919 | }, |
3920 | ), |
3921 | bit_size: 1, |
3922 | array: None, |
3923 | enumm: None, |
3924 | }, |
3925 | Field { |
3926 | name: "sof" , |
3927 | description: Some( |
3928 | "Start of frame" , |
3929 | ), |
3930 | bit_offset: BitOffset::Regular( |
3931 | RegularBitOffset { |
3932 | offset: 3, |
3933 | }, |
3934 | ), |
3935 | bit_size: 1, |
3936 | array: None, |
3937 | enumm: None, |
3938 | }, |
3939 | Field { |
3940 | name: "rxflvl" , |
3941 | description: Some( |
3942 | "RxFIFO non-empty" , |
3943 | ), |
3944 | bit_offset: BitOffset::Regular( |
3945 | RegularBitOffset { |
3946 | offset: 4, |
3947 | }, |
3948 | ), |
3949 | bit_size: 1, |
3950 | array: None, |
3951 | enumm: None, |
3952 | }, |
3953 | Field { |
3954 | name: "nptxfe" , |
3955 | description: Some( |
3956 | "Non-periodic TxFIFO empty" , |
3957 | ), |
3958 | bit_offset: BitOffset::Regular( |
3959 | RegularBitOffset { |
3960 | offset: 5, |
3961 | }, |
3962 | ), |
3963 | bit_size: 1, |
3964 | array: None, |
3965 | enumm: None, |
3966 | }, |
3967 | Field { |
3968 | name: "ginakeff" , |
3969 | description: Some( |
3970 | "Global IN non-periodic NAK effective" , |
3971 | ), |
3972 | bit_offset: BitOffset::Regular( |
3973 | RegularBitOffset { |
3974 | offset: 6, |
3975 | }, |
3976 | ), |
3977 | bit_size: 1, |
3978 | array: None, |
3979 | enumm: None, |
3980 | }, |
3981 | Field { |
3982 | name: "goutnakeff" , |
3983 | description: Some( |
3984 | "Global OUT NAK effective" , |
3985 | ), |
3986 | bit_offset: BitOffset::Regular( |
3987 | RegularBitOffset { |
3988 | offset: 7, |
3989 | }, |
3990 | ), |
3991 | bit_size: 1, |
3992 | array: None, |
3993 | enumm: None, |
3994 | }, |
3995 | Field { |
3996 | name: "esusp" , |
3997 | description: Some( |
3998 | "Early suspend" , |
3999 | ), |
4000 | bit_offset: BitOffset::Regular( |
4001 | RegularBitOffset { |
4002 | offset: 10, |
4003 | }, |
4004 | ), |
4005 | bit_size: 1, |
4006 | array: None, |
4007 | enumm: None, |
4008 | }, |
4009 | Field { |
4010 | name: "usbsusp" , |
4011 | description: Some( |
4012 | "USB suspend" , |
4013 | ), |
4014 | bit_offset: BitOffset::Regular( |
4015 | RegularBitOffset { |
4016 | offset: 11, |
4017 | }, |
4018 | ), |
4019 | bit_size: 1, |
4020 | array: None, |
4021 | enumm: None, |
4022 | }, |
4023 | Field { |
4024 | name: "usbrst" , |
4025 | description: Some( |
4026 | "USB reset" , |
4027 | ), |
4028 | bit_offset: BitOffset::Regular( |
4029 | RegularBitOffset { |
4030 | offset: 12, |
4031 | }, |
4032 | ), |
4033 | bit_size: 1, |
4034 | array: None, |
4035 | enumm: None, |
4036 | }, |
4037 | Field { |
4038 | name: "enumdne" , |
4039 | description: Some( |
4040 | "Enumeration done" , |
4041 | ), |
4042 | bit_offset: BitOffset::Regular( |
4043 | RegularBitOffset { |
4044 | offset: 13, |
4045 | }, |
4046 | ), |
4047 | bit_size: 1, |
4048 | array: None, |
4049 | enumm: None, |
4050 | }, |
4051 | Field { |
4052 | name: "isoodrp" , |
4053 | description: Some( |
4054 | "Isochronous OUT packet dropped interrupt" , |
4055 | ), |
4056 | bit_offset: BitOffset::Regular( |
4057 | RegularBitOffset { |
4058 | offset: 14, |
4059 | }, |
4060 | ), |
4061 | bit_size: 1, |
4062 | array: None, |
4063 | enumm: None, |
4064 | }, |
4065 | Field { |
4066 | name: "eopf" , |
4067 | description: Some( |
4068 | "End of periodic frame interrupt" , |
4069 | ), |
4070 | bit_offset: BitOffset::Regular( |
4071 | RegularBitOffset { |
4072 | offset: 15, |
4073 | }, |
4074 | ), |
4075 | bit_size: 1, |
4076 | array: None, |
4077 | enumm: None, |
4078 | }, |
4079 | Field { |
4080 | name: "iepint" , |
4081 | description: Some( |
4082 | "IN endpoint interrupt" , |
4083 | ), |
4084 | bit_offset: BitOffset::Regular( |
4085 | RegularBitOffset { |
4086 | offset: 18, |
4087 | }, |
4088 | ), |
4089 | bit_size: 1, |
4090 | array: None, |
4091 | enumm: None, |
4092 | }, |
4093 | Field { |
4094 | name: "oepint" , |
4095 | description: Some( |
4096 | "OUT endpoint interrupt" , |
4097 | ), |
4098 | bit_offset: BitOffset::Regular( |
4099 | RegularBitOffset { |
4100 | offset: 19, |
4101 | }, |
4102 | ), |
4103 | bit_size: 1, |
4104 | array: None, |
4105 | enumm: None, |
4106 | }, |
4107 | Field { |
4108 | name: "iisoixfr" , |
4109 | description: Some( |
4110 | "Incomplete isochronous IN transfer" , |
4111 | ), |
4112 | bit_offset: BitOffset::Regular( |
4113 | RegularBitOffset { |
4114 | offset: 20, |
4115 | }, |
4116 | ), |
4117 | bit_size: 1, |
4118 | array: None, |
4119 | enumm: None, |
4120 | }, |
4121 | Field { |
4122 | name: "ipxfr_incompisoout" , |
4123 | description: Some( |
4124 | "Incomplete periodic transfer (host mode) / Incomplete isochronous OUT transfer (device mode)" , |
4125 | ), |
4126 | bit_offset: BitOffset::Regular( |
4127 | RegularBitOffset { |
4128 | offset: 21, |
4129 | }, |
4130 | ), |
4131 | bit_size: 1, |
4132 | array: None, |
4133 | enumm: None, |
4134 | }, |
4135 | Field { |
4136 | name: "datafsusp" , |
4137 | description: Some( |
4138 | "Data fetch suspended" , |
4139 | ), |
4140 | bit_offset: BitOffset::Regular( |
4141 | RegularBitOffset { |
4142 | offset: 22, |
4143 | }, |
4144 | ), |
4145 | bit_size: 1, |
4146 | array: None, |
4147 | enumm: None, |
4148 | }, |
4149 | Field { |
4150 | name: "resetdet" , |
4151 | description: Some( |
4152 | "Reset detected" , |
4153 | ), |
4154 | bit_offset: BitOffset::Regular( |
4155 | RegularBitOffset { |
4156 | offset: 23, |
4157 | }, |
4158 | ), |
4159 | bit_size: 1, |
4160 | array: None, |
4161 | enumm: None, |
4162 | }, |
4163 | Field { |
4164 | name: "hprtint" , |
4165 | description: Some( |
4166 | "Host port interrupt" , |
4167 | ), |
4168 | bit_offset: BitOffset::Regular( |
4169 | RegularBitOffset { |
4170 | offset: 24, |
4171 | }, |
4172 | ), |
4173 | bit_size: 1, |
4174 | array: None, |
4175 | enumm: None, |
4176 | }, |
4177 | Field { |
4178 | name: "hcint" , |
4179 | description: Some( |
4180 | "Host channels interrupt" , |
4181 | ), |
4182 | bit_offset: BitOffset::Regular( |
4183 | RegularBitOffset { |
4184 | offset: 25, |
4185 | }, |
4186 | ), |
4187 | bit_size: 1, |
4188 | array: None, |
4189 | enumm: None, |
4190 | }, |
4191 | Field { |
4192 | name: "ptxfe" , |
4193 | description: Some( |
4194 | "Periodic TxFIFO empty" , |
4195 | ), |
4196 | bit_offset: BitOffset::Regular( |
4197 | RegularBitOffset { |
4198 | offset: 26, |
4199 | }, |
4200 | ), |
4201 | bit_size: 1, |
4202 | array: None, |
4203 | enumm: None, |
4204 | }, |
4205 | Field { |
4206 | name: "cidschg" , |
4207 | description: Some( |
4208 | "Connector ID status change" , |
4209 | ), |
4210 | bit_offset: BitOffset::Regular( |
4211 | RegularBitOffset { |
4212 | offset: 28, |
4213 | }, |
4214 | ), |
4215 | bit_size: 1, |
4216 | array: None, |
4217 | enumm: None, |
4218 | }, |
4219 | Field { |
4220 | name: "discint" , |
4221 | description: Some( |
4222 | "Disconnect detected interrupt" , |
4223 | ), |
4224 | bit_offset: BitOffset::Regular( |
4225 | RegularBitOffset { |
4226 | offset: 29, |
4227 | }, |
4228 | ), |
4229 | bit_size: 1, |
4230 | array: None, |
4231 | enumm: None, |
4232 | }, |
4233 | Field { |
4234 | name: "srqint" , |
4235 | description: Some( |
4236 | "Session request/new session detected interrupt" , |
4237 | ), |
4238 | bit_offset: BitOffset::Regular( |
4239 | RegularBitOffset { |
4240 | offset: 30, |
4241 | }, |
4242 | ), |
4243 | bit_size: 1, |
4244 | array: None, |
4245 | enumm: None, |
4246 | }, |
4247 | Field { |
4248 | name: "wkupint" , |
4249 | description: Some( |
4250 | "Resume/remote wakeup detected interrupt" , |
4251 | ), |
4252 | bit_offset: BitOffset::Regular( |
4253 | RegularBitOffset { |
4254 | offset: 31, |
4255 | }, |
4256 | ), |
4257 | bit_size: 1, |
4258 | array: None, |
4259 | enumm: None, |
4260 | }, |
4261 | ], |
4262 | }, |
4263 | FieldSet { |
4264 | name: "Glpmcfg" , |
4265 | extends: None, |
4266 | description: Some( |
4267 | "Core LPM configuration register" , |
4268 | ), |
4269 | bit_size: 32, |
4270 | fields: &[ |
4271 | Field { |
4272 | name: "lpmen" , |
4273 | description: Some( |
4274 | "LPM support enable" , |
4275 | ), |
4276 | bit_offset: BitOffset::Regular( |
4277 | RegularBitOffset { |
4278 | offset: 0, |
4279 | }, |
4280 | ), |
4281 | bit_size: 1, |
4282 | array: None, |
4283 | enumm: None, |
4284 | }, |
4285 | Field { |
4286 | name: "lpmack" , |
4287 | description: Some( |
4288 | "LPM token acknowledge enable" , |
4289 | ), |
4290 | bit_offset: BitOffset::Regular( |
4291 | RegularBitOffset { |
4292 | offset: 1, |
4293 | }, |
4294 | ), |
4295 | bit_size: 1, |
4296 | array: None, |
4297 | enumm: None, |
4298 | }, |
4299 | Field { |
4300 | name: "besl" , |
4301 | description: Some( |
4302 | "Best effort service latency" , |
4303 | ), |
4304 | bit_offset: BitOffset::Regular( |
4305 | RegularBitOffset { |
4306 | offset: 2, |
4307 | }, |
4308 | ), |
4309 | bit_size: 4, |
4310 | array: None, |
4311 | enumm: None, |
4312 | }, |
4313 | Field { |
4314 | name: "remwake" , |
4315 | description: Some( |
4316 | "bRemoteWake value" , |
4317 | ), |
4318 | bit_offset: BitOffset::Regular( |
4319 | RegularBitOffset { |
4320 | offset: 6, |
4321 | }, |
4322 | ), |
4323 | bit_size: 1, |
4324 | array: None, |
4325 | enumm: None, |
4326 | }, |
4327 | Field { |
4328 | name: "l1ssen" , |
4329 | description: Some( |
4330 | "L1 Shallow Sleep enable" , |
4331 | ), |
4332 | bit_offset: BitOffset::Regular( |
4333 | RegularBitOffset { |
4334 | offset: 7, |
4335 | }, |
4336 | ), |
4337 | bit_size: 1, |
4338 | array: None, |
4339 | enumm: None, |
4340 | }, |
4341 | Field { |
4342 | name: "beslthrs" , |
4343 | description: Some( |
4344 | "BESL threshold" , |
4345 | ), |
4346 | bit_offset: BitOffset::Regular( |
4347 | RegularBitOffset { |
4348 | offset: 8, |
4349 | }, |
4350 | ), |
4351 | bit_size: 4, |
4352 | array: None, |
4353 | enumm: None, |
4354 | }, |
4355 | Field { |
4356 | name: "l1dsen" , |
4357 | description: Some( |
4358 | "L1 deep sleep enable" , |
4359 | ), |
4360 | bit_offset: BitOffset::Regular( |
4361 | RegularBitOffset { |
4362 | offset: 12, |
4363 | }, |
4364 | ), |
4365 | bit_size: 1, |
4366 | array: None, |
4367 | enumm: None, |
4368 | }, |
4369 | Field { |
4370 | name: "lpmrst" , |
4371 | description: Some( |
4372 | "LPM response" , |
4373 | ), |
4374 | bit_offset: BitOffset::Regular( |
4375 | RegularBitOffset { |
4376 | offset: 13, |
4377 | }, |
4378 | ), |
4379 | bit_size: 2, |
4380 | array: None, |
4381 | enumm: None, |
4382 | }, |
4383 | Field { |
4384 | name: "slpsts" , |
4385 | description: Some( |
4386 | "Port sleep status" , |
4387 | ), |
4388 | bit_offset: BitOffset::Regular( |
4389 | RegularBitOffset { |
4390 | offset: 15, |
4391 | }, |
4392 | ), |
4393 | bit_size: 1, |
4394 | array: None, |
4395 | enumm: None, |
4396 | }, |
4397 | Field { |
4398 | name: "l1rsmok" , |
4399 | description: Some( |
4400 | "Sleep State Resume OK" , |
4401 | ), |
4402 | bit_offset: BitOffset::Regular( |
4403 | RegularBitOffset { |
4404 | offset: 16, |
4405 | }, |
4406 | ), |
4407 | bit_size: 1, |
4408 | array: None, |
4409 | enumm: None, |
4410 | }, |
4411 | Field { |
4412 | name: "lpmchidx" , |
4413 | description: Some( |
4414 | "LPM Channel Index" , |
4415 | ), |
4416 | bit_offset: BitOffset::Regular( |
4417 | RegularBitOffset { |
4418 | offset: 17, |
4419 | }, |
4420 | ), |
4421 | bit_size: 4, |
4422 | array: None, |
4423 | enumm: None, |
4424 | }, |
4425 | Field { |
4426 | name: "lpmrcnt" , |
4427 | description: Some( |
4428 | "LPM retry count" , |
4429 | ), |
4430 | bit_offset: BitOffset::Regular( |
4431 | RegularBitOffset { |
4432 | offset: 21, |
4433 | }, |
4434 | ), |
4435 | bit_size: 3, |
4436 | array: None, |
4437 | enumm: None, |
4438 | }, |
4439 | Field { |
4440 | name: "sndlpm" , |
4441 | description: Some( |
4442 | "Send LPM transaction" , |
4443 | ), |
4444 | bit_offset: BitOffset::Regular( |
4445 | RegularBitOffset { |
4446 | offset: 24, |
4447 | }, |
4448 | ), |
4449 | bit_size: 1, |
4450 | array: None, |
4451 | enumm: None, |
4452 | }, |
4453 | Field { |
4454 | name: "lpmrcntsts" , |
4455 | description: Some( |
4456 | "LPM retry count status" , |
4457 | ), |
4458 | bit_offset: BitOffset::Regular( |
4459 | RegularBitOffset { |
4460 | offset: 25, |
4461 | }, |
4462 | ), |
4463 | bit_size: 3, |
4464 | array: None, |
4465 | enumm: None, |
4466 | }, |
4467 | Field { |
4468 | name: "enbesl" , |
4469 | description: Some( |
4470 | "Enable best effort service latency" , |
4471 | ), |
4472 | bit_offset: BitOffset::Regular( |
4473 | RegularBitOffset { |
4474 | offset: 28, |
4475 | }, |
4476 | ), |
4477 | bit_size: 1, |
4478 | array: None, |
4479 | enumm: None, |
4480 | }, |
4481 | ], |
4482 | }, |
4483 | FieldSet { |
4484 | name: "Gotgctl" , |
4485 | extends: None, |
4486 | description: Some( |
4487 | "Control and status register" , |
4488 | ), |
4489 | bit_size: 32, |
4490 | fields: &[ |
4491 | Field { |
4492 | name: "srqscs" , |
4493 | description: Some( |
4494 | "Session request success" , |
4495 | ), |
4496 | bit_offset: BitOffset::Regular( |
4497 | RegularBitOffset { |
4498 | offset: 0, |
4499 | }, |
4500 | ), |
4501 | bit_size: 1, |
4502 | array: None, |
4503 | enumm: None, |
4504 | }, |
4505 | Field { |
4506 | name: "srq" , |
4507 | description: Some( |
4508 | "Session request" , |
4509 | ), |
4510 | bit_offset: BitOffset::Regular( |
4511 | RegularBitOffset { |
4512 | offset: 1, |
4513 | }, |
4514 | ), |
4515 | bit_size: 1, |
4516 | array: None, |
4517 | enumm: None, |
4518 | }, |
4519 | Field { |
4520 | name: "vbvaloen" , |
4521 | description: Some( |
4522 | "VBUS valid override enable" , |
4523 | ), |
4524 | bit_offset: BitOffset::Regular( |
4525 | RegularBitOffset { |
4526 | offset: 2, |
4527 | }, |
4528 | ), |
4529 | bit_size: 1, |
4530 | array: None, |
4531 | enumm: None, |
4532 | }, |
4533 | Field { |
4534 | name: "vbvaloval" , |
4535 | description: Some( |
4536 | "VBUS valid override value" , |
4537 | ), |
4538 | bit_offset: BitOffset::Regular( |
4539 | RegularBitOffset { |
4540 | offset: 3, |
4541 | }, |
4542 | ), |
4543 | bit_size: 1, |
4544 | array: None, |
4545 | enumm: None, |
4546 | }, |
4547 | Field { |
4548 | name: "avaloen" , |
4549 | description: Some( |
4550 | "A-peripheral session valid override enable" , |
4551 | ), |
4552 | bit_offset: BitOffset::Regular( |
4553 | RegularBitOffset { |
4554 | offset: 4, |
4555 | }, |
4556 | ), |
4557 | bit_size: 1, |
4558 | array: None, |
4559 | enumm: None, |
4560 | }, |
4561 | Field { |
4562 | name: "avaloval" , |
4563 | description: Some( |
4564 | "A-peripheral session valid override value" , |
4565 | ), |
4566 | bit_offset: BitOffset::Regular( |
4567 | RegularBitOffset { |
4568 | offset: 5, |
4569 | }, |
4570 | ), |
4571 | bit_size: 1, |
4572 | array: None, |
4573 | enumm: None, |
4574 | }, |
4575 | Field { |
4576 | name: "bvaloen" , |
4577 | description: Some( |
4578 | "B-peripheral session valid override enable" , |
4579 | ), |
4580 | bit_offset: BitOffset::Regular( |
4581 | RegularBitOffset { |
4582 | offset: 6, |
4583 | }, |
4584 | ), |
4585 | bit_size: 1, |
4586 | array: None, |
4587 | enumm: None, |
4588 | }, |
4589 | Field { |
4590 | name: "bvaloval" , |
4591 | description: Some( |
4592 | "B-peripheral session valid override value" , |
4593 | ), |
4594 | bit_offset: BitOffset::Regular( |
4595 | RegularBitOffset { |
4596 | offset: 7, |
4597 | }, |
4598 | ), |
4599 | bit_size: 1, |
4600 | array: None, |
4601 | enumm: None, |
4602 | }, |
4603 | Field { |
4604 | name: "hngscs" , |
4605 | description: Some( |
4606 | "Host negotiation success" , |
4607 | ), |
4608 | bit_offset: BitOffset::Regular( |
4609 | RegularBitOffset { |
4610 | offset: 8, |
4611 | }, |
4612 | ), |
4613 | bit_size: 1, |
4614 | array: None, |
4615 | enumm: None, |
4616 | }, |
4617 | Field { |
4618 | name: "hnprq" , |
4619 | description: Some( |
4620 | "HNP request" , |
4621 | ), |
4622 | bit_offset: BitOffset::Regular( |
4623 | RegularBitOffset { |
4624 | offset: 9, |
4625 | }, |
4626 | ), |
4627 | bit_size: 1, |
4628 | array: None, |
4629 | enumm: None, |
4630 | }, |
4631 | Field { |
4632 | name: "hshnpen" , |
4633 | description: Some( |
4634 | "Host set HNP enable" , |
4635 | ), |
4636 | bit_offset: BitOffset::Regular( |
4637 | RegularBitOffset { |
4638 | offset: 10, |
4639 | }, |
4640 | ), |
4641 | bit_size: 1, |
4642 | array: None, |
4643 | enumm: None, |
4644 | }, |
4645 | Field { |
4646 | name: "dhnpen" , |
4647 | description: Some( |
4648 | "Device HNP enabled" , |
4649 | ), |
4650 | bit_offset: BitOffset::Regular( |
4651 | RegularBitOffset { |
4652 | offset: 11, |
4653 | }, |
4654 | ), |
4655 | bit_size: 1, |
4656 | array: None, |
4657 | enumm: None, |
4658 | }, |
4659 | Field { |
4660 | name: "ehen" , |
4661 | description: Some( |
4662 | "Embedded host enable" , |
4663 | ), |
4664 | bit_offset: BitOffset::Regular( |
4665 | RegularBitOffset { |
4666 | offset: 12, |
4667 | }, |
4668 | ), |
4669 | bit_size: 1, |
4670 | array: None, |
4671 | enumm: None, |
4672 | }, |
4673 | Field { |
4674 | name: "cidsts" , |
4675 | description: Some( |
4676 | "Connector ID status" , |
4677 | ), |
4678 | bit_offset: BitOffset::Regular( |
4679 | RegularBitOffset { |
4680 | offset: 16, |
4681 | }, |
4682 | ), |
4683 | bit_size: 1, |
4684 | array: None, |
4685 | enumm: None, |
4686 | }, |
4687 | Field { |
4688 | name: "dbct" , |
4689 | description: Some( |
4690 | "Long/short debounce time" , |
4691 | ), |
4692 | bit_offset: BitOffset::Regular( |
4693 | RegularBitOffset { |
4694 | offset: 17, |
4695 | }, |
4696 | ), |
4697 | bit_size: 1, |
4698 | array: None, |
4699 | enumm: None, |
4700 | }, |
4701 | Field { |
4702 | name: "asvld" , |
4703 | description: Some( |
4704 | "A-session valid" , |
4705 | ), |
4706 | bit_offset: BitOffset::Regular( |
4707 | RegularBitOffset { |
4708 | offset: 18, |
4709 | }, |
4710 | ), |
4711 | bit_size: 1, |
4712 | array: None, |
4713 | enumm: None, |
4714 | }, |
4715 | Field { |
4716 | name: "bsvld" , |
4717 | description: Some( |
4718 | "B-session valid" , |
4719 | ), |
4720 | bit_offset: BitOffset::Regular( |
4721 | RegularBitOffset { |
4722 | offset: 19, |
4723 | }, |
4724 | ), |
4725 | bit_size: 1, |
4726 | array: None, |
4727 | enumm: None, |
4728 | }, |
4729 | ], |
4730 | }, |
4731 | FieldSet { |
4732 | name: "Gotgint" , |
4733 | extends: None, |
4734 | description: Some( |
4735 | "Interrupt register" , |
4736 | ), |
4737 | bit_size: 32, |
4738 | fields: &[ |
4739 | Field { |
4740 | name: "sedet" , |
4741 | description: Some( |
4742 | "Session end detected" , |
4743 | ), |
4744 | bit_offset: BitOffset::Regular( |
4745 | RegularBitOffset { |
4746 | offset: 2, |
4747 | }, |
4748 | ), |
4749 | bit_size: 1, |
4750 | array: None, |
4751 | enumm: None, |
4752 | }, |
4753 | Field { |
4754 | name: "srsschg" , |
4755 | description: Some( |
4756 | "Session request success status change" , |
4757 | ), |
4758 | bit_offset: BitOffset::Regular( |
4759 | RegularBitOffset { |
4760 | offset: 8, |
4761 | }, |
4762 | ), |
4763 | bit_size: 1, |
4764 | array: None, |
4765 | enumm: None, |
4766 | }, |
4767 | Field { |
4768 | name: "hnsschg" , |
4769 | description: Some( |
4770 | "Host negotiation success status change" , |
4771 | ), |
4772 | bit_offset: BitOffset::Regular( |
4773 | RegularBitOffset { |
4774 | offset: 9, |
4775 | }, |
4776 | ), |
4777 | bit_size: 1, |
4778 | array: None, |
4779 | enumm: None, |
4780 | }, |
4781 | Field { |
4782 | name: "hngdet" , |
4783 | description: Some( |
4784 | "Host negotiation detected" , |
4785 | ), |
4786 | bit_offset: BitOffset::Regular( |
4787 | RegularBitOffset { |
4788 | offset: 17, |
4789 | }, |
4790 | ), |
4791 | bit_size: 1, |
4792 | array: None, |
4793 | enumm: None, |
4794 | }, |
4795 | Field { |
4796 | name: "adtochg" , |
4797 | description: Some( |
4798 | "A-device timeout change" , |
4799 | ), |
4800 | bit_offset: BitOffset::Regular( |
4801 | RegularBitOffset { |
4802 | offset: 18, |
4803 | }, |
4804 | ), |
4805 | bit_size: 1, |
4806 | array: None, |
4807 | enumm: None, |
4808 | }, |
4809 | Field { |
4810 | name: "dbcdne" , |
4811 | description: Some( |
4812 | "Debounce done" , |
4813 | ), |
4814 | bit_offset: BitOffset::Regular( |
4815 | RegularBitOffset { |
4816 | offset: 19, |
4817 | }, |
4818 | ), |
4819 | bit_size: 1, |
4820 | array: None, |
4821 | enumm: None, |
4822 | }, |
4823 | Field { |
4824 | name: "idchng" , |
4825 | description: Some( |
4826 | "ID input pin changed" , |
4827 | ), |
4828 | bit_offset: BitOffset::Regular( |
4829 | RegularBitOffset { |
4830 | offset: 20, |
4831 | }, |
4832 | ), |
4833 | bit_size: 1, |
4834 | array: None, |
4835 | enumm: None, |
4836 | }, |
4837 | ], |
4838 | }, |
4839 | FieldSet { |
4840 | name: "Grstctl" , |
4841 | extends: None, |
4842 | description: Some( |
4843 | "Reset register" , |
4844 | ), |
4845 | bit_size: 32, |
4846 | fields: &[ |
4847 | Field { |
4848 | name: "csrst" , |
4849 | description: Some( |
4850 | "Core soft reset" , |
4851 | ), |
4852 | bit_offset: BitOffset::Regular( |
4853 | RegularBitOffset { |
4854 | offset: 0, |
4855 | }, |
4856 | ), |
4857 | bit_size: 1, |
4858 | array: None, |
4859 | enumm: None, |
4860 | }, |
4861 | Field { |
4862 | name: "hsrst" , |
4863 | description: Some( |
4864 | "HCLK soft reset" , |
4865 | ), |
4866 | bit_offset: BitOffset::Regular( |
4867 | RegularBitOffset { |
4868 | offset: 1, |
4869 | }, |
4870 | ), |
4871 | bit_size: 1, |
4872 | array: None, |
4873 | enumm: None, |
4874 | }, |
4875 | Field { |
4876 | name: "fcrst" , |
4877 | description: Some( |
4878 | "Host frame counter reset" , |
4879 | ), |
4880 | bit_offset: BitOffset::Regular( |
4881 | RegularBitOffset { |
4882 | offset: 2, |
4883 | }, |
4884 | ), |
4885 | bit_size: 1, |
4886 | array: None, |
4887 | enumm: None, |
4888 | }, |
4889 | Field { |
4890 | name: "rxfflsh" , |
4891 | description: Some( |
4892 | "RxFIFO flush" , |
4893 | ), |
4894 | bit_offset: BitOffset::Regular( |
4895 | RegularBitOffset { |
4896 | offset: 4, |
4897 | }, |
4898 | ), |
4899 | bit_size: 1, |
4900 | array: None, |
4901 | enumm: None, |
4902 | }, |
4903 | Field { |
4904 | name: "txfflsh" , |
4905 | description: Some( |
4906 | "TxFIFO flush" , |
4907 | ), |
4908 | bit_offset: BitOffset::Regular( |
4909 | RegularBitOffset { |
4910 | offset: 5, |
4911 | }, |
4912 | ), |
4913 | bit_size: 1, |
4914 | array: None, |
4915 | enumm: None, |
4916 | }, |
4917 | Field { |
4918 | name: "txfnum" , |
4919 | description: Some( |
4920 | "TxFIFO number" , |
4921 | ), |
4922 | bit_offset: BitOffset::Regular( |
4923 | RegularBitOffset { |
4924 | offset: 6, |
4925 | }, |
4926 | ), |
4927 | bit_size: 5, |
4928 | array: None, |
4929 | enumm: None, |
4930 | }, |
4931 | Field { |
4932 | name: "dmareq" , |
4933 | description: Some( |
4934 | "DMA request signal enabled for USB OTG HS" , |
4935 | ), |
4936 | bit_offset: BitOffset::Regular( |
4937 | RegularBitOffset { |
4938 | offset: 30, |
4939 | }, |
4940 | ), |
4941 | bit_size: 1, |
4942 | array: None, |
4943 | enumm: None, |
4944 | }, |
4945 | Field { |
4946 | name: "ahbidl" , |
4947 | description: Some( |
4948 | "AHB master idle" , |
4949 | ), |
4950 | bit_offset: BitOffset::Regular( |
4951 | RegularBitOffset { |
4952 | offset: 31, |
4953 | }, |
4954 | ), |
4955 | bit_size: 1, |
4956 | array: None, |
4957 | enumm: None, |
4958 | }, |
4959 | ], |
4960 | }, |
4961 | FieldSet { |
4962 | name: "Grxfsiz" , |
4963 | extends: None, |
4964 | description: Some( |
4965 | "Receive FIFO size register" , |
4966 | ), |
4967 | bit_size: 32, |
4968 | fields: &[ |
4969 | Field { |
4970 | name: "rxfd" , |
4971 | description: Some( |
4972 | "RxFIFO depth" , |
4973 | ), |
4974 | bit_offset: BitOffset::Regular( |
4975 | RegularBitOffset { |
4976 | offset: 0, |
4977 | }, |
4978 | ), |
4979 | bit_size: 16, |
4980 | array: None, |
4981 | enumm: None, |
4982 | }, |
4983 | ], |
4984 | }, |
4985 | FieldSet { |
4986 | name: "Grxsts" , |
4987 | extends: None, |
4988 | description: Some( |
4989 | "Status read and pop register" , |
4990 | ), |
4991 | bit_size: 32, |
4992 | fields: &[ |
4993 | Field { |
4994 | name: "epnum" , |
4995 | description: Some( |
4996 | "Endpoint number (device mode) / Channel number (host mode)" , |
4997 | ), |
4998 | bit_offset: BitOffset::Regular( |
4999 | RegularBitOffset { |
5000 | offset: 0, |
5001 | }, |
5002 | ), |
5003 | bit_size: 4, |
5004 | array: None, |
5005 | enumm: None, |
5006 | }, |
5007 | Field { |
5008 | name: "bcnt" , |
5009 | description: Some( |
5010 | "Byte count" , |
5011 | ), |
5012 | bit_offset: BitOffset::Regular( |
5013 | RegularBitOffset { |
5014 | offset: 4, |
5015 | }, |
5016 | ), |
5017 | bit_size: 11, |
5018 | array: None, |
5019 | enumm: None, |
5020 | }, |
5021 | Field { |
5022 | name: "dpid" , |
5023 | description: Some( |
5024 | "Data PID" , |
5025 | ), |
5026 | bit_offset: BitOffset::Regular( |
5027 | RegularBitOffset { |
5028 | offset: 15, |
5029 | }, |
5030 | ), |
5031 | bit_size: 2, |
5032 | array: None, |
5033 | enumm: Some( |
5034 | "Dpid" , |
5035 | ), |
5036 | }, |
5037 | Field { |
5038 | name: "pktstsd" , |
5039 | description: Some( |
5040 | "Packet status (device mode)" , |
5041 | ), |
5042 | bit_offset: BitOffset::Regular( |
5043 | RegularBitOffset { |
5044 | offset: 17, |
5045 | }, |
5046 | ), |
5047 | bit_size: 4, |
5048 | array: None, |
5049 | enumm: Some( |
5050 | "Pktstsd" , |
5051 | ), |
5052 | }, |
5053 | Field { |
5054 | name: "pktstsh" , |
5055 | description: Some( |
5056 | "Packet status (host mode)" , |
5057 | ), |
5058 | bit_offset: BitOffset::Regular( |
5059 | RegularBitOffset { |
5060 | offset: 17, |
5061 | }, |
5062 | ), |
5063 | bit_size: 4, |
5064 | array: None, |
5065 | enumm: Some( |
5066 | "Pktstsh" , |
5067 | ), |
5068 | }, |
5069 | Field { |
5070 | name: "frmnum" , |
5071 | description: Some( |
5072 | "Frame number (device mode)" , |
5073 | ), |
5074 | bit_offset: BitOffset::Regular( |
5075 | RegularBitOffset { |
5076 | offset: 21, |
5077 | }, |
5078 | ), |
5079 | bit_size: 4, |
5080 | array: None, |
5081 | enumm: None, |
5082 | }, |
5083 | ], |
5084 | }, |
5085 | FieldSet { |
5086 | name: "Gusbcfg" , |
5087 | extends: None, |
5088 | description: Some( |
5089 | "USB configuration register" , |
5090 | ), |
5091 | bit_size: 32, |
5092 | fields: &[ |
5093 | Field { |
5094 | name: "tocal" , |
5095 | description: Some( |
5096 | "FS timeout calibration" , |
5097 | ), |
5098 | bit_offset: BitOffset::Regular( |
5099 | RegularBitOffset { |
5100 | offset: 0, |
5101 | }, |
5102 | ), |
5103 | bit_size: 3, |
5104 | array: None, |
5105 | enumm: None, |
5106 | }, |
5107 | Field { |
5108 | name: "physel" , |
5109 | description: Some( |
5110 | "Full-speed internal serial transceiver enable" , |
5111 | ), |
5112 | bit_offset: BitOffset::Regular( |
5113 | RegularBitOffset { |
5114 | offset: 6, |
5115 | }, |
5116 | ), |
5117 | bit_size: 1, |
5118 | array: None, |
5119 | enumm: None, |
5120 | }, |
5121 | Field { |
5122 | name: "srpcap" , |
5123 | description: Some( |
5124 | "SRP-capable" , |
5125 | ), |
5126 | bit_offset: BitOffset::Regular( |
5127 | RegularBitOffset { |
5128 | offset: 8, |
5129 | }, |
5130 | ), |
5131 | bit_size: 1, |
5132 | array: None, |
5133 | enumm: None, |
5134 | }, |
5135 | Field { |
5136 | name: "hnpcap" , |
5137 | description: Some( |
5138 | "HNP-capable" , |
5139 | ), |
5140 | bit_offset: BitOffset::Regular( |
5141 | RegularBitOffset { |
5142 | offset: 9, |
5143 | }, |
5144 | ), |
5145 | bit_size: 1, |
5146 | array: None, |
5147 | enumm: None, |
5148 | }, |
5149 | Field { |
5150 | name: "trdt" , |
5151 | description: Some( |
5152 | "USB turnaround time" , |
5153 | ), |
5154 | bit_offset: BitOffset::Regular( |
5155 | RegularBitOffset { |
5156 | offset: 10, |
5157 | }, |
5158 | ), |
5159 | bit_size: 4, |
5160 | array: None, |
5161 | enumm: None, |
5162 | }, |
5163 | Field { |
5164 | name: "phylpcs" , |
5165 | description: Some( |
5166 | "PHY Low-power clock select" , |
5167 | ), |
5168 | bit_offset: BitOffset::Regular( |
5169 | RegularBitOffset { |
5170 | offset: 15, |
5171 | }, |
5172 | ), |
5173 | bit_size: 1, |
5174 | array: None, |
5175 | enumm: None, |
5176 | }, |
5177 | Field { |
5178 | name: "ulpifsls" , |
5179 | description: Some( |
5180 | "ULPI FS/LS select" , |
5181 | ), |
5182 | bit_offset: BitOffset::Regular( |
5183 | RegularBitOffset { |
5184 | offset: 17, |
5185 | }, |
5186 | ), |
5187 | bit_size: 1, |
5188 | array: None, |
5189 | enumm: None, |
5190 | }, |
5191 | Field { |
5192 | name: "ulpiar" , |
5193 | description: Some( |
5194 | "ULPI Auto-resume" , |
5195 | ), |
5196 | bit_offset: BitOffset::Regular( |
5197 | RegularBitOffset { |
5198 | offset: 18, |
5199 | }, |
5200 | ), |
5201 | bit_size: 1, |
5202 | array: None, |
5203 | enumm: None, |
5204 | }, |
5205 | Field { |
5206 | name: "ulpicsm" , |
5207 | description: Some( |
5208 | "ULPI Clock SuspendM" , |
5209 | ), |
5210 | bit_offset: BitOffset::Regular( |
5211 | RegularBitOffset { |
5212 | offset: 19, |
5213 | }, |
5214 | ), |
5215 | bit_size: 1, |
5216 | array: None, |
5217 | enumm: None, |
5218 | }, |
5219 | Field { |
5220 | name: "ulpievbusd" , |
5221 | description: Some( |
5222 | "ULPI External VBUS Drive" , |
5223 | ), |
5224 | bit_offset: BitOffset::Regular( |
5225 | RegularBitOffset { |
5226 | offset: 20, |
5227 | }, |
5228 | ), |
5229 | bit_size: 1, |
5230 | array: None, |
5231 | enumm: None, |
5232 | }, |
5233 | Field { |
5234 | name: "ulpievbusi" , |
5235 | description: Some( |
5236 | "ULPI external VBUS indicator" , |
5237 | ), |
5238 | bit_offset: BitOffset::Regular( |
5239 | RegularBitOffset { |
5240 | offset: 21, |
5241 | }, |
5242 | ), |
5243 | bit_size: 1, |
5244 | array: None, |
5245 | enumm: None, |
5246 | }, |
5247 | Field { |
5248 | name: "tsdps" , |
5249 | description: Some( |
5250 | "TermSel DLine pulsing selection" , |
5251 | ), |
5252 | bit_offset: BitOffset::Regular( |
5253 | RegularBitOffset { |
5254 | offset: 22, |
5255 | }, |
5256 | ), |
5257 | bit_size: 1, |
5258 | array: None, |
5259 | enumm: None, |
5260 | }, |
5261 | Field { |
5262 | name: "pcci" , |
5263 | description: Some( |
5264 | "Indicator complement" , |
5265 | ), |
5266 | bit_offset: BitOffset::Regular( |
5267 | RegularBitOffset { |
5268 | offset: 23, |
5269 | }, |
5270 | ), |
5271 | bit_size: 1, |
5272 | array: None, |
5273 | enumm: None, |
5274 | }, |
5275 | Field { |
5276 | name: "ptci" , |
5277 | description: Some( |
5278 | "Indicator pass through" , |
5279 | ), |
5280 | bit_offset: BitOffset::Regular( |
5281 | RegularBitOffset { |
5282 | offset: 24, |
5283 | }, |
5284 | ), |
5285 | bit_size: 1, |
5286 | array: None, |
5287 | enumm: None, |
5288 | }, |
5289 | Field { |
5290 | name: "ulpiipd" , |
5291 | description: Some( |
5292 | "ULPI interface protect disable" , |
5293 | ), |
5294 | bit_offset: BitOffset::Regular( |
5295 | RegularBitOffset { |
5296 | offset: 25, |
5297 | }, |
5298 | ), |
5299 | bit_size: 1, |
5300 | array: None, |
5301 | enumm: None, |
5302 | }, |
5303 | Field { |
5304 | name: "fhmod" , |
5305 | description: Some( |
5306 | "Force host mode" , |
5307 | ), |
5308 | bit_offset: BitOffset::Regular( |
5309 | RegularBitOffset { |
5310 | offset: 29, |
5311 | }, |
5312 | ), |
5313 | bit_size: 1, |
5314 | array: None, |
5315 | enumm: None, |
5316 | }, |
5317 | Field { |
5318 | name: "fdmod" , |
5319 | description: Some( |
5320 | "Force device mode" , |
5321 | ), |
5322 | bit_offset: BitOffset::Regular( |
5323 | RegularBitOffset { |
5324 | offset: 30, |
5325 | }, |
5326 | ), |
5327 | bit_size: 1, |
5328 | array: None, |
5329 | enumm: None, |
5330 | }, |
5331 | Field { |
5332 | name: "ctxpkt" , |
5333 | description: Some( |
5334 | "Corrupt Tx packet" , |
5335 | ), |
5336 | bit_offset: BitOffset::Regular( |
5337 | RegularBitOffset { |
5338 | offset: 31, |
5339 | }, |
5340 | ), |
5341 | bit_size: 1, |
5342 | array: None, |
5343 | enumm: None, |
5344 | }, |
5345 | ], |
5346 | }, |
5347 | FieldSet { |
5348 | name: "Haint" , |
5349 | extends: None, |
5350 | description: Some( |
5351 | "Host all channels interrupt register" , |
5352 | ), |
5353 | bit_size: 32, |
5354 | fields: &[ |
5355 | Field { |
5356 | name: "haint" , |
5357 | description: Some( |
5358 | "Channel interrupts" , |
5359 | ), |
5360 | bit_offset: BitOffset::Regular( |
5361 | RegularBitOffset { |
5362 | offset: 0, |
5363 | }, |
5364 | ), |
5365 | bit_size: 16, |
5366 | array: None, |
5367 | enumm: None, |
5368 | }, |
5369 | ], |
5370 | }, |
5371 | FieldSet { |
5372 | name: "Haintmsk" , |
5373 | extends: None, |
5374 | description: Some( |
5375 | "Host all channels interrupt mask register" , |
5376 | ), |
5377 | bit_size: 32, |
5378 | fields: &[ |
5379 | Field { |
5380 | name: "haintm" , |
5381 | description: Some( |
5382 | "Channel interrupt mask" , |
5383 | ), |
5384 | bit_offset: BitOffset::Regular( |
5385 | RegularBitOffset { |
5386 | offset: 0, |
5387 | }, |
5388 | ), |
5389 | bit_size: 16, |
5390 | array: None, |
5391 | enumm: None, |
5392 | }, |
5393 | ], |
5394 | }, |
5395 | FieldSet { |
5396 | name: "Hcchar" , |
5397 | extends: None, |
5398 | description: Some( |
5399 | "Host channel characteristics register" , |
5400 | ), |
5401 | bit_size: 32, |
5402 | fields: &[ |
5403 | Field { |
5404 | name: "mpsiz" , |
5405 | description: Some( |
5406 | "Maximum packet size" , |
5407 | ), |
5408 | bit_offset: BitOffset::Regular( |
5409 | RegularBitOffset { |
5410 | offset: 0, |
5411 | }, |
5412 | ), |
5413 | bit_size: 11, |
5414 | array: None, |
5415 | enumm: None, |
5416 | }, |
5417 | Field { |
5418 | name: "epnum" , |
5419 | description: Some( |
5420 | "Endpoint number" , |
5421 | ), |
5422 | bit_offset: BitOffset::Regular( |
5423 | RegularBitOffset { |
5424 | offset: 11, |
5425 | }, |
5426 | ), |
5427 | bit_size: 4, |
5428 | array: None, |
5429 | enumm: None, |
5430 | }, |
5431 | Field { |
5432 | name: "epdir" , |
5433 | description: Some( |
5434 | "Endpoint direction" , |
5435 | ), |
5436 | bit_offset: BitOffset::Regular( |
5437 | RegularBitOffset { |
5438 | offset: 15, |
5439 | }, |
5440 | ), |
5441 | bit_size: 1, |
5442 | array: None, |
5443 | enumm: None, |
5444 | }, |
5445 | Field { |
5446 | name: "lsdev" , |
5447 | description: Some( |
5448 | "Low-speed device" , |
5449 | ), |
5450 | bit_offset: BitOffset::Regular( |
5451 | RegularBitOffset { |
5452 | offset: 17, |
5453 | }, |
5454 | ), |
5455 | bit_size: 1, |
5456 | array: None, |
5457 | enumm: None, |
5458 | }, |
5459 | Field { |
5460 | name: "eptyp" , |
5461 | description: Some( |
5462 | "Endpoint type" , |
5463 | ), |
5464 | bit_offset: BitOffset::Regular( |
5465 | RegularBitOffset { |
5466 | offset: 18, |
5467 | }, |
5468 | ), |
5469 | bit_size: 2, |
5470 | array: None, |
5471 | enumm: Some( |
5472 | "Eptyp" , |
5473 | ), |
5474 | }, |
5475 | Field { |
5476 | name: "mcnt" , |
5477 | description: Some( |
5478 | "Multicount" , |
5479 | ), |
5480 | bit_offset: BitOffset::Regular( |
5481 | RegularBitOffset { |
5482 | offset: 20, |
5483 | }, |
5484 | ), |
5485 | bit_size: 2, |
5486 | array: None, |
5487 | enumm: None, |
5488 | }, |
5489 | Field { |
5490 | name: "dad" , |
5491 | description: Some( |
5492 | "Device address" , |
5493 | ), |
5494 | bit_offset: BitOffset::Regular( |
5495 | RegularBitOffset { |
5496 | offset: 22, |
5497 | }, |
5498 | ), |
5499 | bit_size: 7, |
5500 | array: None, |
5501 | enumm: None, |
5502 | }, |
5503 | Field { |
5504 | name: "oddfrm" , |
5505 | description: Some( |
5506 | "Odd frame (request iso/interrupt transaction to be performed on odd micro-frame)" , |
5507 | ), |
5508 | bit_offset: BitOffset::Regular( |
5509 | RegularBitOffset { |
5510 | offset: 29, |
5511 | }, |
5512 | ), |
5513 | bit_size: 1, |
5514 | array: None, |
5515 | enumm: None, |
5516 | }, |
5517 | Field { |
5518 | name: "chdis" , |
5519 | description: Some( |
5520 | "Channel disable" , |
5521 | ), |
5522 | bit_offset: BitOffset::Regular( |
5523 | RegularBitOffset { |
5524 | offset: 30, |
5525 | }, |
5526 | ), |
5527 | bit_size: 1, |
5528 | array: None, |
5529 | enumm: None, |
5530 | }, |
5531 | Field { |
5532 | name: "chena" , |
5533 | description: Some( |
5534 | "Channel enable" , |
5535 | ), |
5536 | bit_offset: BitOffset::Regular( |
5537 | RegularBitOffset { |
5538 | offset: 31, |
5539 | }, |
5540 | ), |
5541 | bit_size: 1, |
5542 | array: None, |
5543 | enumm: None, |
5544 | }, |
5545 | ], |
5546 | }, |
5547 | FieldSet { |
5548 | name: "Hcdma" , |
5549 | extends: None, |
5550 | description: Some( |
5551 | "Host channel DMA config register" , |
5552 | ), |
5553 | bit_size: 32, |
5554 | fields: &[ |
5555 | Field { |
5556 | name: "qtdaddr" , |
5557 | description: Some( |
5558 | "QTD list base address" , |
5559 | ), |
5560 | bit_offset: BitOffset::Regular( |
5561 | RegularBitOffset { |
5562 | offset: 0, |
5563 | }, |
5564 | ), |
5565 | bit_size: 32, |
5566 | array: None, |
5567 | enumm: None, |
5568 | }, |
5569 | Field { |
5570 | name: "cqtd" , |
5571 | description: Some( |
5572 | "Current QTD (transfer descriptor) index" , |
5573 | ), |
5574 | bit_offset: BitOffset::Regular( |
5575 | RegularBitOffset { |
5576 | offset: 3, |
5577 | }, |
5578 | ), |
5579 | bit_size: 6, |
5580 | array: None, |
5581 | enumm: None, |
5582 | }, |
5583 | ], |
5584 | }, |
5585 | FieldSet { |
5586 | name: "Hcfg" , |
5587 | extends: None, |
5588 | description: Some( |
5589 | "Host configuration register" , |
5590 | ), |
5591 | bit_size: 32, |
5592 | fields: &[ |
5593 | Field { |
5594 | name: "fslspcs" , |
5595 | description: Some( |
5596 | "FS/LS PHY clock select" , |
5597 | ), |
5598 | bit_offset: BitOffset::Regular( |
5599 | RegularBitOffset { |
5600 | offset: 0, |
5601 | }, |
5602 | ), |
5603 | bit_size: 2, |
5604 | array: None, |
5605 | enumm: None, |
5606 | }, |
5607 | Field { |
5608 | name: "fslss" , |
5609 | description: Some( |
5610 | "FS- and LS-only support" , |
5611 | ), |
5612 | bit_offset: BitOffset::Regular( |
5613 | RegularBitOffset { |
5614 | offset: 2, |
5615 | }, |
5616 | ), |
5617 | bit_size: 1, |
5618 | array: None, |
5619 | enumm: None, |
5620 | }, |
5621 | Field { |
5622 | name: "descdma" , |
5623 | description: Some( |
5624 | "Descriptor DMA-mode enable (qtd)" , |
5625 | ), |
5626 | bit_offset: BitOffset::Regular( |
5627 | RegularBitOffset { |
5628 | offset: 23, |
5629 | }, |
5630 | ), |
5631 | bit_size: 1, |
5632 | array: None, |
5633 | enumm: None, |
5634 | }, |
5635 | Field { |
5636 | name: "frlistlen" , |
5637 | description: Some( |
5638 | "Frame list length" , |
5639 | ), |
5640 | bit_offset: BitOffset::Regular( |
5641 | RegularBitOffset { |
5642 | offset: 24, |
5643 | }, |
5644 | ), |
5645 | bit_size: 2, |
5646 | array: None, |
5647 | enumm: Some( |
5648 | "Frlistlen" , |
5649 | ), |
5650 | }, |
5651 | Field { |
5652 | name: "perschedena" , |
5653 | description: Some( |
5654 | "Period scheduling enable" , |
5655 | ), |
5656 | bit_offset: BitOffset::Regular( |
5657 | RegularBitOffset { |
5658 | offset: 26, |
5659 | }, |
5660 | ), |
5661 | bit_size: 1, |
5662 | array: None, |
5663 | enumm: None, |
5664 | }, |
5665 | ], |
5666 | }, |
5667 | FieldSet { |
5668 | name: "Hcint" , |
5669 | extends: None, |
5670 | description: Some( |
5671 | "Host channel interrupt register" , |
5672 | ), |
5673 | bit_size: 32, |
5674 | fields: &[ |
5675 | Field { |
5676 | name: "xfrc" , |
5677 | description: Some( |
5678 | "Transfer completed" , |
5679 | ), |
5680 | bit_offset: BitOffset::Regular( |
5681 | RegularBitOffset { |
5682 | offset: 0, |
5683 | }, |
5684 | ), |
5685 | bit_size: 1, |
5686 | array: None, |
5687 | enumm: None, |
5688 | }, |
5689 | Field { |
5690 | name: "chh" , |
5691 | description: Some( |
5692 | "Channel halted" , |
5693 | ), |
5694 | bit_offset: BitOffset::Regular( |
5695 | RegularBitOffset { |
5696 | offset: 1, |
5697 | }, |
5698 | ), |
5699 | bit_size: 1, |
5700 | array: None, |
5701 | enumm: None, |
5702 | }, |
5703 | Field { |
5704 | name: "stall" , |
5705 | description: Some( |
5706 | "STALL response received interrupt" , |
5707 | ), |
5708 | bit_offset: BitOffset::Regular( |
5709 | RegularBitOffset { |
5710 | offset: 3, |
5711 | }, |
5712 | ), |
5713 | bit_size: 1, |
5714 | array: None, |
5715 | enumm: None, |
5716 | }, |
5717 | Field { |
5718 | name: "nak" , |
5719 | description: Some( |
5720 | "NAK response received interrupt" , |
5721 | ), |
5722 | bit_offset: BitOffset::Regular( |
5723 | RegularBitOffset { |
5724 | offset: 4, |
5725 | }, |
5726 | ), |
5727 | bit_size: 1, |
5728 | array: None, |
5729 | enumm: None, |
5730 | }, |
5731 | Field { |
5732 | name: "ack" , |
5733 | description: Some( |
5734 | "ACK response received/transmitted interrupt" , |
5735 | ), |
5736 | bit_offset: BitOffset::Regular( |
5737 | RegularBitOffset { |
5738 | offset: 5, |
5739 | }, |
5740 | ), |
5741 | bit_size: 1, |
5742 | array: None, |
5743 | enumm: None, |
5744 | }, |
5745 | Field { |
5746 | name: "txerr" , |
5747 | description: Some( |
5748 | "Transaction error" , |
5749 | ), |
5750 | bit_offset: BitOffset::Regular( |
5751 | RegularBitOffset { |
5752 | offset: 7, |
5753 | }, |
5754 | ), |
5755 | bit_size: 1, |
5756 | array: None, |
5757 | enumm: None, |
5758 | }, |
5759 | Field { |
5760 | name: "bberr" , |
5761 | description: Some( |
5762 | "Babble error" , |
5763 | ), |
5764 | bit_offset: BitOffset::Regular( |
5765 | RegularBitOffset { |
5766 | offset: 8, |
5767 | }, |
5768 | ), |
5769 | bit_size: 1, |
5770 | array: None, |
5771 | enumm: None, |
5772 | }, |
5773 | Field { |
5774 | name: "frmor" , |
5775 | description: Some( |
5776 | "Frame overrun" , |
5777 | ), |
5778 | bit_offset: BitOffset::Regular( |
5779 | RegularBitOffset { |
5780 | offset: 9, |
5781 | }, |
5782 | ), |
5783 | bit_size: 1, |
5784 | array: None, |
5785 | enumm: None, |
5786 | }, |
5787 | Field { |
5788 | name: "dterr" , |
5789 | description: Some( |
5790 | "Data toggle error" , |
5791 | ), |
5792 | bit_offset: BitOffset::Regular( |
5793 | RegularBitOffset { |
5794 | offset: 10, |
5795 | }, |
5796 | ), |
5797 | bit_size: 1, |
5798 | array: None, |
5799 | enumm: None, |
5800 | }, |
5801 | ], |
5802 | }, |
5803 | FieldSet { |
5804 | name: "Hcintmsk" , |
5805 | extends: None, |
5806 | description: Some( |
5807 | "Host channel mask register" , |
5808 | ), |
5809 | bit_size: 32, |
5810 | fields: &[ |
5811 | Field { |
5812 | name: "xfrcm" , |
5813 | description: Some( |
5814 | "Transfer completed mask" , |
5815 | ), |
5816 | bit_offset: BitOffset::Regular( |
5817 | RegularBitOffset { |
5818 | offset: 0, |
5819 | }, |
5820 | ), |
5821 | bit_size: 1, |
5822 | array: None, |
5823 | enumm: None, |
5824 | }, |
5825 | Field { |
5826 | name: "chhm" , |
5827 | description: Some( |
5828 | "Channel halted mask" , |
5829 | ), |
5830 | bit_offset: BitOffset::Regular( |
5831 | RegularBitOffset { |
5832 | offset: 1, |
5833 | }, |
5834 | ), |
5835 | bit_size: 1, |
5836 | array: None, |
5837 | enumm: None, |
5838 | }, |
5839 | Field { |
5840 | name: "stallm" , |
5841 | description: Some( |
5842 | "STALL response received interrupt mask" , |
5843 | ), |
5844 | bit_offset: BitOffset::Regular( |
5845 | RegularBitOffset { |
5846 | offset: 3, |
5847 | }, |
5848 | ), |
5849 | bit_size: 1, |
5850 | array: None, |
5851 | enumm: None, |
5852 | }, |
5853 | Field { |
5854 | name: "nakm" , |
5855 | description: Some( |
5856 | "NAK response received interrupt mask" , |
5857 | ), |
5858 | bit_offset: BitOffset::Regular( |
5859 | RegularBitOffset { |
5860 | offset: 4, |
5861 | }, |
5862 | ), |
5863 | bit_size: 1, |
5864 | array: None, |
5865 | enumm: None, |
5866 | }, |
5867 | Field { |
5868 | name: "ackm" , |
5869 | description: Some( |
5870 | "ACK response received/transmitted interrupt mask" , |
5871 | ), |
5872 | bit_offset: BitOffset::Regular( |
5873 | RegularBitOffset { |
5874 | offset: 5, |
5875 | }, |
5876 | ), |
5877 | bit_size: 1, |
5878 | array: None, |
5879 | enumm: None, |
5880 | }, |
5881 | Field { |
5882 | name: "nyet" , |
5883 | description: Some( |
5884 | "Response received interrupt mask" , |
5885 | ), |
5886 | bit_offset: BitOffset::Regular( |
5887 | RegularBitOffset { |
5888 | offset: 6, |
5889 | }, |
5890 | ), |
5891 | bit_size: 1, |
5892 | array: None, |
5893 | enumm: None, |
5894 | }, |
5895 | Field { |
5896 | name: "txerrm" , |
5897 | description: Some( |
5898 | "Transaction error mask" , |
5899 | ), |
5900 | bit_offset: BitOffset::Regular( |
5901 | RegularBitOffset { |
5902 | offset: 7, |
5903 | }, |
5904 | ), |
5905 | bit_size: 1, |
5906 | array: None, |
5907 | enumm: None, |
5908 | }, |
5909 | Field { |
5910 | name: "bberrm" , |
5911 | description: Some( |
5912 | "Babble error mask" , |
5913 | ), |
5914 | bit_offset: BitOffset::Regular( |
5915 | RegularBitOffset { |
5916 | offset: 8, |
5917 | }, |
5918 | ), |
5919 | bit_size: 1, |
5920 | array: None, |
5921 | enumm: None, |
5922 | }, |
5923 | Field { |
5924 | name: "frmorm" , |
5925 | description: Some( |
5926 | "Frame overrun mask" , |
5927 | ), |
5928 | bit_offset: BitOffset::Regular( |
5929 | RegularBitOffset { |
5930 | offset: 9, |
5931 | }, |
5932 | ), |
5933 | bit_size: 1, |
5934 | array: None, |
5935 | enumm: None, |
5936 | }, |
5937 | Field { |
5938 | name: "dterrm" , |
5939 | description: Some( |
5940 | "Data toggle error mask" , |
5941 | ), |
5942 | bit_offset: BitOffset::Regular( |
5943 | RegularBitOffset { |
5944 | offset: 10, |
5945 | }, |
5946 | ), |
5947 | bit_size: 1, |
5948 | array: None, |
5949 | enumm: None, |
5950 | }, |
5951 | ], |
5952 | }, |
5953 | FieldSet { |
5954 | name: "Hctsiz" , |
5955 | extends: None, |
5956 | description: Some( |
5957 | "Host channel transfer size register" , |
5958 | ), |
5959 | bit_size: 32, |
5960 | fields: &[ |
5961 | Field { |
5962 | name: "schedinfo" , |
5963 | description: Some( |
5964 | "Schedule info for isochronuous & interrupt pipes (xfrsiz[7:0])" , |
5965 | ), |
5966 | bit_offset: BitOffset::Regular( |
5967 | RegularBitOffset { |
5968 | offset: 0, |
5969 | }, |
5970 | ), |
5971 | bit_size: 8, |
5972 | array: None, |
5973 | enumm: None, |
5974 | }, |
5975 | Field { |
5976 | name: "xfrsiz" , |
5977 | description: Some( |
5978 | "Transfer size for non-isochronuous/interrupt pipes" , |
5979 | ), |
5980 | bit_offset: BitOffset::Regular( |
5981 | RegularBitOffset { |
5982 | offset: 0, |
5983 | }, |
5984 | ), |
5985 | bit_size: 19, |
5986 | array: None, |
5987 | enumm: None, |
5988 | }, |
5989 | Field { |
5990 | name: "ntdl" , |
5991 | description: Some( |
5992 | "NTD descriptor list length for isochronuous & interrupt pipes (xfrsiz[15:8], note val+1 is actual length)" , |
5993 | ), |
5994 | bit_offset: BitOffset::Regular( |
5995 | RegularBitOffset { |
5996 | offset: 8, |
5997 | }, |
5998 | ), |
5999 | bit_size: 8, |
6000 | array: None, |
6001 | enumm: None, |
6002 | }, |
6003 | Field { |
6004 | name: "pktcnt" , |
6005 | description: Some( |
6006 | "Packet count" , |
6007 | ), |
6008 | bit_offset: BitOffset::Regular( |
6009 | RegularBitOffset { |
6010 | offset: 19, |
6011 | }, |
6012 | ), |
6013 | bit_size: 10, |
6014 | array: None, |
6015 | enumm: None, |
6016 | }, |
6017 | Field { |
6018 | name: "dpid" , |
6019 | description: Some( |
6020 | "Data PID" , |
6021 | ), |
6022 | bit_offset: BitOffset::Regular( |
6023 | RegularBitOffset { |
6024 | offset: 29, |
6025 | }, |
6026 | ), |
6027 | bit_size: 2, |
6028 | array: None, |
6029 | enumm: None, |
6030 | }, |
6031 | Field { |
6032 | name: "doping" , |
6033 | description: Some( |
6034 | "Do Ping" , |
6035 | ), |
6036 | bit_offset: BitOffset::Regular( |
6037 | RegularBitOffset { |
6038 | offset: 31, |
6039 | }, |
6040 | ), |
6041 | bit_size: 1, |
6042 | array: None, |
6043 | enumm: None, |
6044 | }, |
6045 | ], |
6046 | }, |
6047 | FieldSet { |
6048 | name: "Hfir" , |
6049 | extends: None, |
6050 | description: Some( |
6051 | "Host frame interval register" , |
6052 | ), |
6053 | bit_size: 32, |
6054 | fields: &[ |
6055 | Field { |
6056 | name: "frivl" , |
6057 | description: Some( |
6058 | "Frame interval" , |
6059 | ), |
6060 | bit_offset: BitOffset::Regular( |
6061 | RegularBitOffset { |
6062 | offset: 0, |
6063 | }, |
6064 | ), |
6065 | bit_size: 16, |
6066 | array: None, |
6067 | enumm: None, |
6068 | }, |
6069 | Field { |
6070 | name: "rldctrl" , |
6071 | description: Some( |
6072 | "Dynamic Loading Control" , |
6073 | ), |
6074 | bit_offset: BitOffset::Regular( |
6075 | RegularBitOffset { |
6076 | offset: 16, |
6077 | }, |
6078 | ), |
6079 | bit_size: 1, |
6080 | array: None, |
6081 | enumm: None, |
6082 | }, |
6083 | ], |
6084 | }, |
6085 | FieldSet { |
6086 | name: "Hfnum" , |
6087 | extends: None, |
6088 | description: Some( |
6089 | "Host frame number/frame time remaining register" , |
6090 | ), |
6091 | bit_size: 32, |
6092 | fields: &[ |
6093 | Field { |
6094 | name: "frnum" , |
6095 | description: Some( |
6096 | "Frame number" , |
6097 | ), |
6098 | bit_offset: BitOffset::Regular( |
6099 | RegularBitOffset { |
6100 | offset: 0, |
6101 | }, |
6102 | ), |
6103 | bit_size: 16, |
6104 | array: None, |
6105 | enumm: None, |
6106 | }, |
6107 | Field { |
6108 | name: "ftrem" , |
6109 | description: Some( |
6110 | "Frame time remaining" , |
6111 | ), |
6112 | bit_offset: BitOffset::Regular( |
6113 | RegularBitOffset { |
6114 | offset: 16, |
6115 | }, |
6116 | ), |
6117 | bit_size: 16, |
6118 | array: None, |
6119 | enumm: None, |
6120 | }, |
6121 | ], |
6122 | }, |
6123 | FieldSet { |
6124 | name: "Hnptxsts" , |
6125 | extends: None, |
6126 | description: Some( |
6127 | "Non-periodic transmit FIFO/queue status register" , |
6128 | ), |
6129 | bit_size: 32, |
6130 | fields: &[ |
6131 | Field { |
6132 | name: "nptxfsav" , |
6133 | description: Some( |
6134 | "Non-periodic TxFIFO space available" , |
6135 | ), |
6136 | bit_offset: BitOffset::Regular( |
6137 | RegularBitOffset { |
6138 | offset: 0, |
6139 | }, |
6140 | ), |
6141 | bit_size: 16, |
6142 | array: None, |
6143 | enumm: None, |
6144 | }, |
6145 | Field { |
6146 | name: "nptqxsav" , |
6147 | description: Some( |
6148 | "Non-periodic transmit request queue space available" , |
6149 | ), |
6150 | bit_offset: BitOffset::Regular( |
6151 | RegularBitOffset { |
6152 | offset: 16, |
6153 | }, |
6154 | ), |
6155 | bit_size: 8, |
6156 | array: None, |
6157 | enumm: None, |
6158 | }, |
6159 | Field { |
6160 | name: "nptxqtop" , |
6161 | description: Some( |
6162 | "Top of the non-periodic transmit request queue" , |
6163 | ), |
6164 | bit_offset: BitOffset::Regular( |
6165 | RegularBitOffset { |
6166 | offset: 24, |
6167 | }, |
6168 | ), |
6169 | bit_size: 7, |
6170 | array: None, |
6171 | enumm: None, |
6172 | }, |
6173 | ], |
6174 | }, |
6175 | FieldSet { |
6176 | name: "Hprt" , |
6177 | extends: None, |
6178 | description: Some( |
6179 | "Host port control and status register" , |
6180 | ), |
6181 | bit_size: 32, |
6182 | fields: &[ |
6183 | Field { |
6184 | name: "pcsts" , |
6185 | description: Some( |
6186 | "Port connect status" , |
6187 | ), |
6188 | bit_offset: BitOffset::Regular( |
6189 | RegularBitOffset { |
6190 | offset: 0, |
6191 | }, |
6192 | ), |
6193 | bit_size: 1, |
6194 | array: None, |
6195 | enumm: None, |
6196 | }, |
6197 | Field { |
6198 | name: "pcdet" , |
6199 | description: Some( |
6200 | "Port connect detected" , |
6201 | ), |
6202 | bit_offset: BitOffset::Regular( |
6203 | RegularBitOffset { |
6204 | offset: 1, |
6205 | }, |
6206 | ), |
6207 | bit_size: 1, |
6208 | array: None, |
6209 | enumm: None, |
6210 | }, |
6211 | Field { |
6212 | name: "pena" , |
6213 | description: Some( |
6214 | "Port enable (W1C)" , |
6215 | ), |
6216 | bit_offset: BitOffset::Regular( |
6217 | RegularBitOffset { |
6218 | offset: 2, |
6219 | }, |
6220 | ), |
6221 | bit_size: 1, |
6222 | array: None, |
6223 | enumm: None, |
6224 | }, |
6225 | Field { |
6226 | name: "penchng" , |
6227 | description: Some( |
6228 | "Port enable/disable change" , |
6229 | ), |
6230 | bit_offset: BitOffset::Regular( |
6231 | RegularBitOffset { |
6232 | offset: 3, |
6233 | }, |
6234 | ), |
6235 | bit_size: 1, |
6236 | array: None, |
6237 | enumm: None, |
6238 | }, |
6239 | Field { |
6240 | name: "poca" , |
6241 | description: Some( |
6242 | "Port overcurrent active" , |
6243 | ), |
6244 | bit_offset: BitOffset::Regular( |
6245 | RegularBitOffset { |
6246 | offset: 4, |
6247 | }, |
6248 | ), |
6249 | bit_size: 1, |
6250 | array: None, |
6251 | enumm: None, |
6252 | }, |
6253 | Field { |
6254 | name: "pocchng" , |
6255 | description: Some( |
6256 | "Port overcurrent change" , |
6257 | ), |
6258 | bit_offset: BitOffset::Regular( |
6259 | RegularBitOffset { |
6260 | offset: 5, |
6261 | }, |
6262 | ), |
6263 | bit_size: 1, |
6264 | array: None, |
6265 | enumm: None, |
6266 | }, |
6267 | Field { |
6268 | name: "pres" , |
6269 | description: Some( |
6270 | "Port resume" , |
6271 | ), |
6272 | bit_offset: BitOffset::Regular( |
6273 | RegularBitOffset { |
6274 | offset: 6, |
6275 | }, |
6276 | ), |
6277 | bit_size: 1, |
6278 | array: None, |
6279 | enumm: None, |
6280 | }, |
6281 | Field { |
6282 | name: "psusp" , |
6283 | description: Some( |
6284 | "Port suspend" , |
6285 | ), |
6286 | bit_offset: BitOffset::Regular( |
6287 | RegularBitOffset { |
6288 | offset: 7, |
6289 | }, |
6290 | ), |
6291 | bit_size: 1, |
6292 | array: None, |
6293 | enumm: None, |
6294 | }, |
6295 | Field { |
6296 | name: "prst" , |
6297 | description: Some( |
6298 | "Port reset" , |
6299 | ), |
6300 | bit_offset: BitOffset::Regular( |
6301 | RegularBitOffset { |
6302 | offset: 8, |
6303 | }, |
6304 | ), |
6305 | bit_size: 1, |
6306 | array: None, |
6307 | enumm: None, |
6308 | }, |
6309 | Field { |
6310 | name: "plsts" , |
6311 | description: Some( |
6312 | "Port line status" , |
6313 | ), |
6314 | bit_offset: BitOffset::Regular( |
6315 | RegularBitOffset { |
6316 | offset: 10, |
6317 | }, |
6318 | ), |
6319 | bit_size: 2, |
6320 | array: None, |
6321 | enumm: None, |
6322 | }, |
6323 | Field { |
6324 | name: "ppwr" , |
6325 | description: Some( |
6326 | "Port power" , |
6327 | ), |
6328 | bit_offset: BitOffset::Regular( |
6329 | RegularBitOffset { |
6330 | offset: 12, |
6331 | }, |
6332 | ), |
6333 | bit_size: 1, |
6334 | array: None, |
6335 | enumm: None, |
6336 | }, |
6337 | Field { |
6338 | name: "ptctl" , |
6339 | description: Some( |
6340 | "Port test control" , |
6341 | ), |
6342 | bit_offset: BitOffset::Regular( |
6343 | RegularBitOffset { |
6344 | offset: 13, |
6345 | }, |
6346 | ), |
6347 | bit_size: 4, |
6348 | array: None, |
6349 | enumm: None, |
6350 | }, |
6351 | Field { |
6352 | name: "pspd" , |
6353 | description: Some( |
6354 | "Port speed" , |
6355 | ), |
6356 | bit_offset: BitOffset::Regular( |
6357 | RegularBitOffset { |
6358 | offset: 17, |
6359 | }, |
6360 | ), |
6361 | bit_size: 2, |
6362 | array: None, |
6363 | enumm: None, |
6364 | }, |
6365 | ], |
6366 | }, |
6367 | FieldSet { |
6368 | name: "Hptxsts" , |
6369 | extends: None, |
6370 | description: Some( |
6371 | "Periodic transmit FIFO/queue status register" , |
6372 | ), |
6373 | bit_size: 32, |
6374 | fields: &[ |
6375 | Field { |
6376 | name: "ptxfsavl" , |
6377 | description: Some( |
6378 | "Periodic transmit data FIFO space available" , |
6379 | ), |
6380 | bit_offset: BitOffset::Regular( |
6381 | RegularBitOffset { |
6382 | offset: 0, |
6383 | }, |
6384 | ), |
6385 | bit_size: 16, |
6386 | array: None, |
6387 | enumm: None, |
6388 | }, |
6389 | Field { |
6390 | name: "ptxqsav" , |
6391 | description: Some( |
6392 | "Periodic transmit request queue space available" , |
6393 | ), |
6394 | bit_offset: BitOffset::Regular( |
6395 | RegularBitOffset { |
6396 | offset: 16, |
6397 | }, |
6398 | ), |
6399 | bit_size: 8, |
6400 | array: None, |
6401 | enumm: None, |
6402 | }, |
6403 | Field { |
6404 | name: "ptxqtop" , |
6405 | description: Some( |
6406 | "Top of the periodic transmit request queue" , |
6407 | ), |
6408 | bit_offset: BitOffset::Regular( |
6409 | RegularBitOffset { |
6410 | offset: 24, |
6411 | }, |
6412 | ), |
6413 | bit_size: 8, |
6414 | array: None, |
6415 | enumm: None, |
6416 | }, |
6417 | ], |
6418 | }, |
6419 | FieldSet { |
6420 | name: "Pcgcctl" , |
6421 | extends: None, |
6422 | description: Some( |
6423 | "Power and clock gating control register" , |
6424 | ), |
6425 | bit_size: 32, |
6426 | fields: &[ |
6427 | Field { |
6428 | name: "stppclk" , |
6429 | description: Some( |
6430 | "Stop PHY clock" , |
6431 | ), |
6432 | bit_offset: BitOffset::Regular( |
6433 | RegularBitOffset { |
6434 | offset: 0, |
6435 | }, |
6436 | ), |
6437 | bit_size: 1, |
6438 | array: None, |
6439 | enumm: None, |
6440 | }, |
6441 | Field { |
6442 | name: "gatehclk" , |
6443 | description: Some( |
6444 | "Gate HCLK" , |
6445 | ), |
6446 | bit_offset: BitOffset::Regular( |
6447 | RegularBitOffset { |
6448 | offset: 1, |
6449 | }, |
6450 | ), |
6451 | bit_size: 1, |
6452 | array: None, |
6453 | enumm: None, |
6454 | }, |
6455 | Field { |
6456 | name: "physusp" , |
6457 | description: Some( |
6458 | "PHY Suspended" , |
6459 | ), |
6460 | bit_offset: BitOffset::Regular( |
6461 | RegularBitOffset { |
6462 | offset: 4, |
6463 | }, |
6464 | ), |
6465 | bit_size: 1, |
6466 | array: None, |
6467 | enumm: None, |
6468 | }, |
6469 | ], |
6470 | }, |
6471 | ], |
6472 | enums: &[ |
6473 | Enum { |
6474 | name: "Dpid" , |
6475 | description: None, |
6476 | bit_size: 2, |
6477 | variants: &[ |
6478 | EnumVariant { |
6479 | name: "DATA0" , |
6480 | description: None, |
6481 | value: 0, |
6482 | }, |
6483 | EnumVariant { |
6484 | name: "DATA2" , |
6485 | description: None, |
6486 | value: 1, |
6487 | }, |
6488 | EnumVariant { |
6489 | name: "DATA1" , |
6490 | description: None, |
6491 | value: 2, |
6492 | }, |
6493 | EnumVariant { |
6494 | name: "MDATA" , |
6495 | description: None, |
6496 | value: 3, |
6497 | }, |
6498 | ], |
6499 | }, |
6500 | Enum { |
6501 | name: "Dspd" , |
6502 | description: None, |
6503 | bit_size: 2, |
6504 | variants: &[ |
6505 | EnumVariant { |
6506 | name: "HIGH_SPEED" , |
6507 | description: Some( |
6508 | "High speed" , |
6509 | ), |
6510 | value: 0, |
6511 | }, |
6512 | EnumVariant { |
6513 | name: "FULL_SPEED_EXTERNAL" , |
6514 | description: Some( |
6515 | "Full speed using external ULPI PHY" , |
6516 | ), |
6517 | value: 1, |
6518 | }, |
6519 | EnumVariant { |
6520 | name: "FULL_SPEED_INTERNAL" , |
6521 | description: Some( |
6522 | "Full speed using internal embedded PHY" , |
6523 | ), |
6524 | value: 3, |
6525 | }, |
6526 | ], |
6527 | }, |
6528 | Enum { |
6529 | name: "Eptyp" , |
6530 | description: None, |
6531 | bit_size: 2, |
6532 | variants: &[ |
6533 | EnumVariant { |
6534 | name: "CONTROL" , |
6535 | description: None, |
6536 | value: 0, |
6537 | }, |
6538 | EnumVariant { |
6539 | name: "ISOCHRONOUS" , |
6540 | description: None, |
6541 | value: 1, |
6542 | }, |
6543 | EnumVariant { |
6544 | name: "BULK" , |
6545 | description: None, |
6546 | value: 2, |
6547 | }, |
6548 | EnumVariant { |
6549 | name: "INTERRUPT" , |
6550 | description: None, |
6551 | value: 3, |
6552 | }, |
6553 | ], |
6554 | }, |
6555 | Enum { |
6556 | name: "Frlistlen" , |
6557 | description: None, |
6558 | bit_size: 2, |
6559 | variants: &[ |
6560 | EnumVariant { |
6561 | name: "LEN8" , |
6562 | description: Some( |
6563 | "Length = 8" , |
6564 | ), |
6565 | value: 0, |
6566 | }, |
6567 | EnumVariant { |
6568 | name: "LEN16" , |
6569 | description: Some( |
6570 | "Length = 16" , |
6571 | ), |
6572 | value: 1, |
6573 | }, |
6574 | EnumVariant { |
6575 | name: "LEN32" , |
6576 | description: Some( |
6577 | "Length = 32" , |
6578 | ), |
6579 | value: 2, |
6580 | }, |
6581 | EnumVariant { |
6582 | name: "LEN64" , |
6583 | description: Some( |
6584 | "Length = 64" , |
6585 | ), |
6586 | value: 3, |
6587 | }, |
6588 | ], |
6589 | }, |
6590 | Enum { |
6591 | name: "Pfivl" , |
6592 | description: None, |
6593 | bit_size: 2, |
6594 | variants: &[ |
6595 | EnumVariant { |
6596 | name: "FRAME_INTERVAL_80" , |
6597 | description: Some( |
6598 | "80% of the frame interval" , |
6599 | ), |
6600 | value: 0, |
6601 | }, |
6602 | EnumVariant { |
6603 | name: "FRAME_INTERVAL_85" , |
6604 | description: Some( |
6605 | "85% of the frame interval" , |
6606 | ), |
6607 | value: 1, |
6608 | }, |
6609 | EnumVariant { |
6610 | name: "FRAME_INTERVAL_90" , |
6611 | description: Some( |
6612 | "90% of the frame interval" , |
6613 | ), |
6614 | value: 2, |
6615 | }, |
6616 | EnumVariant { |
6617 | name: "FRAME_INTERVAL_95" , |
6618 | description: Some( |
6619 | "95% of the frame interval" , |
6620 | ), |
6621 | value: 3, |
6622 | }, |
6623 | ], |
6624 | }, |
6625 | Enum { |
6626 | name: "Pktstsd" , |
6627 | description: None, |
6628 | bit_size: 4, |
6629 | variants: &[ |
6630 | EnumVariant { |
6631 | name: "OUT_NAK" , |
6632 | description: Some( |
6633 | "Global OUT NAK (triggers an interrupt)" , |
6634 | ), |
6635 | value: 1, |
6636 | }, |
6637 | EnumVariant { |
6638 | name: "OUT_DATA_RX" , |
6639 | description: Some( |
6640 | "OUT data packet received" , |
6641 | ), |
6642 | value: 2, |
6643 | }, |
6644 | EnumVariant { |
6645 | name: "OUT_DATA_DONE" , |
6646 | description: Some( |
6647 | "OUT transfer completed (triggers an interrupt)" , |
6648 | ), |
6649 | value: 3, |
6650 | }, |
6651 | EnumVariant { |
6652 | name: "SETUP_DATA_DONE" , |
6653 | description: Some( |
6654 | "SETUP transaction completed (triggers an interrupt)" , |
6655 | ), |
6656 | value: 4, |
6657 | }, |
6658 | EnumVariant { |
6659 | name: "SETUP_DATA_RX" , |
6660 | description: Some( |
6661 | "SETUP data packet received" , |
6662 | ), |
6663 | value: 6, |
6664 | }, |
6665 | ], |
6666 | }, |
6667 | Enum { |
6668 | name: "Pktstsh" , |
6669 | description: None, |
6670 | bit_size: 4, |
6671 | variants: &[ |
6672 | EnumVariant { |
6673 | name: "IN_DATA_RX" , |
6674 | description: Some( |
6675 | "IN data packet received" , |
6676 | ), |
6677 | value: 2, |
6678 | }, |
6679 | EnumVariant { |
6680 | name: "IN_DATA_DONE" , |
6681 | description: Some( |
6682 | "IN transfer completed (triggers an interrupt)" , |
6683 | ), |
6684 | value: 3, |
6685 | }, |
6686 | EnumVariant { |
6687 | name: "DATA_TOGGLE_ERR" , |
6688 | description: Some( |
6689 | "Data toggle error (triggers an interrupt)" , |
6690 | ), |
6691 | value: 5, |
6692 | }, |
6693 | EnumVariant { |
6694 | name: "CHANNEL_HALTED" , |
6695 | description: Some( |
6696 | "Channel halted (triggers an interrupt)" , |
6697 | ), |
6698 | value: 7, |
6699 | }, |
6700 | ], |
6701 | }, |
6702 | ], |
6703 | }; |
6704 | |