1
2use crate::metadata::ir::*;
3pub(crate) static REGISTERS: IR = IR {
4 blocks: &[
5 Block {
6 name: "Tamp",
7 extends: None,
8 description: Some(
9 "Tamper and backup registers",
10 ),
11 items: &[
12 BlockItem {
13 name: "cr1",
14 description: Some(
15 "TAMP control register 1",
16 ),
17 array: None,
18 byte_offset: 0x0,
19 inner: BlockItemInner::Register(
20 Register {
21 access: Access::ReadWrite,
22 bit_size: 32,
23 fieldset: Some(
24 "Cr1",
25 ),
26 },
27 ),
28 },
29 BlockItem {
30 name: "cr2",
31 description: Some(
32 "TAMP control register 2",
33 ),
34 array: None,
35 byte_offset: 0x4,
36 inner: BlockItemInner::Register(
37 Register {
38 access: Access::ReadWrite,
39 bit_size: 32,
40 fieldset: Some(
41 "Cr2",
42 ),
43 },
44 ),
45 },
46 BlockItem {
47 name: "cr3",
48 description: Some(
49 "TAMP control register 3",
50 ),
51 array: None,
52 byte_offset: 0x8,
53 inner: BlockItemInner::Register(
54 Register {
55 access: Access::ReadWrite,
56 bit_size: 32,
57 fieldset: Some(
58 "Cr3",
59 ),
60 },
61 ),
62 },
63 BlockItem {
64 name: "fltcr",
65 description: Some(
66 "TAMP filter control register",
67 ),
68 array: None,
69 byte_offset: 0xc,
70 inner: BlockItemInner::Register(
71 Register {
72 access: Access::ReadWrite,
73 bit_size: 32,
74 fieldset: Some(
75 "Fltcr",
76 ),
77 },
78 ),
79 },
80 BlockItem {
81 name: "atcr1",
82 description: Some(
83 "TAMP active tamper control register 1",
84 ),
85 array: None,
86 byte_offset: 0x10,
87 inner: BlockItemInner::Register(
88 Register {
89 access: Access::ReadWrite,
90 bit_size: 32,
91 fieldset: Some(
92 "Atcr1",
93 ),
94 },
95 ),
96 },
97 BlockItem {
98 name: "atseedr",
99 description: Some(
100 "TAMP active tamper seed register",
101 ),
102 array: None,
103 byte_offset: 0x14,
104 inner: BlockItemInner::Register(
105 Register {
106 access: Access::ReadWrite,
107 bit_size: 32,
108 fieldset: Some(
109 "Atseedr",
110 ),
111 },
112 ),
113 },
114 BlockItem {
115 name: "ator",
116 description: Some(
117 "TAMP active tamper output register",
118 ),
119 array: None,
120 byte_offset: 0x18,
121 inner: BlockItemInner::Register(
122 Register {
123 access: Access::ReadWrite,
124 bit_size: 32,
125 fieldset: Some(
126 "Ator",
127 ),
128 },
129 ),
130 },
131 BlockItem {
132 name: "atcr2",
133 description: Some(
134 "TAMP active tamper control register 2",
135 ),
136 array: None,
137 byte_offset: 0x1c,
138 inner: BlockItemInner::Register(
139 Register {
140 access: Access::ReadWrite,
141 bit_size: 32,
142 fieldset: Some(
143 "Atcr2",
144 ),
145 },
146 ),
147 },
148 BlockItem {
149 name: "seccfgr",
150 description: Some(
151 "TAMP secure mode register",
152 ),
153 array: None,
154 byte_offset: 0x20,
155 inner: BlockItemInner::Register(
156 Register {
157 access: Access::ReadWrite,
158 bit_size: 32,
159 fieldset: Some(
160 "Seccfgr",
161 ),
162 },
163 ),
164 },
165 BlockItem {
166 name: "privcr",
167 description: Some(
168 "TAMP privilege mode control register",
169 ),
170 array: None,
171 byte_offset: 0x24,
172 inner: BlockItemInner::Register(
173 Register {
174 access: Access::ReadWrite,
175 bit_size: 32,
176 fieldset: Some(
177 "Privcr",
178 ),
179 },
180 ),
181 },
182 BlockItem {
183 name: "ier",
184 description: Some(
185 "TAMP interrupt enable register",
186 ),
187 array: None,
188 byte_offset: 0x2c,
189 inner: BlockItemInner::Register(
190 Register {
191 access: Access::ReadWrite,
192 bit_size: 32,
193 fieldset: Some(
194 "Ier",
195 ),
196 },
197 ),
198 },
199 BlockItem {
200 name: "sr",
201 description: Some(
202 "TAMP status register",
203 ),
204 array: None,
205 byte_offset: 0x30,
206 inner: BlockItemInner::Register(
207 Register {
208 access: Access::ReadWrite,
209 bit_size: 32,
210 fieldset: Some(
211 "Sr",
212 ),
213 },
214 ),
215 },
216 BlockItem {
217 name: "misr",
218 description: Some(
219 "TAMP non-secure masked interrupt status register",
220 ),
221 array: None,
222 byte_offset: 0x34,
223 inner: BlockItemInner::Register(
224 Register {
225 access: Access::ReadWrite,
226 bit_size: 32,
227 fieldset: Some(
228 "Misr",
229 ),
230 },
231 ),
232 },
233 BlockItem {
234 name: "smisr",
235 description: Some(
236 "TAMP secure masked interrupt status register",
237 ),
238 array: None,
239 byte_offset: 0x38,
240 inner: BlockItemInner::Register(
241 Register {
242 access: Access::ReadWrite,
243 bit_size: 32,
244 fieldset: Some(
245 "Smisr",
246 ),
247 },
248 ),
249 },
250 BlockItem {
251 name: "scr",
252 description: Some(
253 "TAMP status clear register",
254 ),
255 array: None,
256 byte_offset: 0x3c,
257 inner: BlockItemInner::Register(
258 Register {
259 access: Access::ReadWrite,
260 bit_size: 32,
261 fieldset: Some(
262 "Scr",
263 ),
264 },
265 ),
266 },
267 BlockItem {
268 name: "countr",
269 description: Some(
270 "TAMP monotonic counter 1 register",
271 ),
272 array: None,
273 byte_offset: 0x40,
274 inner: BlockItemInner::Register(
275 Register {
276 access: Access::ReadWrite,
277 bit_size: 32,
278 fieldset: Some(
279 "Countr",
280 ),
281 },
282 ),
283 },
284 BlockItem {
285 name: "ercfgr",
286 description: Some(
287 "TAMP erase configuration register",
288 ),
289 array: None,
290 byte_offset: 0x54,
291 inner: BlockItemInner::Register(
292 Register {
293 access: Access::ReadWrite,
294 bit_size: 32,
295 fieldset: Some(
296 "Ercfgr",
297 ),
298 },
299 ),
300 },
301 BlockItem {
302 name: "bkpr",
303 description: Some(
304 "TAMP backup X register",
305 ),
306 array: Some(
307 Array::Regular(
308 RegularArray {
309 len: 32,
310 stride: 4,
311 },
312 ),
313 ),
314 byte_offset: 0x100,
315 inner: BlockItemInner::Register(
316 Register {
317 access: Access::ReadWrite,
318 bit_size: 32,
319 fieldset: Some(
320 "Bkpr",
321 ),
322 },
323 ),
324 },
325 ],
326 },
327 ],
328 fieldsets: &[
329 FieldSet {
330 name: "Atcr1",
331 extends: None,
332 description: Some(
333 "TAMP active tamper control register 1",
334 ),
335 bit_size: 32,
336 fields: &[
337 Field {
338 name: "tampam",
339 description: Some(
340 "Tamper X active mode",
341 ),
342 bit_offset: BitOffset::Regular(
343 RegularBitOffset {
344 offset: 0,
345 },
346 ),
347 bit_size: 1,
348 array: Some(
349 Array::Regular(
350 RegularArray {
351 len: 8,
352 stride: 1,
353 },
354 ),
355 ),
356 enumm: None,
357 },
358 Field {
359 name: "atosel",
360 description: Some(
361 "Active tamper shared output X selection. The selected output must be available in the package pinout",
362 ),
363 bit_offset: BitOffset::Regular(
364 RegularBitOffset {
365 offset: 8,
366 },
367 ),
368 bit_size: 2,
369 array: Some(
370 Array::Regular(
371 RegularArray {
372 len: 4,
373 stride: 2,
374 },
375 ),
376 ),
377 enumm: None,
378 },
379 Field {
380 name: "atcksel",
381 description: Some(
382 "Active tamper RTC asynchronous prescaler clock selection. These bits selects the RTC asynchronous prescaler stage output.The selected clock is CK_ATPRE.. fCK_ATPRE = fRTCCLK / 2ATCKSEL when (PREDIV_A+1) = 128.. .... These bits can be written only when all active tampers are disabled. The write protection remains for up to 1.5 ck_atpre cycles after all the active tampers are disable.",
383 ),
384 bit_offset: BitOffset::Regular(
385 RegularBitOffset {
386 offset: 16,
387 },
388 ),
389 bit_size: 3,
390 array: None,
391 enumm: Some(
392 "Atcksel",
393 ),
394 },
395 Field {
396 name: "atper",
397 description: Some(
398 "Active tamper output change period. The tamper output is changed every CK_ATPER = (2ATPER x CK_ATPRE) cycles. Refer to .",
399 ),
400 bit_offset: BitOffset::Regular(
401 RegularBitOffset {
402 offset: 24,
403 },
404 ),
405 bit_size: 3,
406 array: None,
407 enumm: None,
408 },
409 Field {
410 name: "atoshare",
411 description: Some(
412 "Active tamper output sharing. IN1 is compared with TAMPOUTSEL1. IN2 is compared with TAMPOUTSEL2. IN3 is compared with TAMPOUTSEL3. IN4 is compared with TAMPOUTSEL4. IN5 is compared with TAMPOUTSEL5. IN6 is compared with TAMPOUTSEL6. IN7 is compared with TAMPOUTSEL7. IN8 is compared with TAMPOUTSEL8",
413 ),
414 bit_offset: BitOffset::Regular(
415 RegularBitOffset {
416 offset: 30,
417 },
418 ),
419 bit_size: 1,
420 array: None,
421 enumm: None,
422 },
423 Field {
424 name: "flten",
425 description: Some(
426 "Active tamper filter enable",
427 ),
428 bit_offset: BitOffset::Regular(
429 RegularBitOffset {
430 offset: 31,
431 },
432 ),
433 bit_size: 1,
434 array: None,
435 enumm: None,
436 },
437 ],
438 },
439 FieldSet {
440 name: "Atcr2",
441 extends: None,
442 description: Some(
443 "TAMP active tamper control register 2",
444 ),
445 bit_size: 32,
446 fields: &[
447 Field {
448 name: "atosel",
449 description: Some(
450 "Active tamper shared output X selection. The selected output must be available in the package pinout. Bits 9:8 are the mirror of ATOSEL1[1:0] in the ATCR1, and so can also be read or. written through ATCR1.",
451 ),
452 bit_offset: BitOffset::Regular(
453 RegularBitOffset {
454 offset: 8,
455 },
456 ),
457 bit_size: 3,
458 array: Some(
459 Array::Regular(
460 RegularArray {
461 len: 8,
462 stride: 3,
463 },
464 ),
465 ),
466 enumm: None,
467 },
468 ],
469 },
470 FieldSet {
471 name: "Ator",
472 extends: None,
473 description: Some(
474 "TAMP active tamper output register",
475 ),
476 bit_size: 32,
477 fields: &[
478 Field {
479 name: "prng",
480 description: Some(
481 "Pseudo-random generator value. This field provides the values of the PRNG output. Because of potential inconsistencies due to synchronization delays, PRNG must be read at least twice. The read value is correct if it is equal to previous read value. This field can only be read when the APB is in secure mode.",
482 ),
483 bit_offset: BitOffset::Regular(
484 RegularBitOffset {
485 offset: 0,
486 },
487 ),
488 bit_size: 8,
489 array: None,
490 enumm: None,
491 },
492 Field {
493 name: "seedf",
494 description: Some(
495 "Seed running flag. This flag is set by hardware when a new seed is written in the ATSEEDR. It is cleared by hardware when the PRNG has absorbed this new seed, and by system reset. The TAMP APB cock must not be switched off as long as SEEDF is set.",
496 ),
497 bit_offset: BitOffset::Regular(
498 RegularBitOffset {
499 offset: 14,
500 },
501 ),
502 bit_size: 1,
503 array: None,
504 enumm: None,
505 },
506 Field {
507 name: "inits",
508 description: Some(
509 "Active tamper initialization status. This flag is set by hardware when the PRNG has absorbed the first 128-bit seed, meaning that the enabled active tampers are functional. This flag is cleared when the active tampers are disabled.",
510 ),
511 bit_offset: BitOffset::Regular(
512 RegularBitOffset {
513 offset: 15,
514 },
515 ),
516 bit_size: 1,
517 array: None,
518 enumm: None,
519 },
520 ],
521 },
522 FieldSet {
523 name: "Atseedr",
524 extends: None,
525 description: Some(
526 "TAMP active tamper seed register",
527 ),
528 bit_size: 32,
529 fields: &[
530 Field {
531 name: "seed",
532 description: Some(
533 "Pseudo-random generator seed value. This register must be written four times with 32-bit values to provide the 128-bit seed to the PRNG. Writing to this register automatically sends the seed value to the PRNG.",
534 ),
535 bit_offset: BitOffset::Regular(
536 RegularBitOffset {
537 offset: 0,
538 },
539 ),
540 bit_size: 32,
541 array: None,
542 enumm: None,
543 },
544 ],
545 },
546 FieldSet {
547 name: "Bkpr",
548 extends: None,
549 description: Some(
550 "TAMP backup register",
551 ),
552 bit_size: 32,
553 fields: &[
554 Field {
555 name: "bkp",
556 description: Some(
557 "The application can write or read data to and from these registers. In the default (ERASE) configuration this register is reset on a tamper detection event. It is forced to reset value as long as there is at least one internal or external tamper flag being set. This register is also reset when the readout protection (RDP) is disabled.",
558 ),
559 bit_offset: BitOffset::Regular(
560 RegularBitOffset {
561 offset: 0,
562 },
563 ),
564 bit_size: 32,
565 array: None,
566 enumm: None,
567 },
568 ],
569 },
570 FieldSet {
571 name: "Countr",
572 extends: None,
573 description: Some(
574 "TAMP monotonic counter 1 register",
575 ),
576 bit_size: 32,
577 fields: &[
578 Field {
579 name: "count",
580 description: Some(
581 "This register is read-only only and is incremented by one when a write access is done to this register. This register cannot roll-over and is frozen when reaching the maximum value.",
582 ),
583 bit_offset: BitOffset::Regular(
584 RegularBitOffset {
585 offset: 0,
586 },
587 ),
588 bit_size: 32,
589 array: None,
590 enumm: None,
591 },
592 ],
593 },
594 FieldSet {
595 name: "Cr1",
596 extends: None,
597 description: Some(
598 "TAMP control register 1",
599 ),
600 bit_size: 32,
601 fields: &[
602 Field {
603 name: "tampe",
604 description: Some(
605 "Tamper detection on INx enable",
606 ),
607 bit_offset: BitOffset::Regular(
608 RegularBitOffset {
609 offset: 0,
610 },
611 ),
612 bit_size: 1,
613 array: Some(
614 Array::Regular(
615 RegularArray {
616 len: 8,
617 stride: 1,
618 },
619 ),
620 ),
621 enumm: None,
622 },
623 Field {
624 name: "itampe",
625 description: Some(
626 "Internal tamper X enable",
627 ),
628 bit_offset: BitOffset::Regular(
629 RegularBitOffset {
630 offset: 16,
631 },
632 ),
633 bit_size: 1,
634 array: Some(
635 Array::Regular(
636 RegularArray {
637 len: 13,
638 stride: 1,
639 },
640 ),
641 ),
642 enumm: None,
643 },
644 ],
645 },
646 FieldSet {
647 name: "Cr2",
648 extends: None,
649 description: Some(
650 "TAMP control register 2",
651 ),
652 bit_size: 32,
653 fields: &[
654 Field {
655 name: "tampnoer",
656 description: Some(
657 "Tamper X no erase",
658 ),
659 bit_offset: BitOffset::Regular(
660 RegularBitOffset {
661 offset: 0,
662 },
663 ),
664 bit_size: 1,
665 array: Some(
666 Array::Regular(
667 RegularArray {
668 len: 8,
669 stride: 1,
670 },
671 ),
672 ),
673 enumm: None,
674 },
675 Field {
676 name: "tampmsk",
677 description: Some(
678 "Tamper X mask. The tamper 1 interrupt must not be enabled when TAMP1MSK is set.",
679 ),
680 bit_offset: BitOffset::Regular(
681 RegularBitOffset {
682 offset: 16,
683 },
684 ),
685 bit_size: 1,
686 array: Some(
687 Array::Regular(
688 RegularArray {
689 len: 3,
690 stride: 1,
691 },
692 ),
693 ),
694 enumm: None,
695 },
696 Field {
697 name: "bkblock",
698 description: Some(
699 "Backup registers and device secrets access blocked",
700 ),
701 bit_offset: BitOffset::Regular(
702 RegularBitOffset {
703 offset: 22,
704 },
705 ),
706 bit_size: 1,
707 array: None,
708 enumm: None,
709 },
710 Field {
711 name: "bkerase",
712 description: Some(
713 "Backup registers and device secrets erase. Writing '1 to this bit reset the backup registers and device secrets(1). Writing 0 has no effect. This bit is always read as 0.",
714 ),
715 bit_offset: BitOffset::Regular(
716 RegularBitOffset {
717 offset: 23,
718 },
719 ),
720 bit_size: 1,
721 array: None,
722 enumm: None,
723 },
724 Field {
725 name: "tamptrg",
726 description: Some(
727 "Active level for tamper 1 input.",
728 ),
729 bit_offset: BitOffset::Regular(
730 RegularBitOffset {
731 offset: 24,
732 },
733 ),
734 bit_size: 1,
735 array: Some(
736 Array::Regular(
737 RegularArray {
738 len: 8,
739 stride: 1,
740 },
741 ),
742 ),
743 enumm: Some(
744 "Tamptrg",
745 ),
746 },
747 ],
748 },
749 FieldSet {
750 name: "Cr3",
751 extends: None,
752 description: Some(
753 "TAMP control register 3",
754 ),
755 bit_size: 32,
756 fields: &[
757 Field {
758 name: "itampnoer",
759 description: Some(
760 "Internal Tamper X no erase",
761 ),
762 bit_offset: BitOffset::Regular(
763 RegularBitOffset {
764 offset: 0,
765 },
766 ),
767 bit_size: 1,
768 array: Some(
769 Array::Regular(
770 RegularArray {
771 len: 13,
772 stride: 1,
773 },
774 ),
775 ),
776 enumm: None,
777 },
778 ],
779 },
780 FieldSet {
781 name: "Ercfgr",
782 extends: None,
783 description: Some(
784 "TAMP erase configuration register",
785 ),
786 bit_size: 32,
787 fields: &[
788 Field {
789 name: "ercfg0",
790 description: Some(
791 "Configurable device secrets configuration",
792 ),
793 bit_offset: BitOffset::Regular(
794 RegularBitOffset {
795 offset: 0,
796 },
797 ),
798 bit_size: 1,
799 array: None,
800 enumm: None,
801 },
802 ],
803 },
804 FieldSet {
805 name: "Fltcr",
806 extends: None,
807 description: Some(
808 "TAMP filter control register",
809 ),
810 bit_size: 32,
811 fields: &[
812 Field {
813 name: "tampfreq",
814 description: Some(
815 "Tamper sampling frequency. Determines the frequency at which each of the INx inputs are sampled.",
816 ),
817 bit_offset: BitOffset::Regular(
818 RegularBitOffset {
819 offset: 0,
820 },
821 ),
822 bit_size: 3,
823 array: None,
824 enumm: Some(
825 "Tampfreq",
826 ),
827 },
828 Field {
829 name: "tampflt",
830 description: Some(
831 "INx filter count. These bits determines the number of consecutive samples at the specified level (TAMP*TRG) needed to activate a tamper event. TAMPFLT is valid for each of the INx inputs.",
832 ),
833 bit_offset: BitOffset::Regular(
834 RegularBitOffset {
835 offset: 3,
836 },
837 ),
838 bit_size: 2,
839 array: None,
840 enumm: Some(
841 "Tampflt",
842 ),
843 },
844 Field {
845 name: "tampprch",
846 description: Some(
847 "INx precharge duration. These bit determines the duration of time during which the pull-up/is activated before each sample. TAMPPRCH is valid for each of the INx inputs.",
848 ),
849 bit_offset: BitOffset::Regular(
850 RegularBitOffset {
851 offset: 5,
852 },
853 ),
854 bit_size: 2,
855 array: None,
856 enumm: Some(
857 "Tampprch",
858 ),
859 },
860 Field {
861 name: "tamppudis",
862 description: Some(
863 "INx pull-up disable. This bit determines if each of the TAMPx pins are precharged before each sample.",
864 ),
865 bit_offset: BitOffset::Regular(
866 RegularBitOffset {
867 offset: 7,
868 },
869 ),
870 bit_size: 1,
871 array: None,
872 enumm: None,
873 },
874 ],
875 },
876 FieldSet {
877 name: "Ier",
878 extends: None,
879 description: Some(
880 "TAMP interrupt enable register",
881 ),
882 bit_size: 32,
883 fields: &[
884 Field {
885 name: "tampie",
886 description: Some(
887 "Tamper X interrupt enable",
888 ),
889 bit_offset: BitOffset::Regular(
890 RegularBitOffset {
891 offset: 0,
892 },
893 ),
894 bit_size: 1,
895 array: Some(
896 Array::Regular(
897 RegularArray {
898 len: 8,
899 stride: 1,
900 },
901 ),
902 ),
903 enumm: None,
904 },
905 Field {
906 name: "itampie",
907 description: Some(
908 "Internal tamper X interrupt enable",
909 ),
910 bit_offset: BitOffset::Regular(
911 RegularBitOffset {
912 offset: 16,
913 },
914 ),
915 bit_size: 1,
916 array: Some(
917 Array::Regular(
918 RegularArray {
919 len: 13,
920 stride: 1,
921 },
922 ),
923 ),
924 enumm: None,
925 },
926 ],
927 },
928 FieldSet {
929 name: "Misr",
930 extends: None,
931 description: Some(
932 "TAMP non-secure masked interrupt status register",
933 ),
934 bit_size: 32,
935 fields: &[
936 Field {
937 name: "tampmf",
938 description: Some(
939 "TAMPx non-secure interrupt masked flag. This flag is set by hardware when the tamper X non-secure interrupt is raised.",
940 ),
941 bit_offset: BitOffset::Regular(
942 RegularBitOffset {
943 offset: 0,
944 },
945 ),
946 bit_size: 1,
947 array: Some(
948 Array::Regular(
949 RegularArray {
950 len: 8,
951 stride: 1,
952 },
953 ),
954 ),
955 enumm: None,
956 },
957 Field {
958 name: "itampmf",
959 description: Some(
960 "Internal tamper X non-secure interrupt masked flag. This flag is set by hardware when the internal tamper X non-secure interrupt is raised.",
961 ),
962 bit_offset: BitOffset::Regular(
963 RegularBitOffset {
964 offset: 16,
965 },
966 ),
967 bit_size: 1,
968 array: Some(
969 Array::Regular(
970 RegularArray {
971 len: 13,
972 stride: 1,
973 },
974 ),
975 ),
976 enumm: None,
977 },
978 ],
979 },
980 FieldSet {
981 name: "Privcr",
982 extends: None,
983 description: Some(
984 "TAMP privilege mode control register",
985 ),
986 bit_size: 32,
987 fields: &[
988 Field {
989 name: "cnt1priv",
990 description: Some(
991 "Monotonic counter 1 privilege protection",
992 ),
993 bit_offset: BitOffset::Regular(
994 RegularBitOffset {
995 offset: 15,
996 },
997 ),
998 bit_size: 1,
999 array: None,
1000 enumm: None,
1001 },
1002 Field {
1003 name: "bkprwpriv",
1004 description: Some(
1005 "Backup registers zone 1 privilege protection",
1006 ),
1007 bit_offset: BitOffset::Regular(
1008 RegularBitOffset {
1009 offset: 29,
1010 },
1011 ),
1012 bit_size: 1,
1013 array: None,
1014 enumm: None,
1015 },
1016 Field {
1017 name: "bkpwpriv",
1018 description: Some(
1019 "Backup registers zone 2 privilege protection",
1020 ),
1021 bit_offset: BitOffset::Regular(
1022 RegularBitOffset {
1023 offset: 30,
1024 },
1025 ),
1026 bit_size: 1,
1027 array: None,
1028 enumm: None,
1029 },
1030 Field {
1031 name: "tamppriv",
1032 description: Some(
1033 "Tamper privilege protection (excluding backup registers). Note: Refer to for details on the read protection.",
1034 ),
1035 bit_offset: BitOffset::Regular(
1036 RegularBitOffset {
1037 offset: 31,
1038 },
1039 ),
1040 bit_size: 1,
1041 array: None,
1042 enumm: None,
1043 },
1044 ],
1045 },
1046 FieldSet {
1047 name: "Scr",
1048 extends: None,
1049 description: Some(
1050 "TAMP status clear register",
1051 ),
1052 bit_size: 32,
1053 fields: &[
1054 Field {
1055 name: "ctampf",
1056 description: Some(
1057 "Clear TAMPx detection flag. Writing 1 in this bit clears the TAMPxF bit in the SR register.",
1058 ),
1059 bit_offset: BitOffset::Regular(
1060 RegularBitOffset {
1061 offset: 0,
1062 },
1063 ),
1064 bit_size: 1,
1065 array: Some(
1066 Array::Regular(
1067 RegularArray {
1068 len: 8,
1069 stride: 1,
1070 },
1071 ),
1072 ),
1073 enumm: None,
1074 },
1075 Field {
1076 name: "citampf",
1077 description: Some(
1078 "Clear ITAMPx detection flag. Writing 1 in this bit clears the ITAMPxF bit in the SR register.",
1079 ),
1080 bit_offset: BitOffset::Regular(
1081 RegularBitOffset {
1082 offset: 16,
1083 },
1084 ),
1085 bit_size: 1,
1086 array: Some(
1087 Array::Regular(
1088 RegularArray {
1089 len: 13,
1090 stride: 1,
1091 },
1092 ),
1093 ),
1094 enumm: None,
1095 },
1096 ],
1097 },
1098 FieldSet {
1099 name: "Seccfgr",
1100 extends: None,
1101 description: Some(
1102 "TAMP secure mode register",
1103 ),
1104 bit_size: 32,
1105 fields: &[
1106 Field {
1107 name: "bkprwsec",
1108 description: Some(
1109 "Backup registers read/write protection offset. Protection zone 1 is defined for backup registers from BKP0R to BKPxR (x = BKPRWSEC-1, from 0 to 128). if TZEN=1, these backup registers can be read and written only with secure access. If TZEN=0:\tthe protection zone 1 can be read and written with non-secure access. If BKPRWSEC = 0: there is no protection zone 1. If BKPRWPRIV is set, BKPRWSEC[7:0] can be written only in privileged mode.",
1110 ),
1111 bit_offset: BitOffset::Regular(
1112 RegularBitOffset {
1113 offset: 0,
1114 },
1115 ),
1116 bit_size: 8,
1117 array: None,
1118 enumm: None,
1119 },
1120 Field {
1121 name: "cnt1sec",
1122 description: Some(
1123 "Monotonic counter 1 secure protection",
1124 ),
1125 bit_offset: BitOffset::Regular(
1126 RegularBitOffset {
1127 offset: 15,
1128 },
1129 ),
1130 bit_size: 1,
1131 array: None,
1132 enumm: None,
1133 },
1134 Field {
1135 name: "bkpwsec",
1136 description: Some(
1137 "Backup registers write protection offset. Protection zone 2 is defined for backup registers from BKPyR (y = BKPRWSEC, from 0 to 128) to BKPzR (z = BKPWSEC-1, from 0 to 128, BKPWSECBKPRWSEC): if TZEN=1, these backup registers can be written only with secure access. They can be read with secure or non-secure access. Protection zone 3 defined for backup registers from BKPtR (t = BKPWSEC, from 0 to 127). They can be read or written with secure or non-secure access. If TZEN=0:\tthe protection zone 2 can be read and written with non-secure access. If BKPWSEC = 0 or if BKPWSEC BKPRWSEC: there is no protection zone 2. If BKPWPRIV is set, BKPRWSEC[7:0] can be written only in privileged mode.",
1138 ),
1139 bit_offset: BitOffset::Regular(
1140 RegularBitOffset {
1141 offset: 16,
1142 },
1143 ),
1144 bit_size: 8,
1145 array: None,
1146 enumm: None,
1147 },
1148 Field {
1149 name: "bhklock",
1150 description: Some(
1151 "Boot hardware key lock. This bit can be read and can only be written to 1 by software. It is cleared by hardware together with the backup registers following a tamper detection event or when the readout protection (RDP) is disabled.",
1152 ),
1153 bit_offset: BitOffset::Regular(
1154 RegularBitOffset {
1155 offset: 30,
1156 },
1157 ),
1158 bit_size: 1,
1159 array: None,
1160 enumm: None,
1161 },
1162 Field {
1163 name: "tampsec",
1164 description: Some(
1165 "Tamper protection (excluding monotonic counters and backup registers). Note: Refer to for details on the read protection.",
1166 ),
1167 bit_offset: BitOffset::Regular(
1168 RegularBitOffset {
1169 offset: 31,
1170 },
1171 ),
1172 bit_size: 1,
1173 array: None,
1174 enumm: None,
1175 },
1176 ],
1177 },
1178 FieldSet {
1179 name: "Smisr",
1180 extends: None,
1181 description: Some(
1182 "TAMP secure masked interrupt status register",
1183 ),
1184 bit_size: 32,
1185 fields: &[
1186 Field {
1187 name: "tampmf",
1188 description: Some(
1189 "TAMPx secure interrupt masked flag. This flag is set by hardware when the tamper X secure interrupt is raised.",
1190 ),
1191 bit_offset: BitOffset::Regular(
1192 RegularBitOffset {
1193 offset: 0,
1194 },
1195 ),
1196 bit_size: 1,
1197 array: Some(
1198 Array::Regular(
1199 RegularArray {
1200 len: 8,
1201 stride: 1,
1202 },
1203 ),
1204 ),
1205 enumm: None,
1206 },
1207 Field {
1208 name: "itampmf",
1209 description: Some(
1210 "Internal tamper X secure interrupt masked flag. This flag is set by hardware when the internal tamper X secure interrupt is raised.",
1211 ),
1212 bit_offset: BitOffset::Regular(
1213 RegularBitOffset {
1214 offset: 16,
1215 },
1216 ),
1217 bit_size: 1,
1218 array: Some(
1219 Array::Regular(
1220 RegularArray {
1221 len: 13,
1222 stride: 1,
1223 },
1224 ),
1225 ),
1226 enumm: None,
1227 },
1228 ],
1229 },
1230 FieldSet {
1231 name: "Sr",
1232 extends: None,
1233 description: Some(
1234 "TAMP status register",
1235 ),
1236 bit_size: 32,
1237 fields: &[
1238 Field {
1239 name: "tampf",
1240 description: Some(
1241 "TAMPx detection flag. This flag is set by hardware when a tamper detection event is detected on the TAMPx input.",
1242 ),
1243 bit_offset: BitOffset::Regular(
1244 RegularBitOffset {
1245 offset: 0,
1246 },
1247 ),
1248 bit_size: 1,
1249 array: Some(
1250 Array::Regular(
1251 RegularArray {
1252 len: 8,
1253 stride: 1,
1254 },
1255 ),
1256 ),
1257 enumm: None,
1258 },
1259 Field {
1260 name: "itampf",
1261 description: Some(
1262 "Internal tamper X flag. This flag is set by hardware when a tamper detection event is detected on the internal tamper X.",
1263 ),
1264 bit_offset: BitOffset::Regular(
1265 RegularBitOffset {
1266 offset: 16,
1267 },
1268 ),
1269 bit_size: 1,
1270 array: Some(
1271 Array::Regular(
1272 RegularArray {
1273 len: 13,
1274 stride: 1,
1275 },
1276 ),
1277 ),
1278 enumm: None,
1279 },
1280 ],
1281 },
1282 ],
1283 enums: &[
1284 Enum {
1285 name: "Atcksel",
1286 description: None,
1287 bit_size: 3,
1288 variants: &[
1289 EnumVariant {
1290 name: "DIV1",
1291 description: Some(
1292 "RTCCLK is selected",
1293 ),
1294 value: 0,
1295 },
1296 EnumVariant {
1297 name: "DIV2",
1298 description: Some(
1299 "RTCCLK/2 is selected when (PREDIV_A+1) = 128 (actually selects 1st flip flop output)",
1300 ),
1301 value: 1,
1302 },
1303 EnumVariant {
1304 name: "DIV4",
1305 description: Some(
1306 "RTCCLK/4 is selected when (PREDIV_A+1) = 128 (actually selects 2nd flip flop output)",
1307 ),
1308 value: 2,
1309 },
1310 EnumVariant {
1311 name: "DIV128",
1312 description: Some(
1313 "RTCCLK/128 is selected when (PREDIV_A+1) = 128 (actually selects 7th flip flop output)",
1314 ),
1315 value: 7,
1316 },
1317 ],
1318 },
1319 Enum {
1320 name: "Tampflt",
1321 description: None,
1322 bit_size: 2,
1323 variants: &[
1324 EnumVariant {
1325 name: "NO_FILTER",
1326 description: Some(
1327 "Tamper event is activated on edge of INx input transitions to the active level (no internal pull-up on INx input).",
1328 ),
1329 value: 0,
1330 },
1331 EnumVariant {
1332 name: "FILTER2",
1333 description: Some(
1334 "Tamper event is activated after 2 consecutive samples at the active level.",
1335 ),
1336 value: 1,
1337 },
1338 EnumVariant {
1339 name: "FILTER4",
1340 description: Some(
1341 "Tamper event is activated after 4 consecutive samples at the active level.",
1342 ),
1343 value: 2,
1344 },
1345 EnumVariant {
1346 name: "FILTER8",
1347 description: Some(
1348 "Tamper event is activated after 8 consecutive samples at the active level.",
1349 ),
1350 value: 3,
1351 },
1352 ],
1353 },
1354 Enum {
1355 name: "Tampfreq",
1356 description: None,
1357 bit_size: 3,
1358 variants: &[
1359 EnumVariant {
1360 name: "HZ_1",
1361 description: Some(
1362 "RTCCLK / 32768 (1 Hz when RTCCLK = 32768 Hz)",
1363 ),
1364 value: 0,
1365 },
1366 EnumVariant {
1367 name: "HZ_2",
1368 description: Some(
1369 "RTCCLK / 16384 (2 Hz when RTCCLK = 32768 Hz)",
1370 ),
1371 value: 1,
1372 },
1373 EnumVariant {
1374 name: "HZ_4",
1375 description: Some(
1376 "RTCCLK / 8192 (4 Hz when RTCCLK = 32768 Hz)",
1377 ),
1378 value: 2,
1379 },
1380 EnumVariant {
1381 name: "HZ_8",
1382 description: Some(
1383 "RTCCLK / 4096 (8 Hz when RTCCLK = 32768 Hz)",
1384 ),
1385 value: 3,
1386 },
1387 EnumVariant {
1388 name: "HZ_16",
1389 description: Some(
1390 "RTCCLK / 2048 (16 Hz when RTCCLK = 32768 Hz)",
1391 ),
1392 value: 4,
1393 },
1394 EnumVariant {
1395 name: "HZ_32",
1396 description: Some(
1397 "RTCCLK / 1024 (32 Hz when RTCCLK = 32768 Hz)",
1398 ),
1399 value: 5,
1400 },
1401 EnumVariant {
1402 name: "HZ_64",
1403 description: Some(
1404 "RTCCLK / 512 (64 Hz when RTCCLK = 32768 Hz)",
1405 ),
1406 value: 6,
1407 },
1408 EnumVariant {
1409 name: "HZ_128",
1410 description: Some(
1411 "RTCCLK / 256 (128 Hz when RTCCLK = 32768 Hz)",
1412 ),
1413 value: 7,
1414 },
1415 ],
1416 },
1417 Enum {
1418 name: "Tampprch",
1419 description: None,
1420 bit_size: 2,
1421 variants: &[
1422 EnumVariant {
1423 name: "CYCLES1",
1424 description: Some(
1425 "1 RTCCLK cycle",
1426 ),
1427 value: 0,
1428 },
1429 EnumVariant {
1430 name: "CYCLES2",
1431 description: Some(
1432 "2 RTCCLK cycles",
1433 ),
1434 value: 1,
1435 },
1436 EnumVariant {
1437 name: "CYCLES4",
1438 description: Some(
1439 "4 RTCCLK cycles",
1440 ),
1441 value: 2,
1442 },
1443 EnumVariant {
1444 name: "CYCLES8",
1445 description: Some(
1446 "8 RTCCLK cycles",
1447 ),
1448 value: 3,
1449 },
1450 ],
1451 },
1452 Enum {
1453 name: "Tamptrg",
1454 description: None,
1455 bit_size: 1,
1456 variants: &[
1457 EnumVariant {
1458 name: "FILTERED_LOW_OR_UNFILTERED_HIGH",
1459 description: Some(
1460 "If TAMPFLT 00 Tamper 2 input staying low triggers a tamper detection event.",
1461 ),
1462 value: 0,
1463 },
1464 EnumVariant {
1465 name: "FILTERED_HIGH_OR_UNFILTERED_LOW",
1466 description: Some(
1467 "If TAMPFLT 00 Tamper 2 input staying high triggers a tamper detection event.",
1468 ),
1469 value: 1,
1470 },
1471 ],
1472 },
1473 ],
1474};
1475