1
2use crate::metadata::ir::*;
3pub(crate) static REGISTERS: IR = IR {
4 blocks: &[Block {
5 name: "Tsc",
6 extends: None,
7 description: Some("Touch sensing controller."),
8 items: &[
9 BlockItem {
10 name: "cr",
11 description: Some("control register."),
12 array: None,
13 byte_offset: 0x0,
14 inner: BlockItemInner::Register(Register {
15 access: Access::ReadWrite,
16 bit_size: 32,
17 fieldset: Some("Cr"),
18 }),
19 },
20 BlockItem {
21 name: "ier",
22 description: Some("interrupt enable register."),
23 array: None,
24 byte_offset: 0x4,
25 inner: BlockItemInner::Register(Register {
26 access: Access::ReadWrite,
27 bit_size: 32,
28 fieldset: Some("Ier"),
29 }),
30 },
31 BlockItem {
32 name: "icr",
33 description: Some("interrupt clear register."),
34 array: None,
35 byte_offset: 0x8,
36 inner: BlockItemInner::Register(Register {
37 access: Access::ReadWrite,
38 bit_size: 32,
39 fieldset: Some("Icr"),
40 }),
41 },
42 BlockItem {
43 name: "isr",
44 description: Some("interrupt status register."),
45 array: None,
46 byte_offset: 0xc,
47 inner: BlockItemInner::Register(Register {
48 access: Access::ReadWrite,
49 bit_size: 32,
50 fieldset: Some("Isr"),
51 }),
52 },
53 BlockItem {
54 name: "iohcr",
55 description: Some("I/O hysteresis control register."),
56 array: None,
57 byte_offset: 0x10,
58 inner: BlockItemInner::Register(Register {
59 access: Access::ReadWrite,
60 bit_size: 32,
61 fieldset: Some("Iohcr"),
62 }),
63 },
64 BlockItem {
65 name: "ioascr",
66 description: Some("I/O analog switch control register."),
67 array: None,
68 byte_offset: 0x18,
69 inner: BlockItemInner::Register(Register {
70 access: Access::ReadWrite,
71 bit_size: 32,
72 fieldset: Some("Ioascr"),
73 }),
74 },
75 BlockItem {
76 name: "ioscr",
77 description: Some("I/O sampling control register."),
78 array: None,
79 byte_offset: 0x20,
80 inner: BlockItemInner::Register(Register {
81 access: Access::ReadWrite,
82 bit_size: 32,
83 fieldset: Some("Ioscr"),
84 }),
85 },
86 BlockItem {
87 name: "ioccr",
88 description: Some("I/O channel control register."),
89 array: None,
90 byte_offset: 0x28,
91 inner: BlockItemInner::Register(Register {
92 access: Access::ReadWrite,
93 bit_size: 32,
94 fieldset: Some("Ioccr"),
95 }),
96 },
97 BlockItem {
98 name: "iogcsr",
99 description: Some("I/O group control status register."),
100 array: None,
101 byte_offset: 0x30,
102 inner: BlockItemInner::Register(Register {
103 access: Access::ReadWrite,
104 bit_size: 32,
105 fieldset: Some("Iogcsr"),
106 }),
107 },
108 BlockItem {
109 name: "iogcr",
110 description: Some("I/O group x counter register."),
111 array: Some(Array::Regular(RegularArray { len: 8, stride: 4 })),
112 byte_offset: 0x34,
113 inner: BlockItemInner::Register(Register {
114 access: Access::Read,
115 bit_size: 32,
116 fieldset: Some("Iogcr"),
117 }),
118 },
119 ],
120 }],
121 fieldsets: &[
122 FieldSet {
123 name: "Cr",
124 extends: None,
125 description: Some("control register."),
126 bit_size: 32,
127 fields: &[
128 Field {
129 name: "tsce",
130 description: Some("Touch sensing controller enable."),
131 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
132 bit_size: 1,
133 array: None,
134 enumm: None,
135 },
136 Field {
137 name: "start",
138 description: Some("Start a new acquisition."),
139 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 1 }),
140 bit_size: 1,
141 array: None,
142 enumm: None,
143 },
144 Field {
145 name: "am",
146 description: Some("Acquisition mode."),
147 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 2 }),
148 bit_size: 1,
149 array: None,
150 enumm: None,
151 },
152 Field {
153 name: "syncpol",
154 description: Some("Synchronization pin polarity."),
155 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 3 }),
156 bit_size: 1,
157 array: None,
158 enumm: None,
159 },
160 Field {
161 name: "iodef",
162 description: Some("I/O Default mode."),
163 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 4 }),
164 bit_size: 1,
165 array: None,
166 enumm: None,
167 },
168 Field {
169 name: "mcv",
170 description: Some("Max count value."),
171 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 5 }),
172 bit_size: 3,
173 array: None,
174 enumm: None,
175 },
176 Field {
177 name: "pgpsc",
178 description: Some("pulse generator prescaler."),
179 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 12 }),
180 bit_size: 3,
181 array: None,
182 enumm: None,
183 },
184 Field {
185 name: "sspsc",
186 description: Some("Spread spectrum prescaler."),
187 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 15 }),
188 bit_size: 1,
189 array: None,
190 enumm: None,
191 },
192 Field {
193 name: "sse",
194 description: Some("Spread spectrum enable."),
195 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 16 }),
196 bit_size: 1,
197 array: None,
198 enumm: None,
199 },
200 Field {
201 name: "ssd",
202 description: Some("Spread spectrum deviation."),
203 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 17 }),
204 bit_size: 7,
205 array: None,
206 enumm: None,
207 },
208 Field {
209 name: "ctpl",
210 description: Some("Charge transfer pulse low."),
211 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 24 }),
212 bit_size: 4,
213 array: None,
214 enumm: None,
215 },
216 Field {
217 name: "ctph",
218 description: Some("Charge transfer pulse high."),
219 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 28 }),
220 bit_size: 4,
221 array: None,
222 enumm: None,
223 },
224 ],
225 },
226 FieldSet {
227 name: "Icr",
228 extends: None,
229 description: Some("interrupt clear register."),
230 bit_size: 32,
231 fields: &[
232 Field {
233 name: "eoaic",
234 description: Some("End of acquisition interrupt clear."),
235 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
236 bit_size: 1,
237 array: None,
238 enumm: None,
239 },
240 Field {
241 name: "mceic",
242 description: Some("Max count error interrupt clear."),
243 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 1 }),
244 bit_size: 1,
245 array: None,
246 enumm: None,
247 },
248 ],
249 },
250 FieldSet {
251 name: "Ier",
252 extends: None,
253 description: Some("interrupt enable register."),
254 bit_size: 32,
255 fields: &[
256 Field {
257 name: "eoaie",
258 description: Some("End of acquisition interrupt enable."),
259 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
260 bit_size: 1,
261 array: None,
262 enumm: None,
263 },
264 Field {
265 name: "mceie",
266 description: Some("Max count error interrupt enable."),
267 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 1 }),
268 bit_size: 1,
269 array: None,
270 enumm: None,
271 },
272 ],
273 },
274 FieldSet {
275 name: "Ioascr",
276 extends: None,
277 description: Some("I/O analog switch control register."),
278 bit_size: 32,
279 fields: &[
280 Field {
281 name: "g1_io1",
282 description: Some("G1_IO1 analog switch enable."),
283 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
284 bit_size: 1,
285 array: None,
286 enumm: None,
287 },
288 Field {
289 name: "g1_io2",
290 description: Some("G1_IO2 analog switch enable."),
291 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 1 }),
292 bit_size: 1,
293 array: None,
294 enumm: None,
295 },
296 Field {
297 name: "g1_io3",
298 description: Some("G1_IO3 analog switch enable."),
299 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 2 }),
300 bit_size: 1,
301 array: None,
302 enumm: None,
303 },
304 Field {
305 name: "g1_io4",
306 description: Some("G1_IO4 analog switch enable."),
307 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 3 }),
308 bit_size: 1,
309 array: None,
310 enumm: None,
311 },
312 Field {
313 name: "g2_io1",
314 description: Some("G2_IO1 analog switch enable."),
315 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 4 }),
316 bit_size: 1,
317 array: None,
318 enumm: None,
319 },
320 Field {
321 name: "g2_io2",
322 description: Some("G2_IO2 analog switch enable."),
323 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 5 }),
324 bit_size: 1,
325 array: None,
326 enumm: None,
327 },
328 Field {
329 name: "g2_io3",
330 description: Some("G2_IO3 analog switch enable."),
331 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 6 }),
332 bit_size: 1,
333 array: None,
334 enumm: None,
335 },
336 Field {
337 name: "g2_io4",
338 description: Some("G2_IO4 analog switch enable."),
339 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 7 }),
340 bit_size: 1,
341 array: None,
342 enumm: None,
343 },
344 Field {
345 name: "g3_io1",
346 description: Some("G3_IO1 analog switch enable."),
347 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 8 }),
348 bit_size: 1,
349 array: None,
350 enumm: None,
351 },
352 Field {
353 name: "g3_io2",
354 description: Some("G3_IO2 analog switch enable."),
355 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 9 }),
356 bit_size: 1,
357 array: None,
358 enumm: None,
359 },
360 Field {
361 name: "g3_io3",
362 description: Some("G3_IO3 analog switch enable."),
363 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 10 }),
364 bit_size: 1,
365 array: None,
366 enumm: None,
367 },
368 Field {
369 name: "g3_io4",
370 description: Some("G3_IO4 analog switch enable."),
371 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 11 }),
372 bit_size: 1,
373 array: None,
374 enumm: None,
375 },
376 Field {
377 name: "g4_io1",
378 description: Some("G4_IO1 analog switch enable."),
379 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 12 }),
380 bit_size: 1,
381 array: None,
382 enumm: None,
383 },
384 Field {
385 name: "g4_io2",
386 description: Some("G4_IO2 analog switch enable."),
387 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 13 }),
388 bit_size: 1,
389 array: None,
390 enumm: None,
391 },
392 Field {
393 name: "g4_io3",
394 description: Some("G4_IO3 analog switch enable."),
395 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 14 }),
396 bit_size: 1,
397 array: None,
398 enumm: None,
399 },
400 Field {
401 name: "g4_io4",
402 description: Some("G4_IO4 analog switch enable."),
403 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 15 }),
404 bit_size: 1,
405 array: None,
406 enumm: None,
407 },
408 Field {
409 name: "g5_io1",
410 description: Some("G5_IO1 analog switch enable."),
411 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 16 }),
412 bit_size: 1,
413 array: None,
414 enumm: None,
415 },
416 Field {
417 name: "g5_io2",
418 description: Some("G5_IO2 analog switch enable."),
419 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 17 }),
420 bit_size: 1,
421 array: None,
422 enumm: None,
423 },
424 Field {
425 name: "g5_io3",
426 description: Some("G5_IO3 analog switch enable."),
427 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 18 }),
428 bit_size: 1,
429 array: None,
430 enumm: None,
431 },
432 Field {
433 name: "g5_io4",
434 description: Some("G5_IO4 analog switch enable."),
435 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 19 }),
436 bit_size: 1,
437 array: None,
438 enumm: None,
439 },
440 Field {
441 name: "g6_io1",
442 description: Some("G6_IO1 analog switch enable."),
443 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 20 }),
444 bit_size: 1,
445 array: None,
446 enumm: None,
447 },
448 Field {
449 name: "g6_io2",
450 description: Some("G6_IO2 analog switch enable."),
451 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 21 }),
452 bit_size: 1,
453 array: None,
454 enumm: None,
455 },
456 Field {
457 name: "g6_io3",
458 description: Some("G6_IO3 analog switch enable."),
459 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 22 }),
460 bit_size: 1,
461 array: None,
462 enumm: None,
463 },
464 Field {
465 name: "g6_io4",
466 description: Some("G6_IO4 analog switch enable."),
467 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 23 }),
468 bit_size: 1,
469 array: None,
470 enumm: None,
471 },
472 Field {
473 name: "g7_io1",
474 description: Some("G7_IO1 analog switch enable."),
475 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 24 }),
476 bit_size: 1,
477 array: None,
478 enumm: None,
479 },
480 Field {
481 name: "g7_io2",
482 description: Some("G7_IO2 analog switch enable."),
483 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 25 }),
484 bit_size: 1,
485 array: None,
486 enumm: None,
487 },
488 Field {
489 name: "g7_io3",
490 description: Some("G7_IO3 analog switch enable."),
491 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 26 }),
492 bit_size: 1,
493 array: None,
494 enumm: None,
495 },
496 Field {
497 name: "g7_io4",
498 description: Some("G7_IO4 analog switch enable."),
499 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 27 }),
500 bit_size: 1,
501 array: None,
502 enumm: None,
503 },
504 Field {
505 name: "g8_io1",
506 description: Some("G8_IO1 analog switch enable."),
507 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 28 }),
508 bit_size: 1,
509 array: None,
510 enumm: None,
511 },
512 Field {
513 name: "g8_io2",
514 description: Some("G8_IO2 analog switch enable."),
515 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 29 }),
516 bit_size: 1,
517 array: None,
518 enumm: None,
519 },
520 Field {
521 name: "g8_io3",
522 description: Some("G8_IO3 analog switch enable."),
523 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 30 }),
524 bit_size: 1,
525 array: None,
526 enumm: None,
527 },
528 Field {
529 name: "g8_io4",
530 description: Some("G8_IO4 analog switch enable."),
531 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 31 }),
532 bit_size: 1,
533 array: None,
534 enumm: None,
535 },
536 ],
537 },
538 FieldSet {
539 name: "Ioccr",
540 extends: None,
541 description: Some("I/O channel control register."),
542 bit_size: 32,
543 fields: &[
544 Field {
545 name: "g1_io1",
546 description: Some("G1_IO1 channel mode."),
547 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
548 bit_size: 1,
549 array: None,
550 enumm: None,
551 },
552 Field {
553 name: "g1_io2",
554 description: Some("G1_IO2 channel mode."),
555 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 1 }),
556 bit_size: 1,
557 array: None,
558 enumm: None,
559 },
560 Field {
561 name: "g1_io3",
562 description: Some("G1_IO3 channel mode."),
563 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 2 }),
564 bit_size: 1,
565 array: None,
566 enumm: None,
567 },
568 Field {
569 name: "g1_io4",
570 description: Some("G1_IO4 channel mode."),
571 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 3 }),
572 bit_size: 1,
573 array: None,
574 enumm: None,
575 },
576 Field {
577 name: "g2_io1",
578 description: Some("G2_IO1 channel mode."),
579 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 4 }),
580 bit_size: 1,
581 array: None,
582 enumm: None,
583 },
584 Field {
585 name: "g2_io2",
586 description: Some("G2_IO2 channel mode."),
587 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 5 }),
588 bit_size: 1,
589 array: None,
590 enumm: None,
591 },
592 Field {
593 name: "g2_io3",
594 description: Some("G2_IO3 channel mode."),
595 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 6 }),
596 bit_size: 1,
597 array: None,
598 enumm: None,
599 },
600 Field {
601 name: "g2_io4",
602 description: Some("G2_IO4 channel mode."),
603 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 7 }),
604 bit_size: 1,
605 array: None,
606 enumm: None,
607 },
608 Field {
609 name: "g3_io1",
610 description: Some("G3_IO1 channel mode."),
611 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 8 }),
612 bit_size: 1,
613 array: None,
614 enumm: None,
615 },
616 Field {
617 name: "g3_io2",
618 description: Some("G3_IO2 channel mode."),
619 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 9 }),
620 bit_size: 1,
621 array: None,
622 enumm: None,
623 },
624 Field {
625 name: "g3_io3",
626 description: Some("G3_IO3 channel mode."),
627 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 10 }),
628 bit_size: 1,
629 array: None,
630 enumm: None,
631 },
632 Field {
633 name: "g3_io4",
634 description: Some("G3_IO4 channel mode."),
635 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 11 }),
636 bit_size: 1,
637 array: None,
638 enumm: None,
639 },
640 Field {
641 name: "g4_io1",
642 description: Some("G4_IO1 channel mode."),
643 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 12 }),
644 bit_size: 1,
645 array: None,
646 enumm: None,
647 },
648 Field {
649 name: "g4_io2",
650 description: Some("G4_IO2 channel mode."),
651 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 13 }),
652 bit_size: 1,
653 array: None,
654 enumm: None,
655 },
656 Field {
657 name: "g4_io3",
658 description: Some("G4_IO3 channel mode."),
659 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 14 }),
660 bit_size: 1,
661 array: None,
662 enumm: None,
663 },
664 Field {
665 name: "g4_io4",
666 description: Some("G4_IO4 channel mode."),
667 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 15 }),
668 bit_size: 1,
669 array: None,
670 enumm: None,
671 },
672 Field {
673 name: "g5_io1",
674 description: Some("G5_IO1 channel mode."),
675 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 16 }),
676 bit_size: 1,
677 array: None,
678 enumm: None,
679 },
680 Field {
681 name: "g5_io2",
682 description: Some("G5_IO2 channel mode."),
683 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 17 }),
684 bit_size: 1,
685 array: None,
686 enumm: None,
687 },
688 Field {
689 name: "g5_io3",
690 description: Some("G5_IO3 channel mode."),
691 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 18 }),
692 bit_size: 1,
693 array: None,
694 enumm: None,
695 },
696 Field {
697 name: "g5_io4",
698 description: Some("G5_IO4 channel mode."),
699 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 19 }),
700 bit_size: 1,
701 array: None,
702 enumm: None,
703 },
704 Field {
705 name: "g6_io1",
706 description: Some("G6_IO1 channel mode."),
707 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 20 }),
708 bit_size: 1,
709 array: None,
710 enumm: None,
711 },
712 Field {
713 name: "g6_io2",
714 description: Some("G6_IO2 channel mode."),
715 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 21 }),
716 bit_size: 1,
717 array: None,
718 enumm: None,
719 },
720 Field {
721 name: "g6_io3",
722 description: Some("G6_IO3 channel mode."),
723 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 22 }),
724 bit_size: 1,
725 array: None,
726 enumm: None,
727 },
728 Field {
729 name: "g6_io4",
730 description: Some("G6_IO4 channel mode."),
731 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 23 }),
732 bit_size: 1,
733 array: None,
734 enumm: None,
735 },
736 Field {
737 name: "g7_io1",
738 description: Some("G7_IO1 channel mode."),
739 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 24 }),
740 bit_size: 1,
741 array: None,
742 enumm: None,
743 },
744 Field {
745 name: "g7_io2",
746 description: Some("G7_IO2 channel mode."),
747 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 25 }),
748 bit_size: 1,
749 array: None,
750 enumm: None,
751 },
752 Field {
753 name: "g7_io3",
754 description: Some("G7_IO3 channel mode."),
755 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 26 }),
756 bit_size: 1,
757 array: None,
758 enumm: None,
759 },
760 Field {
761 name: "g7_io4",
762 description: Some("G7_IO4 channel mode."),
763 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 27 }),
764 bit_size: 1,
765 array: None,
766 enumm: None,
767 },
768 Field {
769 name: "g8_io1",
770 description: Some("G8_IO1 channel mode."),
771 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 28 }),
772 bit_size: 1,
773 array: None,
774 enumm: None,
775 },
776 Field {
777 name: "g8_io2",
778 description: Some("G8_IO2 channel mode."),
779 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 29 }),
780 bit_size: 1,
781 array: None,
782 enumm: None,
783 },
784 Field {
785 name: "g8_io3",
786 description: Some("G8_IO3 channel mode."),
787 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 30 }),
788 bit_size: 1,
789 array: None,
790 enumm: None,
791 },
792 Field {
793 name: "g8_io4",
794 description: Some("G8_IO4 channel mode."),
795 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 31 }),
796 bit_size: 1,
797 array: None,
798 enumm: None,
799 },
800 ],
801 },
802 FieldSet {
803 name: "Iogcr",
804 extends: None,
805 description: Some("I/O group x counter register."),
806 bit_size: 32,
807 fields: &[Field {
808 name: "cnt",
809 description: Some("Counter value."),
810 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
811 bit_size: 14,
812 array: None,
813 enumm: None,
814 }],
815 },
816 FieldSet {
817 name: "Iogcsr",
818 extends: None,
819 description: Some("I/O group control status register."),
820 bit_size: 32,
821 fields: &[
822 Field {
823 name: "g1e",
824 description: Some("Analog I/O group x enable."),
825 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
826 bit_size: 1,
827 array: None,
828 enumm: None,
829 },
830 Field {
831 name: "g2e",
832 description: Some("Analog I/O group x enable."),
833 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 1 }),
834 bit_size: 1,
835 array: None,
836 enumm: None,
837 },
838 Field {
839 name: "g3e",
840 description: Some("Analog I/O group x enable."),
841 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 2 }),
842 bit_size: 1,
843 array: None,
844 enumm: None,
845 },
846 Field {
847 name: "g4e",
848 description: Some("Analog I/O group x enable."),
849 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 3 }),
850 bit_size: 1,
851 array: None,
852 enumm: None,
853 },
854 Field {
855 name: "g5e",
856 description: Some("Analog I/O group x enable."),
857 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 4 }),
858 bit_size: 1,
859 array: None,
860 enumm: None,
861 },
862 Field {
863 name: "g6e",
864 description: Some("Analog I/O group x enable."),
865 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 5 }),
866 bit_size: 1,
867 array: None,
868 enumm: None,
869 },
870 Field {
871 name: "g7e",
872 description: Some("Analog I/O group x enable."),
873 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 6 }),
874 bit_size: 1,
875 array: None,
876 enumm: None,
877 },
878 Field {
879 name: "g8e",
880 description: Some("Analog I/O group x enable."),
881 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 7 }),
882 bit_size: 1,
883 array: None,
884 enumm: None,
885 },
886 Field {
887 name: "g1s",
888 description: Some("Analog I/O group x status."),
889 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 16 }),
890 bit_size: 1,
891 array: None,
892 enumm: None,
893 },
894 Field {
895 name: "g2s",
896 description: Some("Analog I/O group x status."),
897 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 17 }),
898 bit_size: 1,
899 array: None,
900 enumm: None,
901 },
902 Field {
903 name: "g3s",
904 description: Some("Analog I/O group x status."),
905 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 18 }),
906 bit_size: 1,
907 array: None,
908 enumm: None,
909 },
910 Field {
911 name: "g4s",
912 description: Some("Analog I/O group x status."),
913 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 19 }),
914 bit_size: 1,
915 array: None,
916 enumm: None,
917 },
918 Field {
919 name: "g5s",
920 description: Some("Analog I/O group x status."),
921 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 20 }),
922 bit_size: 1,
923 array: None,
924 enumm: None,
925 },
926 Field {
927 name: "g6s",
928 description: Some("Analog I/O group x status."),
929 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 21 }),
930 bit_size: 1,
931 array: None,
932 enumm: None,
933 },
934 Field {
935 name: "g7s",
936 description: Some("Analog I/O group x status."),
937 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 22 }),
938 bit_size: 1,
939 array: None,
940 enumm: None,
941 },
942 Field {
943 name: "g8s",
944 description: Some("Analog I/O group x status."),
945 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 23 }),
946 bit_size: 1,
947 array: None,
948 enumm: None,
949 },
950 ],
951 },
952 FieldSet {
953 name: "Iohcr",
954 extends: None,
955 description: Some("I/O hysteresis control register."),
956 bit_size: 32,
957 fields: &[
958 Field {
959 name: "g1_io1",
960 description: Some("G1_IO1 Schmitt trigger hysteresis mode."),
961 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
962 bit_size: 1,
963 array: None,
964 enumm: None,
965 },
966 Field {
967 name: "g1_io2",
968 description: Some("G1_IO2 Schmitt trigger hysteresis mode."),
969 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 1 }),
970 bit_size: 1,
971 array: None,
972 enumm: None,
973 },
974 Field {
975 name: "g1_io3",
976 description: Some("G1_IO3 Schmitt trigger hysteresis mode."),
977 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 2 }),
978 bit_size: 1,
979 array: None,
980 enumm: None,
981 },
982 Field {
983 name: "g1_io4",
984 description: Some("G1_IO4 Schmitt trigger hysteresis mode."),
985 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 3 }),
986 bit_size: 1,
987 array: None,
988 enumm: None,
989 },
990 Field {
991 name: "g2_io1",
992 description: Some("G2_IO1 Schmitt trigger hysteresis mode."),
993 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 4 }),
994 bit_size: 1,
995 array: None,
996 enumm: None,
997 },
998 Field {
999 name: "g2_io2",
1000 description: Some("G2_IO2 Schmitt trigger hysteresis mode."),
1001 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 5 }),
1002 bit_size: 1,
1003 array: None,
1004 enumm: None,
1005 },
1006 Field {
1007 name: "g2_io3",
1008 description: Some("G2_IO3 Schmitt trigger hysteresis mode."),
1009 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 6 }),
1010 bit_size: 1,
1011 array: None,
1012 enumm: None,
1013 },
1014 Field {
1015 name: "g2_io4",
1016 description: Some("G2_IO4 Schmitt trigger hysteresis mode."),
1017 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 7 }),
1018 bit_size: 1,
1019 array: None,
1020 enumm: None,
1021 },
1022 Field {
1023 name: "g3_io1",
1024 description: Some("G3_IO1 Schmitt trigger hysteresis mode."),
1025 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 8 }),
1026 bit_size: 1,
1027 array: None,
1028 enumm: None,
1029 },
1030 Field {
1031 name: "g3_io2",
1032 description: Some("G3_IO2 Schmitt trigger hysteresis mode."),
1033 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 9 }),
1034 bit_size: 1,
1035 array: None,
1036 enumm: None,
1037 },
1038 Field {
1039 name: "g3_io3",
1040 description: Some("G3_IO3 Schmitt trigger hysteresis mode."),
1041 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 10 }),
1042 bit_size: 1,
1043 array: None,
1044 enumm: None,
1045 },
1046 Field {
1047 name: "g3_io4",
1048 description: Some("G3_IO4 Schmitt trigger hysteresis mode."),
1049 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 11 }),
1050 bit_size: 1,
1051 array: None,
1052 enumm: None,
1053 },
1054 Field {
1055 name: "g4_io1",
1056 description: Some("G4_IO1 Schmitt trigger hysteresis mode."),
1057 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 12 }),
1058 bit_size: 1,
1059 array: None,
1060 enumm: None,
1061 },
1062 Field {
1063 name: "g4_io2",
1064 description: Some("G4_IO2 Schmitt trigger hysteresis mode."),
1065 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 13 }),
1066 bit_size: 1,
1067 array: None,
1068 enumm: None,
1069 },
1070 Field {
1071 name: "g4_io3",
1072 description: Some("G4_IO3 Schmitt trigger hysteresis mode."),
1073 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 14 }),
1074 bit_size: 1,
1075 array: None,
1076 enumm: None,
1077 },
1078 Field {
1079 name: "g4_io4",
1080 description: Some("G4_IO4 Schmitt trigger hysteresis mode."),
1081 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 15 }),
1082 bit_size: 1,
1083 array: None,
1084 enumm: None,
1085 },
1086 Field {
1087 name: "g5_io1",
1088 description: Some("G5_IO1 Schmitt trigger hysteresis mode."),
1089 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 16 }),
1090 bit_size: 1,
1091 array: None,
1092 enumm: None,
1093 },
1094 Field {
1095 name: "g5_io2",
1096 description: Some("G5_IO2 Schmitt trigger hysteresis mode."),
1097 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 17 }),
1098 bit_size: 1,
1099 array: None,
1100 enumm: None,
1101 },
1102 Field {
1103 name: "g5_io3",
1104 description: Some("G5_IO3 Schmitt trigger hysteresis mode."),
1105 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 18 }),
1106 bit_size: 1,
1107 array: None,
1108 enumm: None,
1109 },
1110 Field {
1111 name: "g5_io4",
1112 description: Some("G5_IO4 Schmitt trigger hysteresis mode."),
1113 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 19 }),
1114 bit_size: 1,
1115 array: None,
1116 enumm: None,
1117 },
1118 Field {
1119 name: "g6_io1",
1120 description: Some("G6_IO1 Schmitt trigger hysteresis mode."),
1121 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 20 }),
1122 bit_size: 1,
1123 array: None,
1124 enumm: None,
1125 },
1126 Field {
1127 name: "g6_io2",
1128 description: Some("G6_IO2 Schmitt trigger hysteresis mode."),
1129 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 21 }),
1130 bit_size: 1,
1131 array: None,
1132 enumm: None,
1133 },
1134 Field {
1135 name: "g6_io3",
1136 description: Some("G6_IO3 Schmitt trigger hysteresis mode."),
1137 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 22 }),
1138 bit_size: 1,
1139 array: None,
1140 enumm: None,
1141 },
1142 Field {
1143 name: "g6_io4",
1144 description: Some("G6_IO4 Schmitt trigger hysteresis mode."),
1145 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 23 }),
1146 bit_size: 1,
1147 array: None,
1148 enumm: None,
1149 },
1150 Field {
1151 name: "g7_io1",
1152 description: Some("G7_IO1 Schmitt trigger hysteresis mode."),
1153 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 24 }),
1154 bit_size: 1,
1155 array: None,
1156 enumm: None,
1157 },
1158 Field {
1159 name: "g7_io2",
1160 description: Some("G7_IO2 Schmitt trigger hysteresis mode."),
1161 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 25 }),
1162 bit_size: 1,
1163 array: None,
1164 enumm: None,
1165 },
1166 Field {
1167 name: "g7_io3",
1168 description: Some("G7_IO3 Schmitt trigger hysteresis mode."),
1169 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 26 }),
1170 bit_size: 1,
1171 array: None,
1172 enumm: None,
1173 },
1174 Field {
1175 name: "g7_io4",
1176 description: Some("G7_IO4 Schmitt trigger hysteresis mode."),
1177 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 27 }),
1178 bit_size: 1,
1179 array: None,
1180 enumm: None,
1181 },
1182 Field {
1183 name: "g8_io1",
1184 description: Some("G8_IO1 Schmitt trigger hysteresis mode."),
1185 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 28 }),
1186 bit_size: 1,
1187 array: None,
1188 enumm: None,
1189 },
1190 Field {
1191 name: "g8_io2",
1192 description: Some("G8_IO2 Schmitt trigger hysteresis mode."),
1193 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 29 }),
1194 bit_size: 1,
1195 array: None,
1196 enumm: None,
1197 },
1198 Field {
1199 name: "g8_io3",
1200 description: Some("G8_IO3 Schmitt trigger hysteresis mode."),
1201 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 30 }),
1202 bit_size: 1,
1203 array: None,
1204 enumm: None,
1205 },
1206 Field {
1207 name: "g8_io4",
1208 description: Some("G8_IO4 Schmitt trigger hysteresis mode."),
1209 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 31 }),
1210 bit_size: 1,
1211 array: None,
1212 enumm: None,
1213 },
1214 ],
1215 },
1216 FieldSet {
1217 name: "Ioscr",
1218 extends: None,
1219 description: Some("I/O sampling control register."),
1220 bit_size: 32,
1221 fields: &[
1222 Field {
1223 name: "g1_io1",
1224 description: Some("G1_IO1 sampling mode."),
1225 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
1226 bit_size: 1,
1227 array: None,
1228 enumm: None,
1229 },
1230 Field {
1231 name: "g1_io2",
1232 description: Some("G1_IO2 sampling mode."),
1233 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 1 }),
1234 bit_size: 1,
1235 array: None,
1236 enumm: None,
1237 },
1238 Field {
1239 name: "g1_io3",
1240 description: Some("G1_IO3 sampling mode."),
1241 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 2 }),
1242 bit_size: 1,
1243 array: None,
1244 enumm: None,
1245 },
1246 Field {
1247 name: "g1_io4",
1248 description: Some("G1_IO4 sampling mode."),
1249 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 3 }),
1250 bit_size: 1,
1251 array: None,
1252 enumm: None,
1253 },
1254 Field {
1255 name: "g2_io1",
1256 description: Some("G2_IO1 sampling mode."),
1257 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 4 }),
1258 bit_size: 1,
1259 array: None,
1260 enumm: None,
1261 },
1262 Field {
1263 name: "g2_io2",
1264 description: Some("G2_IO2 sampling mode."),
1265 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 5 }),
1266 bit_size: 1,
1267 array: None,
1268 enumm: None,
1269 },
1270 Field {
1271 name: "g2_io3",
1272 description: Some("G2_IO3 sampling mode."),
1273 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 6 }),
1274 bit_size: 1,
1275 array: None,
1276 enumm: None,
1277 },
1278 Field {
1279 name: "g2_io4",
1280 description: Some("G2_IO4 sampling mode."),
1281 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 7 }),
1282 bit_size: 1,
1283 array: None,
1284 enumm: None,
1285 },
1286 Field {
1287 name: "g3_io1",
1288 description: Some("G3_IO1 sampling mode."),
1289 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 8 }),
1290 bit_size: 1,
1291 array: None,
1292 enumm: None,
1293 },
1294 Field {
1295 name: "g3_io2",
1296 description: Some("G3_IO2 sampling mode."),
1297 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 9 }),
1298 bit_size: 1,
1299 array: None,
1300 enumm: None,
1301 },
1302 Field {
1303 name: "g3_io3",
1304 description: Some("G3_IO3 sampling mode."),
1305 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 10 }),
1306 bit_size: 1,
1307 array: None,
1308 enumm: None,
1309 },
1310 Field {
1311 name: "g3_io4",
1312 description: Some("G3_IO4 sampling mode."),
1313 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 11 }),
1314 bit_size: 1,
1315 array: None,
1316 enumm: None,
1317 },
1318 Field {
1319 name: "g4_io1",
1320 description: Some("G4_IO1 sampling mode."),
1321 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 12 }),
1322 bit_size: 1,
1323 array: None,
1324 enumm: None,
1325 },
1326 Field {
1327 name: "g4_io2",
1328 description: Some("G4_IO2 sampling mode."),
1329 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 13 }),
1330 bit_size: 1,
1331 array: None,
1332 enumm: None,
1333 },
1334 Field {
1335 name: "g4_io3",
1336 description: Some("G4_IO3 sampling mode."),
1337 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 14 }),
1338 bit_size: 1,
1339 array: None,
1340 enumm: None,
1341 },
1342 Field {
1343 name: "g4_io4",
1344 description: Some("G4_IO4 sampling mode."),
1345 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 15 }),
1346 bit_size: 1,
1347 array: None,
1348 enumm: None,
1349 },
1350 Field {
1351 name: "g5_io1",
1352 description: Some("G5_IO1 sampling mode."),
1353 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 16 }),
1354 bit_size: 1,
1355 array: None,
1356 enumm: None,
1357 },
1358 Field {
1359 name: "g5_io2",
1360 description: Some("G5_IO2 sampling mode."),
1361 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 17 }),
1362 bit_size: 1,
1363 array: None,
1364 enumm: None,
1365 },
1366 Field {
1367 name: "g5_io3",
1368 description: Some("G5_IO3 sampling mode."),
1369 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 18 }),
1370 bit_size: 1,
1371 array: None,
1372 enumm: None,
1373 },
1374 Field {
1375 name: "g5_io4",
1376 description: Some("G5_IO4 sampling mode."),
1377 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 19 }),
1378 bit_size: 1,
1379 array: None,
1380 enumm: None,
1381 },
1382 Field {
1383 name: "g6_io1",
1384 description: Some("G6_IO1 sampling mode."),
1385 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 20 }),
1386 bit_size: 1,
1387 array: None,
1388 enumm: None,
1389 },
1390 Field {
1391 name: "g6_io2",
1392 description: Some("G6_IO2 sampling mode."),
1393 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 21 }),
1394 bit_size: 1,
1395 array: None,
1396 enumm: None,
1397 },
1398 Field {
1399 name: "g6_io3",
1400 description: Some("G6_IO3 sampling mode."),
1401 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 22 }),
1402 bit_size: 1,
1403 array: None,
1404 enumm: None,
1405 },
1406 Field {
1407 name: "g6_io4",
1408 description: Some("G6_IO4 sampling mode."),
1409 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 23 }),
1410 bit_size: 1,
1411 array: None,
1412 enumm: None,
1413 },
1414 Field {
1415 name: "g7_io1",
1416 description: Some("G7_IO1 sampling mode."),
1417 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 24 }),
1418 bit_size: 1,
1419 array: None,
1420 enumm: None,
1421 },
1422 Field {
1423 name: "g7_io2",
1424 description: Some("G7_IO2 sampling mode."),
1425 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 25 }),
1426 bit_size: 1,
1427 array: None,
1428 enumm: None,
1429 },
1430 Field {
1431 name: "g7_io3",
1432 description: Some("G7_IO3 sampling mode."),
1433 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 26 }),
1434 bit_size: 1,
1435 array: None,
1436 enumm: None,
1437 },
1438 Field {
1439 name: "g7_io4",
1440 description: Some("G7_IO4 sampling mode."),
1441 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 27 }),
1442 bit_size: 1,
1443 array: None,
1444 enumm: None,
1445 },
1446 Field {
1447 name: "g8_io1",
1448 description: Some("G8_IO1 sampling mode."),
1449 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 28 }),
1450 bit_size: 1,
1451 array: None,
1452 enumm: None,
1453 },
1454 Field {
1455 name: "g8_io2",
1456 description: Some("G8_IO2 sampling mode."),
1457 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 29 }),
1458 bit_size: 1,
1459 array: None,
1460 enumm: None,
1461 },
1462 Field {
1463 name: "g8_io3",
1464 description: Some("G8_IO3 sampling mode."),
1465 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 30 }),
1466 bit_size: 1,
1467 array: None,
1468 enumm: None,
1469 },
1470 Field {
1471 name: "g8_io4",
1472 description: Some("G8_IO4 sampling mode."),
1473 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 31 }),
1474 bit_size: 1,
1475 array: None,
1476 enumm: None,
1477 },
1478 ],
1479 },
1480 FieldSet {
1481 name: "Isr",
1482 extends: None,
1483 description: Some("interrupt status register."),
1484 bit_size: 32,
1485 fields: &[
1486 Field {
1487 name: "eoaf",
1488 description: Some("End of acquisition flag."),
1489 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 0 }),
1490 bit_size: 1,
1491 array: None,
1492 enumm: None,
1493 },
1494 Field {
1495 name: "mcef",
1496 description: Some("Max count error flag."),
1497 bit_offset: BitOffset::Regular(RegularBitOffset { offset: 1 }),
1498 bit_size: 1,
1499 array: None,
1500 enumm: None,
1501 },
1502 ],
1503 },
1504 ],
1505 enums: &[],
1506};
1507