1/* Double-precision vector (Advanced SIMD) log function.
2
3 Copyright (C) 2023-2024 Free Software Foundation, Inc.
4 This file is part of the GNU C Library.
5
6 The GNU C Library is free software; you can redistribute it and/or
7 modify it under the terms of the GNU Lesser General Public
8 License as published by the Free Software Foundation; either
9 version 2.1 of the License, or (at your option) any later version.
10
11 The GNU C Library is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 Lesser General Public License for more details.
15
16 You should have received a copy of the GNU Lesser General Public
17 License along with the GNU C Library; if not, see
18 <https://www.gnu.org/licenses/>. */
19
20#include "v_math.h"
21
22static const struct data
23{
24 uint64x2_t off, sign_exp_mask, offset_lower_bound;
25 uint32x4_t special_bound;
26 float64x2_t c0, c2;
27 double c1, c3, ln2, c4;
28} data = {
29 /* Rel error: 0x1.6272e588p-56 in [ -0x1.fc1p-9 0x1.009p-8 ]. */
30 .c0 = V2 (-0x1.ffffffffffff7p-2),
31 .c1 = 0x1.55555555170d4p-2,
32 .c2 = V2 (-0x1.0000000399c27p-2),
33 .c3 = 0x1.999b2e90e94cap-3,
34 .c4 = -0x1.554e550bd501ep-3,
35 .ln2 = 0x1.62e42fefa39efp-1,
36 .sign_exp_mask = V2 (0xfff0000000000000),
37 .off = V2 (0x3fe6900900000000),
38 /* Lower bound is 0x0010000000000000. For
39 optimised register use subnormals are detected after offset has been
40 subtracted, so lower bound - offset (which wraps around). */
41 .offset_lower_bound = V2 (0x0010000000000000 - 0x3fe6900900000000),
42 .special_bound = V4 (0x7fe00000), /* asuint64(inf) - asuint64(0x1p-126). */
43};
44
45#define N (1 << V_LOG_TABLE_BITS)
46#define IndexMask (N - 1)
47
48struct entry
49{
50 float64x2_t invc;
51 float64x2_t logc;
52};
53
54static inline struct entry
55lookup (uint64x2_t i)
56{
57 /* Since N is a power of 2, n % N = n & (N - 1). */
58 struct entry e;
59 uint64_t i0 = (vgetq_lane_u64 (i, 0) >> (52 - V_LOG_TABLE_BITS)) & IndexMask;
60 uint64_t i1 = (vgetq_lane_u64 (i, 1) >> (52 - V_LOG_TABLE_BITS)) & IndexMask;
61 float64x2_t e0 = vld1q_f64 (&__v_log_data.table[i0].invc);
62 float64x2_t e1 = vld1q_f64 (&__v_log_data.table[i1].invc);
63 e.invc = vuzp1q_f64 (e0, e1);
64 e.logc = vuzp2q_f64 (e0, e1);
65 return e;
66}
67
68static float64x2_t VPCS_ATTR NOINLINE
69special_case (float64x2_t hi, uint64x2_t u_off, float64x2_t y, float64x2_t r2,
70 uint32x2_t special, const struct data *d)
71{
72 float64x2_t x = vreinterpretq_f64_u64 (vaddq_u64 (u_off, d->off));
73 return v_call_f64 (log, x, vfmaq_f64 (hi, y, r2), vmovl_u32 (special));
74}
75
76/* Double-precision vector log routine.
77 The maximum observed error is 2.17 ULP:
78 _ZGVnN2v_log(0x1.a6129884398a3p+0) got 0x1.ffffff1cca043p-2
79 want 0x1.ffffff1cca045p-2. */
80float64x2_t VPCS_ATTR V_NAME_D1 (log) (float64x2_t x)
81{
82 const struct data *d = ptr_barrier (&data);
83
84 /* To avoid having to mov x out of the way, keep u after offset has been
85 applied, and recover x by adding the offset back in the special-case
86 handler. */
87 uint64x2_t u = vreinterpretq_u64_f64 (x);
88 uint64x2_t u_off = vsubq_u64 (u, d->off);
89
90 /* x = 2^k z; where z is in range [Off,2*Off) and exact.
91 The range is split into N subintervals.
92 The ith subinterval contains z and c is near its center. */
93 int64x2_t k = vshrq_n_s64 (vreinterpretq_s64_u64 (u_off), 52);
94 uint64x2_t iz = vsubq_u64 (u, vandq_u64 (u_off, d->sign_exp_mask));
95 float64x2_t z = vreinterpretq_f64_u64 (iz);
96
97 struct entry e = lookup (u_off);
98
99 uint32x2_t special = vcge_u32 (vsubhn_u64 (u_off, d->offset_lower_bound),
100 vget_low_u32 (d->special_bound));
101
102 /* log(x) = log1p(z/c-1) + log(c) + k*Ln2. */
103 float64x2_t r = vfmaq_f64 (v_f64 (-1.0), z, e.invc);
104 float64x2_t kd = vcvtq_f64_s64 (k);
105
106 /* hi = r + log(c) + k*Ln2. */
107 float64x2_t ln2_and_c4 = vld1q_f64 (&d->ln2);
108 float64x2_t hi = vfmaq_laneq_f64 (vaddq_f64 (e.logc, r), kd, ln2_and_c4, 0);
109
110 /* y = r2*(A0 + r*A1 + r2*(A2 + r*A3 + r2*A4)) + hi. */
111 float64x2_t odd_coeffs = vld1q_f64 (&d->c1);
112 float64x2_t r2 = vmulq_f64 (r, r);
113 float64x2_t y = vfmaq_laneq_f64 (d->c2, r, odd_coeffs, 1);
114 float64x2_t p = vfmaq_laneq_f64 (d->c0, r, odd_coeffs, 0);
115 y = vfmaq_laneq_f64 (y, r2, ln2_and_c4, 1);
116 y = vfmaq_f64 (p, r2, y);
117
118 if (__glibc_unlikely (v_any_u32h (special)))
119 return special_case (hi, u_off, y, r2, special, d);
120 return vfmaq_f64 (hi, y, r2);
121}
122

source code of glibc/sysdeps/aarch64/fpu/log_advsimd.c