1/* Install given floating-point control modes. RISC-V version.
2 Copyright (C) 2017-2024 Free Software Foundation, Inc.
3 This file is part of the GNU C Library.
4
5 The GNU C Library is free software; you can redistribute it and/or
6 modify it under the terms of the GNU Lesser General Public
7 License as published by the Free Software Foundation; either
8 version 2.1 of the License, or (at your option) any later version.
9
10 The GNU C Library is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 Lesser General Public License for more details.
14
15 You should have received a copy of the GNU Lesser General Public
16 License along with the GNU C Library; if not, see
17 <https://www.gnu.org/licenses/>. */
18
19#include <fenv.h>
20#include <fpu_control.h>
21
22int
23fesetmode (const femode_t *modep)
24{
25 asm volatile ("csrc fcsr, %0" : : "r" (~FE_ALL_EXCEPT));
26
27 if (modep != FE_DFL_MODE)
28 asm volatile ("csrs fcsr, %0" : : "r" (*modep & ~FE_ALL_EXCEPT));
29
30 return 0;
31}
32

source code of glibc/sysdeps/riscv/rvf/fesetmode.c