| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
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| 2 | /* |
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| 3 | * |
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| 4 | * Copyright (C) 2007 Google, Inc. |
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| 5 | * Copyright (c) 2011, Code Aurora Forum. All rights reserved. |
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| 6 | * Author: Brian Swetland <swetland@google.com> |
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| 7 | */ |
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| 8 | |
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| 9 | .macro addruart, rp, rv, tmp |
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| 10 | ldr \rp, =CONFIG_DEBUG_UART_PHYS |
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| 11 | ldr \rv, =CONFIG_DEBUG_UART_VIRT |
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| 12 | .endm |
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| 13 | |
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| 14 | .macro senduart, rd, rx |
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| 15 | ARM_BE8(rev \rd, \rd ) |
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| 16 | @ Write the 1 character to UARTDM_TF |
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| 17 | str \rd, [\rx, #0x70] |
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| 18 | .endm |
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| 19 | |
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| 20 | .macro waituartcts,rd,rx |
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| 21 | .endm |
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| 22 | |
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| 23 | .macro waituarttxrdy, rd, rx |
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| 24 | @ check for TX_EMT in UARTDM_SR |
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| 25 | ldr \rd, [\rx, #0x08] |
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| 26 | ARM_BE8(rev \rd, \rd ) |
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| 27 | tst \rd, #0x08 |
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| 28 | bne 1002f |
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| 29 | @ wait for TXREADY in UARTDM_ISR |
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| 30 | 1001: ldr \rd, [\rx, #0x14] |
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| 31 | ARM_BE8(rev \rd, \rd ) |
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| 32 | tst \rd, #0x80 |
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| 33 | beq 1001b |
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| 34 | 1002: |
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| 35 | @ Clear TX_READY by writing to the UARTDM_CR register |
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| 36 | mov \rd, #0x300 |
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| 37 | ARM_BE8(rev \rd, \rd ) |
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| 38 | str \rd, [\rx, #0x10] |
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| 39 | @ Write 0x1 to NCF register |
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| 40 | mov \rd, #0x1 |
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| 41 | ARM_BE8(rev \rd, \rd ) |
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| 42 | str \rd, [\rx, #0x40] |
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| 43 | @ UARTDM reg. Read to induce delay |
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| 44 | ldr \rd, [\rx, #0x08] |
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| 45 | .endm |
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| 46 | |
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| 47 | .macro busyuart, rd, rx |
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| 48 | .endm |
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| 49 | |
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