| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
|---|
| 2 | /* |
|---|
| 3 | * Renesas SCIF(A) debugging macro include header |
|---|
| 4 | * |
|---|
| 5 | * Based on r8a7790.S |
|---|
| 6 | * |
|---|
| 7 | * Copyright (C) 2012-2013 Renesas Electronics Corporation |
|---|
| 8 | * Copyright (C) 1994-1999 Russell King |
|---|
| 9 | */ |
|---|
| 10 | |
|---|
| 11 | #define SCIF_PHYS CONFIG_DEBUG_UART_PHYS |
|---|
| 12 | #define SCIF_VIRT ((SCIF_PHYS & 0x00ffffff) | 0xfd000000) |
|---|
| 13 | |
|---|
| 14 | #if defined(CONFIG_DEBUG_R7S9210_SCIF2) || defined(CONFIG_DEBUG_R7S9210_SCIF4) |
|---|
| 15 | /* RZ/A2 SCIFA */ |
|---|
| 16 | #define FTDR 0x06 |
|---|
| 17 | #define FSR 0x08 |
|---|
| 18 | #elif CONFIG_DEBUG_UART_PHYS < 0xe6e00000 |
|---|
| 19 | /* SCIFA */ |
|---|
| 20 | #define FTDR 0x20 |
|---|
| 21 | #define FSR 0x14 |
|---|
| 22 | #else |
|---|
| 23 | /* SCIF */ |
|---|
| 24 | #define FTDR 0x0c |
|---|
| 25 | #define FSR 0x10 |
|---|
| 26 | #endif |
|---|
| 27 | |
|---|
| 28 | #define TDFE (1 << 5) |
|---|
| 29 | #define TEND (1 << 6) |
|---|
| 30 | |
|---|
| 31 | .macro addruart, rp, rv, tmp |
|---|
| 32 | ldr \rp, =SCIF_PHYS |
|---|
| 33 | ldr \rv, =SCIF_VIRT |
|---|
| 34 | .endm |
|---|
| 35 | |
|---|
| 36 | .macro waituartcts,rd,rx |
|---|
| 37 | .endm |
|---|
| 38 | |
|---|
| 39 | .macro waituarttxrdy, rd, rx |
|---|
| 40 | 1001: ldrh \rd, [\rx, #FSR] |
|---|
| 41 | tst \rd, #TDFE |
|---|
| 42 | beq 1001b |
|---|
| 43 | .endm |
|---|
| 44 | |
|---|
| 45 | .macro senduart, rd, rx |
|---|
| 46 | strb \rd, [\rx, #FTDR] |
|---|
| 47 | ldrh \rd, [\rx, #FSR] |
|---|
| 48 | bic \rd, \rd, #TEND |
|---|
| 49 | strh \rd, [\rx, #FSR] |
|---|
| 50 | .endm |
|---|
| 51 | |
|---|
| 52 | .macro busyuart, rd, rx |
|---|
| 53 | 1001: ldrh \rd, [\rx, #FSR] |
|---|
| 54 | tst \rd, #TEND |
|---|
| 55 | beq 1001b |
|---|
| 56 | .endm |
|---|
| 57 | |
|---|
