| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
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| 2 | /* |
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| 3 | * Copyright 2013 Freescale Semiconductor, Inc. |
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| 4 | */ |
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| 5 | |
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| 6 | #define VF_UART0_BASE_ADDR 0x40027000 |
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| 7 | #define VF_UART1_BASE_ADDR 0x40028000 |
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| 8 | #define VF_UART2_BASE_ADDR 0x40029000 |
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| 9 | #define VF_UART3_BASE_ADDR 0x4002a000 |
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| 10 | #define VF_UART_BASE_ADDR(n) VF_UART##n##_BASE_ADDR |
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| 11 | #define VF_UART_BASE(n) VF_UART_BASE_ADDR(n) |
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| 12 | #define VF_UART_PHYSICAL_BASE VF_UART_BASE(CONFIG_DEBUG_VF_UART_PORT) |
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| 13 | |
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| 14 | #define VF_UART_VIRTUAL_BASE 0xfe000000 |
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| 15 | |
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| 16 | .macro addruart, rp, rv, tmp |
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| 17 | ldr \rp, =VF_UART_PHYSICAL_BASE @ physical |
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| 18 | and \rv, \rp, #0xffffff @ offset within 16MB section |
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| 19 | add \rv, \rv, #VF_UART_VIRTUAL_BASE |
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| 20 | .endm |
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| 21 | |
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| 22 | .macro senduart, rd, rx |
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| 23 | strb \rd, [\rx, #0x7] @ Data Register |
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| 24 | .endm |
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| 25 | |
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| 26 | .macro busyuart, rd, rx |
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| 27 | 1001: ldrb \rd, [\rx, #0x4] @ Status Register 1 |
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| 28 | tst \rd, #1 << 6 @ TC |
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| 29 | beq 1001b @ wait until transmit done |
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| 30 | .endm |
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| 31 | |
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| 32 | .macro waituartcts,rd,rx |
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| 33 | .endm |
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| 34 | |
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| 35 | .macro waituarttxrdy,rd,rx |
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| 36 | .endm |
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| 37 | |
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