| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
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| 2 | /* |
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| 3 | * linux/arch/arm/lib/copypage.S |
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| 4 | * |
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| 5 | * Copyright (C) 1995-1999 Russell King |
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| 6 | * |
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| 7 | * ASM optimised string functions |
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| 8 | */ |
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| 9 | #include <linux/linkage.h> |
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| 10 | #include <asm/assembler.h> |
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| 11 | #include <asm/asm-offsets.h> |
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| 12 | #include <asm/cache.h> |
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| 13 | |
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| 14 | #define COPY_COUNT (PAGE_SZ / (2 * L1_CACHE_BYTES) PLD( -1 )) |
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| 15 | |
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| 16 | .text |
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| 17 | .align 5 |
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| 18 | /* |
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| 19 | * StrongARM optimised copy_page routine |
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| 20 | * now 1.78bytes/cycle, was 1.60 bytes/cycle (50MHz bus -> 89MB/s) |
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| 21 | * Note that we probably achieve closer to the 100MB/s target with |
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| 22 | * the core clock switching. |
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| 23 | */ |
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| 24 | ENTRY(copy_page) |
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| 25 | stmfd sp!, {r4, lr} @ 2 |
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| 26 | PLD( pld [r1, #0] ) |
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| 27 | PLD( pld [r1, #L1_CACHE_BYTES] ) |
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| 28 | mov r2, #COPY_COUNT @ 1 |
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| 29 | ldmia r1!, {r3, r4, ip, lr} @ 4+1 |
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| 30 | 1: PLD( pld [r1, #2 * L1_CACHE_BYTES]) |
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| 31 | PLD( pld [r1, #3 * L1_CACHE_BYTES]) |
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| 32 | 2: |
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| 33 | .rept (2 * L1_CACHE_BYTES / 16 - 1) |
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| 34 | stmia r0!, {r3, r4, ip, lr} @ 4 |
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| 35 | ldmia r1!, {r3, r4, ip, lr} @ 4 |
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| 36 | .endr |
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| 37 | subs r2, r2, #1 @ 1 |
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| 38 | stmia r0!, {r3, r4, ip, lr} @ 4 |
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| 39 | ldmiagt r1!, {r3, r4, ip, lr} @ 4 |
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| 40 | bgt 1b @ 1 |
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| 41 | PLD( ldmiaeq r1!, {r3, r4, ip, lr} ) |
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| 42 | PLD( beq 2b ) |
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| 43 | ldmfd sp!, {r4, pc} @ 3 |
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| 44 | ENDPROC(copy_page) |
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| 45 | |
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