| 1 | /* |
| 2 | * DaVinci interrupt controller definitions |
| 3 | * |
| 4 | * Copyright (C) 2006 Texas Instruments. |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify it |
| 7 | * under the terms of the GNU General Public License as published by the |
| 8 | * Free Software Foundation; either version 2 of the License, or (at your |
| 9 | * option) any later version. |
| 10 | * |
| 11 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED |
| 12 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| 13 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN |
| 14 | * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 15 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 16 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF |
| 17 | * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
| 18 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 19 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 20 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 21 | * |
| 22 | * You should have received a copy of the GNU General Public License along |
| 23 | * with this program; if not, write to the Free Software Foundation, Inc., |
| 24 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
| 25 | * |
| 26 | */ |
| 27 | #ifndef __ASM_ARCH_IRQS_H |
| 28 | #define __ASM_ARCH_IRQS_H |
| 29 | |
| 30 | /* DA8XX interrupts */ |
| 31 | #define IRQ_DA8XX_COMMTX 0 |
| 32 | #define IRQ_DA8XX_COMMRX 1 |
| 33 | #define IRQ_DA8XX_NINT 2 |
| 34 | #define IRQ_DA8XX_EVTOUT0 3 |
| 35 | #define IRQ_DA8XX_EVTOUT1 4 |
| 36 | #define IRQ_DA8XX_EVTOUT2 5 |
| 37 | #define IRQ_DA8XX_EVTOUT3 6 |
| 38 | #define IRQ_DA8XX_EVTOUT4 7 |
| 39 | #define IRQ_DA8XX_EVTOUT5 8 |
| 40 | #define IRQ_DA8XX_EVTOUT6 9 |
| 41 | #define IRQ_DA8XX_EVTOUT7 10 |
| 42 | #define IRQ_DA8XX_CCINT0 11 |
| 43 | #define IRQ_DA8XX_CCERRINT 12 |
| 44 | #define IRQ_DA8XX_TCERRINT0 13 |
| 45 | #define IRQ_DA8XX_AEMIFINT 14 |
| 46 | #define IRQ_DA8XX_I2CINT0 15 |
| 47 | #define IRQ_DA8XX_MMCSDINT0 16 |
| 48 | #define IRQ_DA8XX_MMCSDINT1 17 |
| 49 | #define IRQ_DA8XX_ALLINT0 18 |
| 50 | #define IRQ_DA8XX_RTC 19 |
| 51 | #define IRQ_DA8XX_SPINT0 20 |
| 52 | #define IRQ_DA8XX_TINT12_0 21 |
| 53 | #define IRQ_DA8XX_TINT34_0 22 |
| 54 | #define IRQ_DA8XX_TINT12_1 23 |
| 55 | #define IRQ_DA8XX_TINT34_1 24 |
| 56 | #define IRQ_DA8XX_UARTINT0 25 |
| 57 | #define IRQ_DA8XX_KEYMGRINT 26 |
| 58 | #define IRQ_DA8XX_SECINT 26 |
| 59 | #define IRQ_DA8XX_SECKEYERR 26 |
| 60 | #define IRQ_DA8XX_CHIPINT0 28 |
| 61 | #define IRQ_DA8XX_CHIPINT1 29 |
| 62 | #define IRQ_DA8XX_CHIPINT2 30 |
| 63 | #define IRQ_DA8XX_CHIPINT3 31 |
| 64 | #define IRQ_DA8XX_TCERRINT1 32 |
| 65 | #define IRQ_DA8XX_C0_RX_THRESH_PULSE 33 |
| 66 | #define IRQ_DA8XX_C0_RX_PULSE 34 |
| 67 | #define IRQ_DA8XX_C0_TX_PULSE 35 |
| 68 | #define IRQ_DA8XX_C0_MISC_PULSE 36 |
| 69 | #define IRQ_DA8XX_C1_RX_THRESH_PULSE 37 |
| 70 | #define IRQ_DA8XX_C1_RX_PULSE 38 |
| 71 | #define IRQ_DA8XX_C1_TX_PULSE 39 |
| 72 | #define IRQ_DA8XX_C1_MISC_PULSE 40 |
| 73 | #define IRQ_DA8XX_MEMERR 41 |
| 74 | #define IRQ_DA8XX_GPIO0 42 |
| 75 | #define IRQ_DA8XX_GPIO1 43 |
| 76 | #define IRQ_DA8XX_GPIO2 44 |
| 77 | #define IRQ_DA8XX_GPIO3 45 |
| 78 | #define IRQ_DA8XX_GPIO4 46 |
| 79 | #define IRQ_DA8XX_GPIO5 47 |
| 80 | #define IRQ_DA8XX_GPIO6 48 |
| 81 | #define IRQ_DA8XX_GPIO7 49 |
| 82 | #define IRQ_DA8XX_GPIO8 50 |
| 83 | #define IRQ_DA8XX_I2CINT1 51 |
| 84 | #define IRQ_DA8XX_LCDINT 52 |
| 85 | #define IRQ_DA8XX_UARTINT1 53 |
| 86 | #define IRQ_DA8XX_MCASPINT 54 |
| 87 | #define IRQ_DA8XX_ALLINT1 55 |
| 88 | #define IRQ_DA8XX_SPINT1 56 |
| 89 | #define IRQ_DA8XX_UHPI_INT1 57 |
| 90 | #define IRQ_DA8XX_USB_INT 58 |
| 91 | #define IRQ_DA8XX_IRQN 59 |
| 92 | #define IRQ_DA8XX_RWAKEUP 60 |
| 93 | #define IRQ_DA8XX_UARTINT2 61 |
| 94 | #define IRQ_DA8XX_DFTSSINT 62 |
| 95 | #define IRQ_DA8XX_EHRPWM0 63 |
| 96 | #define IRQ_DA8XX_EHRPWM0TZ 64 |
| 97 | #define IRQ_DA8XX_EHRPWM1 65 |
| 98 | #define IRQ_DA8XX_EHRPWM1TZ 66 |
| 99 | #define IRQ_DA8XX_ECAP0 69 |
| 100 | #define IRQ_DA8XX_ECAP1 70 |
| 101 | #define IRQ_DA8XX_ECAP2 71 |
| 102 | #define IRQ_DA8XX_ARMCLKSTOPREQ 90 |
| 103 | |
| 104 | /* DA850 speicific interrupts */ |
| 105 | #define IRQ_DA850_MPUADDRERR0 27 |
| 106 | #define IRQ_DA850_MPUPROTERR0 27 |
| 107 | #define IRQ_DA850_IOPUADDRERR0 27 |
| 108 | #define IRQ_DA850_IOPUPROTERR0 27 |
| 109 | #define IRQ_DA850_IOPUADDRERR1 27 |
| 110 | #define IRQ_DA850_IOPUPROTERR1 27 |
| 111 | #define IRQ_DA850_IOPUADDRERR2 27 |
| 112 | #define IRQ_DA850_IOPUPROTERR2 27 |
| 113 | #define IRQ_DA850_BOOTCFG_ADDR_ERR 27 |
| 114 | #define IRQ_DA850_BOOTCFG_PROT_ERR 27 |
| 115 | #define IRQ_DA850_MPUADDRERR1 27 |
| 116 | #define IRQ_DA850_MPUPROTERR1 27 |
| 117 | #define IRQ_DA850_IOPUADDRERR3 27 |
| 118 | #define IRQ_DA850_IOPUPROTERR3 27 |
| 119 | #define IRQ_DA850_IOPUADDRERR4 27 |
| 120 | #define IRQ_DA850_IOPUPROTERR4 27 |
| 121 | #define IRQ_DA850_IOPUADDRERR5 27 |
| 122 | #define IRQ_DA850_IOPUPROTERR5 27 |
| 123 | #define IRQ_DA850_MIOPU_BOOTCFG_ERR 27 |
| 124 | #define IRQ_DA850_SATAINT 67 |
| 125 | #define IRQ_DA850_TINT12_2 68 |
| 126 | #define IRQ_DA850_TINT34_2 68 |
| 127 | #define IRQ_DA850_TINTALL_2 68 |
| 128 | #define IRQ_DA850_MMCSDINT0_1 72 |
| 129 | #define IRQ_DA850_MMCSDINT1_1 73 |
| 130 | #define IRQ_DA850_T12CMPINT0_2 74 |
| 131 | #define IRQ_DA850_T12CMPINT1_2 75 |
| 132 | #define IRQ_DA850_T12CMPINT2_2 76 |
| 133 | #define IRQ_DA850_T12CMPINT3_2 77 |
| 134 | #define IRQ_DA850_T12CMPINT4_2 78 |
| 135 | #define IRQ_DA850_T12CMPINT5_2 79 |
| 136 | #define IRQ_DA850_T12CMPINT6_2 80 |
| 137 | #define IRQ_DA850_T12CMPINT7_2 81 |
| 138 | #define IRQ_DA850_T12CMPINT0_3 82 |
| 139 | #define IRQ_DA850_T12CMPINT1_3 83 |
| 140 | #define IRQ_DA850_T12CMPINT2_3 84 |
| 141 | #define IRQ_DA850_T12CMPINT3_3 85 |
| 142 | #define IRQ_DA850_T12CMPINT4_3 86 |
| 143 | #define IRQ_DA850_T12CMPINT5_3 87 |
| 144 | #define IRQ_DA850_T12CMPINT6_3 88 |
| 145 | #define IRQ_DA850_T12CMPINT7_3 89 |
| 146 | #define IRQ_DA850_RPIINT 91 |
| 147 | #define IRQ_DA850_VPIFINT 92 |
| 148 | #define IRQ_DA850_CCINT1 93 |
| 149 | #define IRQ_DA850_CCERRINT1 94 |
| 150 | #define IRQ_DA850_TCERRINT2 95 |
| 151 | #define IRQ_DA850_TINT12_3 96 |
| 152 | #define IRQ_DA850_TINT34_3 96 |
| 153 | #define IRQ_DA850_TINTALL_3 96 |
| 154 | #define IRQ_DA850_MCBSP0RINT 97 |
| 155 | #define IRQ_DA850_MCBSP0XINT 98 |
| 156 | #define IRQ_DA850_MCBSP1RINT 99 |
| 157 | #define IRQ_DA850_MCBSP1XINT 100 |
| 158 | |
| 159 | #define DA850_N_CP_INTC_IRQ 101 |
| 160 | |
| 161 | #endif /* __ASM_ARCH_IRQS_H */ |
| 162 | |