| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | /* |
| 3 | * TI DaVinci platform support for power management. |
| 4 | * |
| 5 | * Copyright (C) 2009 Texas Instruments, Inc. https://www.ti.com/ |
| 6 | */ |
| 7 | #ifndef _MACH_DAVINCI_PM_H |
| 8 | #define _MACH_DAVINCI_PM_H |
| 9 | |
| 10 | /* |
| 11 | * Caution: Assembly code in sleep.S makes assumtion on the order |
| 12 | * of the members of this structure. |
| 13 | */ |
| 14 | struct davinci_pm_config { |
| 15 | void __iomem *ddr2_ctlr_base; |
| 16 | void __iomem *ddrpsc_reg_base; |
| 17 | int ddrpsc_num; |
| 18 | void __iomem *ddrpll_reg_base; |
| 19 | void __iomem *deepsleep_reg; |
| 20 | void __iomem *cpupll_reg_base; |
| 21 | /* |
| 22 | * Note on SLEEPCOUNT: |
| 23 | * The SLEEPCOUNT feature is mainly intended for cases in which |
| 24 | * the internal oscillator is used. The internal oscillator is |
| 25 | * fully disabled in deep sleep mode. When you exist deep sleep |
| 26 | * mode, the oscillator will be turned on and will generate very |
| 27 | * small oscillations which will not be detected by the deep sleep |
| 28 | * counter. Eventually those oscillations will grow to an amplitude |
| 29 | * large enough to start incrementing the deep sleep counter. |
| 30 | * In this case recommendation from hardware engineers is that the |
| 31 | * SLEEPCOUNT be set to 4096. This means that 4096 valid clock cycles |
| 32 | * must be detected before the clock is passed to the rest of the |
| 33 | * system. |
| 34 | * In the case that the internal oscillator is not used and the |
| 35 | * clock is generated externally, the SLEEPCOUNT value can be very |
| 36 | * small since the clock input is assumed to be stable before SoC |
| 37 | * is taken out of deepsleep mode. A value of 128 would be more than |
| 38 | * adequate. |
| 39 | */ |
| 40 | int sleepcount; |
| 41 | }; |
| 42 | |
| 43 | extern unsigned int davinci_cpu_suspend_sz; |
| 44 | extern void davinci_cpu_suspend(struct davinci_pm_config *); |
| 45 | |
| 46 | #endif |
| 47 | |