1/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 * Copyright 2004-2007, 2010-2015 Freescale Semiconductor, Inc.
4 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
5 */
6
7#ifndef __ASM_ARCH_MXC_H__
8#define __ASM_ARCH_MXC_H__
9
10#include <linux/types.h>
11#include <soc/imx/cpu.h>
12
13#ifndef __ASM_ARCH_MXC_HARDWARE_H__
14#error "Do not include directly."
15#endif
16
17#define IMX_DDR_TYPE_LPDDR2 1
18
19#ifndef __ASSEMBLY__
20
21#ifdef CONFIG_SOC_IMX6SL
22static inline bool cpu_is_imx6sl(void)
23{
24 return __mxc_cpu_type == MXC_CPU_IMX6SL;
25}
26#else
27static inline bool cpu_is_imx6sl(void)
28{
29 return false;
30}
31#endif
32
33static inline bool cpu_is_imx6dl(void)
34{
35 return __mxc_cpu_type == MXC_CPU_IMX6DL;
36}
37
38static inline bool cpu_is_imx6sx(void)
39{
40 return __mxc_cpu_type == MXC_CPU_IMX6SX;
41}
42
43static inline bool cpu_is_imx6ul(void)
44{
45 return __mxc_cpu_type == MXC_CPU_IMX6UL;
46}
47
48static inline bool cpu_is_imx6ull(void)
49{
50 return __mxc_cpu_type == MXC_CPU_IMX6ULL;
51}
52
53static inline bool cpu_is_imx6ulz(void)
54{
55 return __mxc_cpu_type == MXC_CPU_IMX6ULZ;
56}
57
58static inline bool cpu_is_imx6sll(void)
59{
60 return __mxc_cpu_type == MXC_CPU_IMX6SLL;
61}
62
63static inline bool cpu_is_imx6q(void)
64{
65 return __mxc_cpu_type == MXC_CPU_IMX6Q;
66}
67
68static inline bool cpu_is_imx7d(void)
69{
70 return __mxc_cpu_type == MXC_CPU_IMX7D;
71}
72
73struct cpu_op {
74 u32 cpu_rate;
75};
76
77int tzic_enable_wake(void);
78
79extern struct cpu_op *(*get_cpu_op)(int *op);
80#endif
81
82#define imx_readl readl_relaxed
83#define imx_readw readw_relaxed
84#define imx_writel writel_relaxed
85#define imx_writew writew_relaxed
86
87#endif /* __ASM_ARCH_MXC_H__ */
88

source code of linux/arch/arm/mach-imx/mxc.h