| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
| 2 | /* |
| 3 | * Interface for functions that need to be run in internal SRAM |
| 4 | */ |
| 5 | |
| 6 | #ifndef __ASSEMBLY__ |
| 7 | |
| 8 | extern void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, |
| 9 | u32 base_cs, u32 force_unlock); |
| 10 | extern void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, |
| 11 | u32 mem_type); |
| 12 | extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass); |
| 13 | |
| 14 | extern void omap3_sram_restore_context(void); |
| 15 | |
| 16 | extern int __init omap_sram_init(void); |
| 17 | |
| 18 | extern void *omap_sram_push(void *funcp, unsigned long size); |
| 19 | |
| 20 | extern void omap242x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, |
| 21 | u32 base_cs, u32 force_unlock); |
| 22 | extern unsigned long omap242x_sram_ddr_init_sz; |
| 23 | |
| 24 | extern u32 omap242x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, |
| 25 | int bypass); |
| 26 | extern unsigned long omap242x_sram_set_prcm_sz; |
| 27 | |
| 28 | extern void omap242x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, |
| 29 | u32 mem_type); |
| 30 | extern unsigned long omap242x_sram_reprogram_sdrc_sz; |
| 31 | |
| 32 | |
| 33 | extern void omap243x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl, |
| 34 | u32 base_cs, u32 force_unlock); |
| 35 | extern unsigned long omap243x_sram_ddr_init_sz; |
| 36 | |
| 37 | extern u32 omap243x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, |
| 38 | int bypass); |
| 39 | extern unsigned long omap243x_sram_set_prcm_sz; |
| 40 | |
| 41 | extern void omap243x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, |
| 42 | u32 mem_type); |
| 43 | extern unsigned long omap243x_sram_reprogram_sdrc_sz; |
| 44 | |
| 45 | #ifdef CONFIG_PM |
| 46 | extern void omap_push_sram_idle(void); |
| 47 | #else |
| 48 | static inline void omap_push_sram_idle(void) {} |
| 49 | #endif /* CONFIG_PM */ |
| 50 | |
| 51 | #endif /* __ASSEMBLY__ */ |
| 52 | |
| 53 | /* |
| 54 | * OMAP2+: define the SRAM PA addresses. |
| 55 | * Used by the SRAM management code and the idle sleep code. |
| 56 | */ |
| 57 | #define OMAP2_SRAM_PA 0x40200000 |
| 58 | #define OMAP3_SRAM_PA 0x40200000 |
| 59 | |