| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
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| 2 | /* |
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| 3 | * arch/arm/mach-pxa/include/mach/gumstix.h |
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| 4 | */ |
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| 5 | |
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| 6 | #include "irqs.h" /* PXA_GPIO_TO_IRQ */ |
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| 7 | |
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| 8 | /* BTRESET - Reset line to Bluetooth module, active low signal. */ |
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| 9 | #define GPIO_GUMSTIX_BTRESET 7 |
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| 10 | #define GPIO_GUMSTIX_BTRESET_MD (GPIO_GUMSTIX_BTRESET | GPIO_OUT) |
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| 11 | |
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| 12 | |
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| 13 | /* |
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| 14 | GPIOn - Input from MAX823 (or equiv), normalizing USB +5V into a clean |
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| 15 | interrupt signal for determining cable presence. On the gumstix F, |
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| 16 | this moves to GPIO17 and GPIO37. */ |
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| 17 | |
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| 18 | /* GPIOx - Connects to USB D+ and used as a pull-up after GPIOn |
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| 19 | has detected a cable insertion; driven low otherwise. */ |
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| 20 | |
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| 21 | #define GPIO_GUMSTIX_USB_GPIOn 35 |
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| 22 | #define GPIO_GUMSTIX_USB_GPIOx 41 |
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| 23 | |
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| 24 | /* usb state change */ |
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| 25 | #define GUMSTIX_USB_INTR_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_USB_GPIOn) |
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| 26 | |
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| 27 | #define GPIO_GUMSTIX_USB_GPIOn_MD (GPIO_GUMSTIX_USB_GPIOn | GPIO_IN) |
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| 28 | #define GPIO_GUMSTIX_USB_GPIOx_CON_MD (GPIO_GUMSTIX_USB_GPIOx | GPIO_OUT) |
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| 29 | #define GPIO_GUMSTIX_USB_GPIOx_DIS_MD (GPIO_GUMSTIX_USB_GPIOx | GPIO_IN) |
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| 30 | |
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| 31 | /* |
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| 32 | * SD/MMC definitions |
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| 33 | */ |
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| 34 | #define GUMSTIX_GPIO_nSD_WP 22 /* SD Write Protect */ |
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| 35 | #define GUMSTIX_GPIO_nSD_DETECT 11 /* MMC/SD Card Detect */ |
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| 36 | #define GUMSTIX_IRQ_GPIO_nSD_DETECT PXA_GPIO_TO_IRQ(GUMSTIX_GPIO_nSD_DETECT) |
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| 37 | |
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| 38 | /* |
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| 39 | * SMC Ethernet definitions |
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| 40 | * ETH_RST provides a hardware reset line to the ethernet chip |
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| 41 | * ETH is the IRQ line in from the ethernet chip to the PXA |
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| 42 | */ |
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| 43 | #define GPIO_GUMSTIX_ETH0_RST 80 |
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| 44 | #define GPIO_GUMSTIX_ETH0_RST_MD (GPIO_GUMSTIX_ETH0_RST | GPIO_OUT) |
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| 45 | #define GPIO_GUMSTIX_ETH1_RST 52 |
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| 46 | #define GPIO_GUMSTIX_ETH1_RST_MD (GPIO_GUMSTIX_ETH1_RST | GPIO_OUT) |
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| 47 | |
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| 48 | #define GPIO_GUMSTIX_ETH0 36 |
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| 49 | #define GPIO_GUMSTIX_ETH0_MD (GPIO_GUMSTIX_ETH0 | GPIO_IN) |
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| 50 | #define GUMSTIX_ETH0_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH0) |
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| 51 | #define GPIO_GUMSTIX_ETH1 27 |
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| 52 | #define GPIO_GUMSTIX_ETH1_MD (GPIO_GUMSTIX_ETH1 | GPIO_IN) |
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| 53 | #define GUMSTIX_ETH1_IRQ PXA_GPIO_TO_IRQ(GPIO_GUMSTIX_ETH1) |
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| 54 | |
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| 55 | |
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| 56 | /* CF reset line */ |
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| 57 | #define GPIO8_RESET 8 |
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| 58 | |
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| 59 | /* CF slot 0 */ |
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| 60 | #define GPIO4_nBVD1 4 |
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| 61 | #define GPIO4_nSTSCHG GPIO4_nBVD1 |
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| 62 | #define GPIO11_nCD 11 |
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| 63 | #define GPIO26_PRDY_nBSY 26 |
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| 64 | #define GUMSTIX_S0_nSTSCHG_IRQ PXA_GPIO_TO_IRQ(GPIO4_nSTSCHG) |
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| 65 | #define GUMSTIX_S0_nCD_IRQ PXA_GPIO_TO_IRQ(GPIO11_nCD) |
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| 66 | #define GUMSTIX_S0_PRDY_nBSY_IRQ PXA_GPIO_TO_IRQ(GPIO26_PRDY_nBSY) |
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| 67 | |
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| 68 | /* CF slot 1 */ |
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| 69 | #define GPIO18_nBVD1 18 |
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| 70 | #define GPIO18_nSTSCHG GPIO18_nBVD1 |
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| 71 | #define GPIO36_nCD 36 |
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| 72 | #define GPIO27_PRDY_nBSY 27 |
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| 73 | #define GUMSTIX_S1_nSTSCHG_IRQ PXA_GPIO_TO_IRQ(GPIO18_nSTSCHG) |
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| 74 | #define GUMSTIX_S1_nCD_IRQ PXA_GPIO_TO_IRQ(GPIO36_nCD) |
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| 75 | #define GUMSTIX_S1_PRDY_nBSY_IRQ PXA_GPIO_TO_IRQ(GPIO27_PRDY_nBSY) |
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| 76 | |
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| 77 | /* CF GPIO line modes */ |
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| 78 | #define GPIO4_nSTSCHG_MD (GPIO4_nSTSCHG | GPIO_IN) |
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| 79 | #define GPIO8_RESET_MD (GPIO8_RESET | GPIO_OUT) |
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| 80 | #define GPIO11_nCD_MD (GPIO11_nCD | GPIO_IN) |
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| 81 | #define GPIO18_nSTSCHG_MD (GPIO18_nSTSCHG | GPIO_IN) |
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| 82 | #define GPIO26_PRDY_nBSY_MD (GPIO26_PRDY_nBSY | GPIO_IN) |
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| 83 | #define GPIO27_PRDY_nBSY_MD (GPIO27_PRDY_nBSY | GPIO_IN) |
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| 84 | #define GPIO36_nCD_MD (GPIO36_nCD | GPIO_IN) |
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| 85 | |
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| 86 | /* for expansion boards that can't be programatically detected */ |
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| 87 | extern int am200_init(void); |
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| 88 | extern int am300_init(void); |
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| 89 | |
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| 90 | |
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