| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
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| 2 | /* |
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| 3 | * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved. |
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| 4 | */ |
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| 5 | |
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| 6 | #ifndef __MACH_TEGRA_IRAMMAP_H |
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| 7 | #define __MACH_TEGRA_IRAMMAP_H |
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| 8 | |
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| 9 | #include <linux/sizes.h> |
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| 10 | |
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| 11 | /* The first 1K of IRAM is permanently reserved for the CPU reset handler */ |
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| 12 | #define TEGRA_IRAM_RESET_HANDLER_OFFSET 0 |
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| 13 | #define TEGRA_IRAM_RESET_HANDLER_SIZE SZ_1K |
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| 14 | |
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| 15 | /* |
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| 16 | * This area is used for LPx resume vector, only while LPx power state is |
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| 17 | * active. At other times, the AVP may use this area for arbitrary purposes |
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| 18 | */ |
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| 19 | #define TEGRA_IRAM_LPx_RESUME_AREA (TEGRA_IRAM_BASE + SZ_4K) |
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| 20 | |
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| 21 | #endif |
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| 22 | |
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