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| 1 | /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ |
|---|---|
| 2 | /* |
| 3 | * Copyright (C) 2012 ARM Ltd. |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License version 2 as |
| 7 | * published by the Free Software Foundation. |
| 8 | * |
| 9 | * This program is distributed in the hope that it will be useful, |
| 10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | * GNU General Public License for more details. |
| 13 | * |
| 14 | * You should have received a copy of the GNU General Public License |
| 15 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 16 | */ |
| 17 | #ifndef _UAPI__ASM_HWCAP_H |
| 18 | #define _UAPI__ASM_HWCAP_H |
| 19 | |
| 20 | /* |
| 21 | * HWCAP flags - for AT_HWCAP |
| 22 | * |
| 23 | * Bits 62 and 63 are reserved for use by libc. |
| 24 | * Bits 33-61 are unallocated for potential use by libc. |
| 25 | */ |
| 26 | #define HWCAP_FP (1 << 0) |
| 27 | #define HWCAP_ASIMD (1 << 1) |
| 28 | #define HWCAP_EVTSTRM (1 << 2) |
| 29 | #define HWCAP_AES (1 << 3) |
| 30 | #define HWCAP_PMULL (1 << 4) |
| 31 | #define HWCAP_SHA1 (1 << 5) |
| 32 | #define HWCAP_SHA2 (1 << 6) |
| 33 | #define HWCAP_CRC32 (1 << 7) |
| 34 | #define HWCAP_ATOMICS (1 << 8) |
| 35 | #define HWCAP_FPHP (1 << 9) |
| 36 | #define HWCAP_ASIMDHP (1 << 10) |
| 37 | #define HWCAP_CPUID (1 << 11) |
| 38 | #define HWCAP_ASIMDRDM (1 << 12) |
| 39 | #define HWCAP_JSCVT (1 << 13) |
| 40 | #define HWCAP_FCMA (1 << 14) |
| 41 | #define HWCAP_LRCPC (1 << 15) |
| 42 | #define HWCAP_DCPOP (1 << 16) |
| 43 | #define HWCAP_SHA3 (1 << 17) |
| 44 | #define HWCAP_SM3 (1 << 18) |
| 45 | #define HWCAP_SM4 (1 << 19) |
| 46 | #define HWCAP_ASIMDDP (1 << 20) |
| 47 | #define HWCAP_SHA512 (1 << 21) |
| 48 | #define HWCAP_SVE (1 << 22) |
| 49 | #define HWCAP_ASIMDFHM (1 << 23) |
| 50 | #define HWCAP_DIT (1 << 24) |
| 51 | #define HWCAP_USCAT (1 << 25) |
| 52 | #define HWCAP_ILRCPC (1 << 26) |
| 53 | #define HWCAP_FLAGM (1 << 27) |
| 54 | #define HWCAP_SSBS (1 << 28) |
| 55 | #define HWCAP_SB (1 << 29) |
| 56 | #define HWCAP_PACA (1 << 30) |
| 57 | #define HWCAP_PACG (1UL << 31) |
| 58 | #define HWCAP_GCS (1UL << 32) |
| 59 | #define HWCAP_CMPBR (1UL << 33) |
| 60 | #define HWCAP_FPRCVT (1UL << 34) |
| 61 | #define HWCAP_F8MM8 (1UL << 35) |
| 62 | #define HWCAP_F8MM4 (1UL << 36) |
| 63 | #define HWCAP_SVE_F16MM (1UL << 37) |
| 64 | #define HWCAP_SVE_ELTPERM (1UL << 38) |
| 65 | #define HWCAP_SVE_AES2 (1UL << 39) |
| 66 | #define HWCAP_SVE_BFSCALE (1UL << 40) |
| 67 | #define HWCAP_SVE2P2 (1UL << 41) |
| 68 | #define HWCAP_SME2P2 (1UL << 42) |
| 69 | #define HWCAP_SME_SBITPERM (1UL << 43) |
| 70 | #define HWCAP_SME_AES (1UL << 44) |
| 71 | #define HWCAP_SME_SFEXPA (1UL << 45) |
| 72 | #define HWCAP_SME_STMOP (1UL << 46) |
| 73 | #define HWCAP_SME_SMOP4 (1UL << 47) |
| 74 | |
| 75 | /* |
| 76 | * HWCAP2 flags - for AT_HWCAP2 |
| 77 | */ |
| 78 | #define HWCAP2_DCPODP (1 << 0) |
| 79 | #define HWCAP2_SVE2 (1 << 1) |
| 80 | #define HWCAP2_SVEAES (1 << 2) |
| 81 | #define HWCAP2_SVEPMULL (1 << 3) |
| 82 | #define HWCAP2_SVEBITPERM (1 << 4) |
| 83 | #define HWCAP2_SVESHA3 (1 << 5) |
| 84 | #define HWCAP2_SVESM4 (1 << 6) |
| 85 | #define HWCAP2_FLAGM2 (1 << 7) |
| 86 | #define HWCAP2_FRINT (1 << 8) |
| 87 | #define HWCAP2_SVEI8MM (1 << 9) |
| 88 | #define HWCAP2_SVEF32MM (1 << 10) |
| 89 | #define HWCAP2_SVEF64MM (1 << 11) |
| 90 | #define HWCAP2_SVEBF16 (1 << 12) |
| 91 | #define HWCAP2_I8MM (1 << 13) |
| 92 | #define HWCAP2_BF16 (1 << 14) |
| 93 | #define HWCAP2_DGH (1 << 15) |
| 94 | #define HWCAP2_RNG (1 << 16) |
| 95 | #define HWCAP2_BTI (1 << 17) |
| 96 | #define HWCAP2_MTE (1 << 18) |
| 97 | #define HWCAP2_ECV (1 << 19) |
| 98 | #define HWCAP2_AFP (1 << 20) |
| 99 | #define HWCAP2_RPRES (1 << 21) |
| 100 | #define HWCAP2_MTE3 (1 << 22) |
| 101 | #define HWCAP2_SME (1 << 23) |
| 102 | #define HWCAP2_SME_I16I64 (1 << 24) |
| 103 | #define HWCAP2_SME_F64F64 (1 << 25) |
| 104 | #define HWCAP2_SME_I8I32 (1 << 26) |
| 105 | #define HWCAP2_SME_F16F32 (1 << 27) |
| 106 | #define HWCAP2_SME_B16F32 (1 << 28) |
| 107 | #define HWCAP2_SME_F32F32 (1 << 29) |
| 108 | #define HWCAP2_SME_FA64 (1 << 30) |
| 109 | #define HWCAP2_WFXT (1UL << 31) |
| 110 | #define HWCAP2_EBF16 (1UL << 32) |
| 111 | #define HWCAP2_SVE_EBF16 (1UL << 33) |
| 112 | #define HWCAP2_CSSC (1UL << 34) |
| 113 | #define HWCAP2_RPRFM (1UL << 35) |
| 114 | #define HWCAP2_SVE2P1 (1UL << 36) |
| 115 | #define HWCAP2_SME2 (1UL << 37) |
| 116 | #define HWCAP2_SME2P1 (1UL << 38) |
| 117 | #define HWCAP2_SME_I16I32 (1UL << 39) |
| 118 | #define HWCAP2_SME_BI32I32 (1UL << 40) |
| 119 | #define HWCAP2_SME_B16B16 (1UL << 41) |
| 120 | #define HWCAP2_SME_F16F16 (1UL << 42) |
| 121 | #define HWCAP2_MOPS (1UL << 43) |
| 122 | #define HWCAP2_HBC (1UL << 44) |
| 123 | #define HWCAP2_SVE_B16B16 (1UL << 45) |
| 124 | #define HWCAP2_LRCPC3 (1UL << 46) |
| 125 | #define HWCAP2_LSE128 (1UL << 47) |
| 126 | #define HWCAP2_FPMR (1UL << 48) |
| 127 | #define HWCAP2_LUT (1UL << 49) |
| 128 | #define HWCAP2_FAMINMAX (1UL << 50) |
| 129 | #define HWCAP2_F8CVT (1UL << 51) |
| 130 | #define HWCAP2_F8FMA (1UL << 52) |
| 131 | #define HWCAP2_F8DP4 (1UL << 53) |
| 132 | #define HWCAP2_F8DP2 (1UL << 54) |
| 133 | #define HWCAP2_F8E4M3 (1UL << 55) |
| 134 | #define HWCAP2_F8E5M2 (1UL << 56) |
| 135 | #define HWCAP2_SME_LUTV2 (1UL << 57) |
| 136 | #define HWCAP2_SME_F8F16 (1UL << 58) |
| 137 | #define HWCAP2_SME_F8F32 (1UL << 59) |
| 138 | #define HWCAP2_SME_SF8FMA (1UL << 60) |
| 139 | #define HWCAP2_SME_SF8DP4 (1UL << 61) |
| 140 | #define HWCAP2_SME_SF8DP2 (1UL << 62) |
| 141 | #define HWCAP2_POE (1UL << 63) |
| 142 | |
| 143 | /* |
| 144 | * HWCAP3 flags - for AT_HWCAP3 |
| 145 | */ |
| 146 | #define HWCAP3_MTE_FAR (1UL << 0) |
| 147 | #define HWCAP3_MTE_STORE_ONLY (1UL << 1) |
| 148 | #define HWCAP3_LSFE (1UL << 2) |
| 149 | |
| 150 | #endif /* _UAPI__ASM_HWCAP_H */ |
| 151 |
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