1 | // SPDX-License-Identifier: GPL-2.0-only |
2 | /* |
3 | * Based on arch/arm/kernel/irq.c |
4 | * |
5 | * Copyright (C) 1992 Linus Torvalds |
6 | * Modifications for ARM processor Copyright (C) 1995-2000 Russell King. |
7 | * Support for Dynamic Tick Timer Copyright (C) 2004-2005 Nokia Corporation. |
8 | * Dynamic Tick Timer written by Tony Lindgren <tony@atomide.com> and |
9 | * Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>. |
10 | * Copyright (C) 2012 ARM Ltd. |
11 | */ |
12 | |
13 | #include <linux/hardirq.h> |
14 | #include <linux/init.h> |
15 | #include <linux/irq.h> |
16 | #include <linux/irqchip.h> |
17 | #include <linux/kprobes.h> |
18 | #include <linux/memory.h> |
19 | #include <linux/scs.h> |
20 | #include <linux/seq_file.h> |
21 | #include <linux/smp.h> |
22 | #include <linux/vmalloc.h> |
23 | #include <asm/daifflags.h> |
24 | #include <asm/exception.h> |
25 | #include <asm/softirq_stack.h> |
26 | #include <asm/stacktrace.h> |
27 | #include <asm/vmap_stack.h> |
28 | |
29 | /* Only access this in an NMI enter/exit */ |
30 | DEFINE_PER_CPU(struct nmi_ctx, nmi_contexts); |
31 | |
32 | DEFINE_PER_CPU(unsigned long *, irq_stack_ptr); |
33 | |
34 | |
35 | DECLARE_PER_CPU(unsigned long *, irq_shadow_call_stack_ptr); |
36 | |
37 | #ifdef CONFIG_SHADOW_CALL_STACK |
38 | DEFINE_PER_CPU(unsigned long *, irq_shadow_call_stack_ptr); |
39 | #endif |
40 | |
41 | static void init_irq_scs(void) |
42 | { |
43 | int cpu; |
44 | |
45 | if (!scs_is_enabled()) |
46 | return; |
47 | |
48 | for_each_possible_cpu(cpu) |
49 | per_cpu(irq_shadow_call_stack_ptr, cpu) = |
50 | scs_alloc(cpu_to_node(cpu)); |
51 | } |
52 | |
53 | #ifdef CONFIG_VMAP_STACK |
54 | static void init_irq_stacks(void) |
55 | { |
56 | int cpu; |
57 | unsigned long *p; |
58 | |
59 | for_each_possible_cpu(cpu) { |
60 | p = arch_alloc_vmap_stack(IRQ_STACK_SIZE, cpu_to_node(cpu)); |
61 | per_cpu(irq_stack_ptr, cpu) = p; |
62 | } |
63 | } |
64 | #else |
65 | /* irq stack only needs to be 16 byte aligned - not IRQ_STACK_SIZE aligned. */ |
66 | DEFINE_PER_CPU_ALIGNED(unsigned long [IRQ_STACK_SIZE/sizeof(long)], irq_stack); |
67 | |
68 | static void init_irq_stacks(void) |
69 | { |
70 | int cpu; |
71 | |
72 | for_each_possible_cpu(cpu) |
73 | per_cpu(irq_stack_ptr, cpu) = per_cpu(irq_stack, cpu); |
74 | } |
75 | #endif |
76 | |
77 | #ifndef CONFIG_PREEMPT_RT |
78 | static void ____do_softirq(struct pt_regs *regs) |
79 | { |
80 | __do_softirq(); |
81 | } |
82 | |
83 | void do_softirq_own_stack(void) |
84 | { |
85 | call_on_irq_stack(NULL, ____do_softirq); |
86 | } |
87 | #endif |
88 | |
89 | static void default_handle_irq(struct pt_regs *regs) |
90 | { |
91 | panic(fmt: "IRQ taken without a root IRQ handler\n" ); |
92 | } |
93 | |
94 | static void default_handle_fiq(struct pt_regs *regs) |
95 | { |
96 | panic(fmt: "FIQ taken without a root FIQ handler\n" ); |
97 | } |
98 | |
99 | void (*handle_arch_irq)(struct pt_regs *) __ro_after_init = default_handle_irq; |
100 | void (*handle_arch_fiq)(struct pt_regs *) __ro_after_init = default_handle_fiq; |
101 | |
102 | int __init set_handle_irq(void (*handle_irq)(struct pt_regs *)) |
103 | { |
104 | if (handle_arch_irq != default_handle_irq) |
105 | return -EBUSY; |
106 | |
107 | handle_arch_irq = handle_irq; |
108 | pr_info("Root IRQ handler: %ps\n" , handle_irq); |
109 | return 0; |
110 | } |
111 | |
112 | int __init set_handle_fiq(void (*handle_fiq)(struct pt_regs *)) |
113 | { |
114 | if (handle_arch_fiq != default_handle_fiq) |
115 | return -EBUSY; |
116 | |
117 | handle_arch_fiq = handle_fiq; |
118 | pr_info("Root FIQ handler: %ps\n" , handle_fiq); |
119 | return 0; |
120 | } |
121 | |
122 | void __init init_IRQ(void) |
123 | { |
124 | init_irq_stacks(); |
125 | init_irq_scs(); |
126 | irqchip_init(); |
127 | |
128 | if (system_uses_irq_prio_masking()) { |
129 | /* |
130 | * Now that we have a stack for our IRQ handler, set |
131 | * the PMR/PSR pair to a consistent state. |
132 | */ |
133 | WARN_ON(read_sysreg(daif) & PSR_A_BIT); |
134 | local_daif_restore(DAIF_PROCCTX_NOIRQ); |
135 | } |
136 | } |
137 | |