| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
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| 2 | /* |
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| 3 | * Copyright (C) 2020-2022 Loongson Technology Corporation Limited |
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| 4 | */ |
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| 5 | |
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| 6 | #include <linux/export.h> |
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| 7 | #include <asm/alternative-asm.h> |
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| 8 | #include <asm/asm.h> |
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| 9 | #include <asm/asmmacro.h> |
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| 10 | #include <asm/asm-extable.h> |
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| 11 | #include <asm/cpu.h> |
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| 12 | #include <asm/regdef.h> |
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| 13 | #include <asm/unwind_hints.h> |
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| 14 | |
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| 15 | SYM_FUNC_START(__copy_user) |
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| 16 | #ifdef CONFIG_32BIT |
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| 17 | b __copy_user_generic |
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| 18 | #else |
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| 19 | /* |
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| 20 | * Some CPUs support hardware unaligned access |
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| 21 | */ |
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| 22 | ALTERNATIVE "b __copy_user_generic" , \ |
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| 23 | "b __copy_user_fast" , CPU_FEATURE_UAL |
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| 24 | #endif |
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| 25 | SYM_FUNC_END(__copy_user) |
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| 26 | |
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| 27 | EXPORT_SYMBOL(__copy_user) |
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| 28 | |
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| 29 | /* |
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| 30 | * unsigned long __copy_user_generic(void *to, const void *from, size_t n) |
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| 31 | * |
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| 32 | * a0: to |
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| 33 | * a1: from |
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| 34 | * a2: n |
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| 35 | */ |
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| 36 | SYM_FUNC_START(__copy_user_generic) |
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| 37 | beqz a2, 3f |
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| 38 | |
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| 39 | 1: ld.b t0, a1, 0 |
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| 40 | 2: st.b t0, a0, 0 |
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| 41 | PTR_ADDI a0, a0, 1 |
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| 42 | PTR_ADDI a1, a1, 1 |
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| 43 | PTR_ADDI a2, a2, -1 |
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| 44 | bgtz a2, 1b |
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| 45 | |
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| 46 | 3: move a0, a2 |
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| 47 | jr ra |
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| 48 | |
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| 49 | _asm_extable 1b, 3b |
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| 50 | _asm_extable 2b, 3b |
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| 51 | SYM_FUNC_END(__copy_user_generic) |
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| 52 | |
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| 53 | #ifdef CONFIG_64BIT |
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| 54 | /* |
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| 55 | * unsigned long __copy_user_fast(void *to, const void *from, unsigned long n) |
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| 56 | * |
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| 57 | * a0: to |
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| 58 | * a1: from |
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| 59 | * a2: n |
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| 60 | */ |
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| 61 | SYM_FUNC_START(__copy_user_fast) |
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| 62 | sltui t0, a2, 9 |
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| 63 | bnez t0, .Lsmall |
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| 64 | |
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| 65 | 0: ld.d t0, a1, 0 |
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| 66 | 1: st.d t0, a0, 0 |
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| 67 | add.d a3, a1, a2 |
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| 68 | add.d a2, a0, a2 |
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| 69 | |
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| 70 | /* align up destination address */ |
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| 71 | andi t1, a0, 7 |
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| 72 | sub.d t0, zero, t1 |
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| 73 | addi.d t0, t0, 8 |
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| 74 | add.d a1, a1, t0 |
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| 75 | add.d a0, a0, t0 |
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| 76 | |
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| 77 | addi.d a4, a3, -64 |
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| 78 | bgeu a1, a4, .Llt64 |
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| 79 | |
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| 80 | /* copy 64 bytes at a time */ |
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| 81 | .Lloop64: |
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| 82 | 2: ld.d t0, a1, 0 |
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| 83 | 3: ld.d t1, a1, 8 |
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| 84 | 4: ld.d t2, a1, 16 |
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| 85 | 5: ld.d t3, a1, 24 |
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| 86 | 6: ld.d t4, a1, 32 |
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| 87 | 7: ld.d t5, a1, 40 |
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| 88 | 8: ld.d t6, a1, 48 |
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| 89 | 9: ld.d t7, a1, 56 |
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| 90 | 10: st.d t0, a0, 0 |
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| 91 | 11: st.d t1, a0, 8 |
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| 92 | 12: st.d t2, a0, 16 |
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| 93 | 13: st.d t3, a0, 24 |
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| 94 | 14: st.d t4, a0, 32 |
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| 95 | 15: st.d t5, a0, 40 |
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| 96 | 16: st.d t6, a0, 48 |
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| 97 | 17: st.d t7, a0, 56 |
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| 98 | addi.d a1, a1, 64 |
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| 99 | addi.d a0, a0, 64 |
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| 100 | bltu a1, a4, .Lloop64 |
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| 101 | |
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| 102 | /* copy the remaining bytes */ |
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| 103 | .Llt64: |
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| 104 | addi.d a4, a3, -32 |
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| 105 | bgeu a1, a4, .Llt32 |
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| 106 | 18: ld.d t0, a1, 0 |
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| 107 | 19: ld.d t1, a1, 8 |
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| 108 | 20: ld.d t2, a1, 16 |
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| 109 | 21: ld.d t3, a1, 24 |
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| 110 | 22: st.d t0, a0, 0 |
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| 111 | 23: st.d t1, a0, 8 |
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| 112 | 24: st.d t2, a0, 16 |
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| 113 | 25: st.d t3, a0, 24 |
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| 114 | addi.d a1, a1, 32 |
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| 115 | addi.d a0, a0, 32 |
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| 116 | |
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| 117 | .Llt32: |
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| 118 | addi.d a4, a3, -16 |
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| 119 | bgeu a1, a4, .Llt16 |
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| 120 | 26: ld.d t0, a1, 0 |
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| 121 | 27: ld.d t1, a1, 8 |
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| 122 | 28: st.d t0, a0, 0 |
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| 123 | 29: st.d t1, a0, 8 |
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| 124 | addi.d a1, a1, 16 |
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| 125 | addi.d a0, a0, 16 |
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| 126 | |
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| 127 | .Llt16: |
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| 128 | addi.d a4, a3, -8 |
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| 129 | bgeu a1, a4, .Llt8 |
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| 130 | 30: ld.d t0, a1, 0 |
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| 131 | 31: st.d t0, a0, 0 |
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| 132 | addi.d a1, a1, 8 |
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| 133 | addi.d a0, a0, 8 |
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| 134 | |
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| 135 | .Llt8: |
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| 136 | 32: ld.d t0, a3, -8 |
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| 137 | 33: st.d t0, a2, -8 |
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| 138 | |
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| 139 | /* return */ |
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| 140 | move a0, zero |
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| 141 | jr ra |
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| 142 | |
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| 143 | .align 5 |
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| 144 | .Lsmall: |
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| 145 | pcaddi t0, 8 |
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| 146 | slli.d a3, a2, 5 |
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| 147 | add.d t0, t0, a3 |
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| 148 | jr t0 |
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| 149 | |
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| 150 | .align 5 |
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| 151 | move a0, zero |
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| 152 | jr ra |
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| 153 | |
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| 154 | .align 5 |
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| 155 | 34: ld.b t0, a1, 0 |
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| 156 | 35: st.b t0, a0, 0 |
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| 157 | move a0, zero |
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| 158 | jr ra |
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| 159 | |
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| 160 | .align 5 |
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| 161 | 36: ld.h t0, a1, 0 |
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| 162 | 37: st.h t0, a0, 0 |
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| 163 | move a0, zero |
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| 164 | jr ra |
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| 165 | |
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| 166 | .align 5 |
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| 167 | 38: ld.h t0, a1, 0 |
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| 168 | 39: ld.b t1, a1, 2 |
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| 169 | 40: st.h t0, a0, 0 |
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| 170 | 41: st.b t1, a0, 2 |
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| 171 | move a0, zero |
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| 172 | jr ra |
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| 173 | |
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| 174 | .align 5 |
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| 175 | 42: ld.w t0, a1, 0 |
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| 176 | 43: st.w t0, a0, 0 |
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| 177 | move a0, zero |
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| 178 | jr ra |
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| 179 | |
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| 180 | .align 5 |
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| 181 | 44: ld.w t0, a1, 0 |
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| 182 | 45: ld.b t1, a1, 4 |
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| 183 | 46: st.w t0, a0, 0 |
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| 184 | 47: st.b t1, a0, 4 |
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| 185 | move a0, zero |
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| 186 | jr ra |
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| 187 | |
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| 188 | .align 5 |
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| 189 | 48: ld.w t0, a1, 0 |
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| 190 | 49: ld.h t1, a1, 4 |
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| 191 | 50: st.w t0, a0, 0 |
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| 192 | 51: st.h t1, a0, 4 |
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| 193 | move a0, zero |
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| 194 | jr ra |
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| 195 | |
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| 196 | .align 5 |
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| 197 | 52: ld.w t0, a1, 0 |
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| 198 | 53: ld.w t1, a1, 3 |
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| 199 | 54: st.w t0, a0, 0 |
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| 200 | 55: st.w t1, a0, 3 |
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| 201 | move a0, zero |
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| 202 | jr ra |
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| 203 | |
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| 204 | .align 5 |
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| 205 | 56: ld.d t0, a1, 0 |
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| 206 | 57: st.d t0, a0, 0 |
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| 207 | move a0, zero |
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| 208 | jr ra |
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| 209 | |
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| 210 | /* fixup and ex_table */ |
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| 211 | .Llarge_fixup: |
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| 212 | sub.d a2, a2, a0 |
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| 213 | |
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| 214 | .Lsmall_fixup: |
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| 215 | 58: ld.b t0, a1, 0 |
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| 216 | 59: st.b t0, a0, 0 |
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| 217 | addi.d a0, a0, 1 |
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| 218 | addi.d a1, a1, 1 |
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| 219 | addi.d a2, a2, -1 |
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| 220 | bgt a2, zero, 58b |
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| 221 | |
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| 222 | .Lexit: |
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| 223 | move a0, a2 |
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| 224 | jr ra |
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| 225 | |
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| 226 | _asm_extable 0b, .Lsmall_fixup |
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| 227 | _asm_extable 1b, .Lsmall_fixup |
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| 228 | _asm_extable 2b, .Llarge_fixup |
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| 229 | _asm_extable 3b, .Llarge_fixup |
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| 230 | _asm_extable 4b, .Llarge_fixup |
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| 231 | _asm_extable 5b, .Llarge_fixup |
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| 232 | _asm_extable 6b, .Llarge_fixup |
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| 233 | _asm_extable 7b, .Llarge_fixup |
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| 234 | _asm_extable 8b, .Llarge_fixup |
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| 235 | _asm_extable 9b, .Llarge_fixup |
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| 236 | _asm_extable 10b, .Llarge_fixup |
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| 237 | _asm_extable 11b, .Llarge_fixup |
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| 238 | _asm_extable 12b, .Llarge_fixup |
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| 239 | _asm_extable 13b, .Llarge_fixup |
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| 240 | _asm_extable 14b, .Llarge_fixup |
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| 241 | _asm_extable 15b, .Llarge_fixup |
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| 242 | _asm_extable 16b, .Llarge_fixup |
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| 243 | _asm_extable 17b, .Llarge_fixup |
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| 244 | _asm_extable 18b, .Llarge_fixup |
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| 245 | _asm_extable 19b, .Llarge_fixup |
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| 246 | _asm_extable 20b, .Llarge_fixup |
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| 247 | _asm_extable 21b, .Llarge_fixup |
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| 248 | _asm_extable 22b, .Llarge_fixup |
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| 249 | _asm_extable 23b, .Llarge_fixup |
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| 250 | _asm_extable 24b, .Llarge_fixup |
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| 251 | _asm_extable 25b, .Llarge_fixup |
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| 252 | _asm_extable 26b, .Llarge_fixup |
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| 253 | _asm_extable 27b, .Llarge_fixup |
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| 254 | _asm_extable 28b, .Llarge_fixup |
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| 255 | _asm_extable 29b, .Llarge_fixup |
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| 256 | _asm_extable 30b, .Llarge_fixup |
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| 257 | _asm_extable 31b, .Llarge_fixup |
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| 258 | _asm_extable 32b, .Llarge_fixup |
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| 259 | _asm_extable 33b, .Llarge_fixup |
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| 260 | _asm_extable 34b, .Lexit |
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| 261 | _asm_extable 35b, .Lexit |
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| 262 | _asm_extable 36b, .Lsmall_fixup |
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| 263 | _asm_extable 37b, .Lsmall_fixup |
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| 264 | _asm_extable 38b, .Lsmall_fixup |
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| 265 | _asm_extable 39b, .Lsmall_fixup |
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| 266 | _asm_extable 40b, .Lsmall_fixup |
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| 267 | _asm_extable 41b, .Lsmall_fixup |
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| 268 | _asm_extable 42b, .Lsmall_fixup |
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| 269 | _asm_extable 43b, .Lsmall_fixup |
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| 270 | _asm_extable 44b, .Lsmall_fixup |
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| 271 | _asm_extable 45b, .Lsmall_fixup |
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| 272 | _asm_extable 46b, .Lsmall_fixup |
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| 273 | _asm_extable 47b, .Lsmall_fixup |
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| 274 | _asm_extable 48b, .Lsmall_fixup |
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| 275 | _asm_extable 49b, .Lsmall_fixup |
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| 276 | _asm_extable 50b, .Lsmall_fixup |
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| 277 | _asm_extable 51b, .Lsmall_fixup |
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| 278 | _asm_extable 52b, .Lsmall_fixup |
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| 279 | _asm_extable 53b, .Lsmall_fixup |
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| 280 | _asm_extable 54b, .Lsmall_fixup |
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| 281 | _asm_extable 55b, .Lsmall_fixup |
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| 282 | _asm_extable 56b, .Lsmall_fixup |
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| 283 | _asm_extable 57b, .Lsmall_fixup |
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| 284 | _asm_extable 58b, .Lexit |
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| 285 | _asm_extable 59b, .Lexit |
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| 286 | SYM_FUNC_END(__copy_user_fast) |
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| 287 | |
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| 288 | STACK_FRAME_NON_STANDARD __copy_user_fast |
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| 289 | #endif |
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| 290 | |
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