| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
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| 2 | /* |
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| 3 | * Sleep helper for Loongson-3 sleep mode. |
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| 4 | * |
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| 5 | * Author: Huacai Chen <chenhuacai@loongson.cn> |
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| 6 | * Copyright (C) 2020-2022 Loongson Technology Corporation Limited |
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| 7 | */ |
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| 8 | |
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| 9 | #include <asm/asm.h> |
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| 10 | #include <asm/asmmacro.h> |
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| 11 | #include <asm/addrspace.h> |
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| 12 | #include <asm/loongarch.h> |
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| 13 | #include <asm/stackframe.h> |
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| 14 | |
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| 15 | /* preparatory stuff */ |
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| 16 | .macro SETUP_SLEEP |
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| 17 | addi.d sp, sp, -PT_SIZE |
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| 18 | st.d $r1, sp, PT_R1 |
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| 19 | st.d $r2, sp, PT_R2 |
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| 20 | st.d $r3, sp, PT_R3 |
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| 21 | st.d $r4, sp, PT_R4 |
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| 22 | st.d $r21, sp, PT_R21 |
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| 23 | st.d $r22, sp, PT_R22 |
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| 24 | st.d $r23, sp, PT_R23 |
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| 25 | st.d $r24, sp, PT_R24 |
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| 26 | st.d $r25, sp, PT_R25 |
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| 27 | st.d $r26, sp, PT_R26 |
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| 28 | st.d $r27, sp, PT_R27 |
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| 29 | st.d $r28, sp, PT_R28 |
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| 30 | st.d $r29, sp, PT_R29 |
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| 31 | st.d $r30, sp, PT_R30 |
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| 32 | st.d $r31, sp, PT_R31 |
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| 33 | |
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| 34 | la.pcrel t0, acpi_saved_sp |
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| 35 | st.d sp, t0, 0 |
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| 36 | .endm |
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| 37 | |
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| 38 | .macro SETUP_WAKEUP |
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| 39 | ld.d $r1, sp, PT_R1 |
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| 40 | ld.d $r2, sp, PT_R2 |
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| 41 | ld.d $r3, sp, PT_R3 |
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| 42 | ld.d $r4, sp, PT_R4 |
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| 43 | ld.d $r21, sp, PT_R21 |
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| 44 | ld.d $r22, sp, PT_R22 |
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| 45 | ld.d $r23, sp, PT_R23 |
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| 46 | ld.d $r24, sp, PT_R24 |
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| 47 | ld.d $r25, sp, PT_R25 |
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| 48 | ld.d $r26, sp, PT_R26 |
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| 49 | ld.d $r27, sp, PT_R27 |
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| 50 | ld.d $r28, sp, PT_R28 |
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| 51 | ld.d $r29, sp, PT_R29 |
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| 52 | ld.d $r30, sp, PT_R30 |
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| 53 | ld.d $r31, sp, PT_R31 |
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| 54 | .endm |
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| 55 | |
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| 56 | .text |
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| 57 | .align 12 |
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| 58 | |
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| 59 | /* Sleep/wakeup code for Loongson-3 */ |
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| 60 | SYM_FUNC_START(loongarch_suspend_enter) |
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| 61 | SETUP_SLEEP |
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| 62 | bl __flush_cache_all |
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| 63 | |
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| 64 | /* Pass RA and SP to BIOS */ |
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| 65 | addi.d a1, sp, 0 |
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| 66 | la.pcrel a0, loongarch_wakeup_start |
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| 67 | la.pcrel t0, loongarch_suspend_addr |
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| 68 | ld.d t0, t0, 0 |
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| 69 | jirl a0, t0, 0 /* Call BIOS's STR sleep routine */ |
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| 70 | |
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| 71 | /* |
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| 72 | * This is where we return upon wakeup. |
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| 73 | * Reload all of the registers and return. |
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| 74 | */ |
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| 75 | SYM_INNER_LABEL(loongarch_wakeup_start, SYM_L_GLOBAL) |
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| 76 | li.d t0, CSR_DMW0_INIT # UC, PLV0 |
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| 77 | csrwr t0, LOONGARCH_CSR_DMWIN0 |
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| 78 | li.d t0, CSR_DMW1_INIT # CA, PLV0 |
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| 79 | csrwr t0, LOONGARCH_CSR_DMWIN1 |
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| 80 | |
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| 81 | JUMP_VIRT_ADDR t0, t1 |
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| 82 | |
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| 83 | /* Enable PG */ |
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| 84 | li.w t0, 0xb0 # PLV=0, IE=0, PG=1 |
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| 85 | csrwr t0, LOONGARCH_CSR_CRMD |
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| 86 | |
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| 87 | la.pcrel t0, acpi_saved_sp |
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| 88 | ld.d sp, t0, 0 |
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| 89 | SETUP_WAKEUP |
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| 90 | addi.d sp, sp, PT_SIZE |
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| 91 | jr ra |
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| 92 | SYM_FUNC_END(loongarch_suspend_enter) |
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| 93 | |
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