1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
2 | /* |
3 | * OpenRISC vmlinux.lds.S |
4 | * |
5 | * Linux architectural port borrowing liberally from similar works of |
6 | * others. All original copyrights apply as per the original source |
7 | * declaration. |
8 | * |
9 | * Modifications for the OpenRISC architecture: |
10 | * Copyright (C) 2003 Matjaz Breskvar <phoenix@bsemi.com> |
11 | * Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se> |
12 | * |
13 | * ld script for OpenRISC architecture |
14 | */ |
15 | |
16 | /* TODO |
17 | * - clean up __offset & stuff |
18 | * - change all 8192 alignment to PAGE !!! |
19 | * - recheck if all alignments are really needed |
20 | */ |
21 | |
22 | # define LOAD_OFFSET PAGE_OFFSET |
23 | # define LOAD_BASE PAGE_OFFSET |
24 | |
25 | #include <asm/page.h> |
26 | #include <asm/cache.h> |
27 | #include <asm/thread_info.h> |
28 | #include <asm-generic/vmlinux.lds.h> |
29 | |
30 | #ifdef __OR1K__ |
31 | #define __OUTPUT_FORMAT "elf32-or1k" |
32 | #else |
33 | #define __OUTPUT_FORMAT "elf32-or32" |
34 | #endif |
35 | |
36 | OUTPUT_FORMAT(__OUTPUT_FORMAT, __OUTPUT_FORMAT, __OUTPUT_FORMAT) |
37 | jiffies = jiffies_64 + 4; |
38 | |
39 | SECTIONS |
40 | { |
41 | /* Read-only sections, merged into text segment: */ |
42 | . = LOAD_BASE ; |
43 | |
44 | _text = .; |
45 | |
46 | /* _s_kernel_ro must be page aligned */ |
47 | . = ALIGN(PAGE_SIZE); |
48 | _s_kernel_ro = .; |
49 | |
50 | .text : AT(ADDR(.text) - LOAD_OFFSET) |
51 | { |
52 | _stext = .; |
53 | TEXT_TEXT |
54 | SCHED_TEXT |
55 | LOCK_TEXT |
56 | KPROBES_TEXT |
57 | IRQENTRY_TEXT |
58 | SOFTIRQENTRY_TEXT |
59 | *(.fixup) |
60 | *(.text.__*) |
61 | _etext = .; |
62 | } |
63 | /* TODO: Check if fixup and text.__* are really necessary |
64 | * fixup is definitely necessary |
65 | */ |
66 | |
67 | _sdata = .; |
68 | |
69 | /* Page alignment required for RO_DATA */ |
70 | RO_DATA(PAGE_SIZE) |
71 | _e_kernel_ro = .; |
72 | |
73 | /* Whatever comes after _e_kernel_ro had better be page-aligend, too */ |
74 | |
75 | /* 32 here is cacheline size... recheck this */ |
76 | RW_DATA(32, PAGE_SIZE, PAGE_SIZE) |
77 | |
78 | _edata = .; |
79 | |
80 | EXCEPTION_TABLE(4) |
81 | |
82 | /* Init code and data */ |
83 | . = ALIGN(PAGE_SIZE); |
84 | __init_begin = .; |
85 | |
86 | HEAD_TEXT_SECTION |
87 | |
88 | /* Page aligned */ |
89 | INIT_TEXT_SECTION(PAGE_SIZE) |
90 | |
91 | /* Align __setup_start on 16 byte boundary */ |
92 | INIT_DATA_SECTION(16) |
93 | |
94 | PERCPU_SECTION(L1_CACHE_BYTES) |
95 | |
96 | __init_end = .; |
97 | |
98 | BSS_SECTION(0, 0, 0x20) |
99 | |
100 | _end = .; |
101 | |
102 | /* Throw in the debugging sections */ |
103 | STABS_DEBUG |
104 | DWARF_DEBUG |
105 | ELF_DETAILS |
106 | |
107 | /* Sections to be discarded -- must be last */ |
108 | DISCARDS |
109 | } |
110 | |