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| 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
|---|---|
| 2 | /* |
| 3 | * Common time prototypes and such for all ppc machines. |
| 4 | * |
| 5 | * Written by Cort Dougan (cort@cs.nmt.edu) to merge |
| 6 | * Paul Mackerras' version and mine for PReP and Pmac. |
| 7 | */ |
| 8 | |
| 9 | #ifndef __POWERPC_TIME_H |
| 10 | #define __POWERPC_TIME_H |
| 11 | |
| 12 | #ifdef __KERNEL__ |
| 13 | #include <linux/types.h> |
| 14 | #include <linux/percpu.h> |
| 15 | |
| 16 | #include <asm/processor.h> |
| 17 | #include <asm/cpu_has_feature.h> |
| 18 | #include <asm/vdso/timebase.h> |
| 19 | |
| 20 | /* time.c */ |
| 21 | extern u64 decrementer_max; |
| 22 | |
| 23 | extern unsigned long tb_ticks_per_jiffy; |
| 24 | extern unsigned long tb_ticks_per_usec; |
| 25 | extern unsigned long tb_ticks_per_sec; |
| 26 | extern struct clock_event_device decrementer_clockevent; |
| 27 | extern u64 decrementer_max; |
| 28 | |
| 29 | |
| 30 | extern void generic_calibrate_decr(void); |
| 31 | |
| 32 | #ifdef CONFIG_PPC_SPLPAR |
| 33 | extern u64 get_boot_tb(void); |
| 34 | #endif |
| 35 | |
| 36 | /* Some sane defaults: 125 MHz timebase, 1GHz processor */ |
| 37 | extern unsigned long ppc_proc_freq; |
| 38 | #define DEFAULT_PROC_FREQ (DEFAULT_TB_FREQ * 8) |
| 39 | extern unsigned long ppc_tb_freq; |
| 40 | #define DEFAULT_TB_FREQ 125000000UL |
| 41 | |
| 42 | extern bool tb_invalid; |
| 43 | |
| 44 | struct div_result { |
| 45 | u64 result_high; |
| 46 | u64 result_low; |
| 47 | }; |
| 48 | |
| 49 | static inline u64 get_vtb(void) |
| 50 | { |
| 51 | if (cpu_has_feature(CPU_FTR_ARCH_207S)) |
| 52 | return mfspr(SPRN_VTB); |
| 53 | |
| 54 | return 0; |
| 55 | } |
| 56 | |
| 57 | /* Accessor functions for the decrementer register. |
| 58 | * The 4xx doesn't even have a decrementer. I tried to use the |
| 59 | * generic timer interrupt code, which seems OK, with the 4xx PIT |
| 60 | * in auto-reload mode. The problem is PIT stops counting when it |
| 61 | * hits zero. If it would wrap, we could use it just like a decrementer. |
| 62 | */ |
| 63 | static inline u64 get_dec(void) |
| 64 | { |
| 65 | return mfspr(SPRN_DEC); |
| 66 | } |
| 67 | |
| 68 | /* |
| 69 | * Note: Book E and 4xx processors differ from other PowerPC processors |
| 70 | * in when the decrementer generates its interrupt: on the 1 to 0 |
| 71 | * transition for Book E/4xx, but on the 0 to -1 transition for others. |
| 72 | */ |
| 73 | static inline void set_dec(u64 val) |
| 74 | { |
| 75 | if (IS_ENABLED(CONFIG_BOOKE)) |
| 76 | mtspr(SPRN_DEC, val); |
| 77 | else |
| 78 | mtspr(SPRN_DEC, val - 1); |
| 79 | } |
| 80 | |
| 81 | static inline unsigned long tb_ticks_since(unsigned long tstamp) |
| 82 | { |
| 83 | return mftb() - tstamp; |
| 84 | } |
| 85 | |
| 86 | #define mulhwu(x,y) \ |
| 87 | ({unsigned z; asm ("mulhwu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;}) |
| 88 | |
| 89 | #ifdef CONFIG_PPC64 |
| 90 | #define mulhdu(x,y) \ |
| 91 | ({unsigned long z; asm ("mulhdu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;}) |
| 92 | #else |
| 93 | #define mulhdu(x, y) mul_u64_u64_shr(x, y, 64) |
| 94 | #endif |
| 95 | |
| 96 | extern void secondary_cpu_time_init(void); |
| 97 | extern void __init time_init(void); |
| 98 | |
| 99 | DECLARE_PER_CPU(u64, decrementers_next_tb); |
| 100 | |
| 101 | static inline u64 timer_get_next_tb(void) |
| 102 | { |
| 103 | return __this_cpu_read(decrementers_next_tb); |
| 104 | } |
| 105 | |
| 106 | #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE |
| 107 | void timer_rearm_host_dec(u64 now); |
| 108 | #endif |
| 109 | |
| 110 | /* Convert timebase ticks to nanoseconds */ |
| 111 | unsigned long long tb_to_ns(unsigned long long tb_ticks); |
| 112 | |
| 113 | void timer_broadcast_interrupt(void); |
| 114 | |
| 115 | /* SPLPAR and VIRT_CPU_ACCOUNTING_NATIVE */ |
| 116 | void pseries_accumulate_stolen_time(void); |
| 117 | u64 pseries_calculate_stolen_time(u64 stop_tb); |
| 118 | |
| 119 | #endif /* __KERNEL__ */ |
| 120 | #endif /* __POWERPC_TIME_H */ |
| 121 |
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