| 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
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| 2 | /* |
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| 3 | * Copyright (C) 2012 Freescale Semiconductor, Inc. |
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| 4 | */ |
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| 5 | |
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| 6 | #include <linux/export.h> |
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| 7 | #include <linux/threads.h> |
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| 8 | #include <asm/epapr_hcalls.h> |
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| 9 | #include <asm/reg.h> |
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| 10 | #include <asm/page.h> |
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| 11 | #include <asm/cputable.h> |
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| 12 | #include <asm/thread_info.h> |
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| 13 | #include <asm/ppc_asm.h> |
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| 14 | #include <asm/asm-compat.h> |
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| 15 | #include <asm/asm-offsets.h> |
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| 16 | |
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| 17 | #ifndef CONFIG_PPC64 |
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| 18 | /* epapr_ev_idle() was derived from e500_idle() */ |
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| 19 | _GLOBAL(epapr_ev_idle) |
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| 20 | PPC_LL r4, TI_LOCAL_FLAGS(r2) /* set napping bit */ |
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| 21 | ori r4, r4,_TLF_NAPPING /* so when we take an exception */ |
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| 22 | PPC_STL r4, TI_LOCAL_FLAGS(r2) /* it will return to our caller */ |
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| 23 | |
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| 24 | #ifdef CONFIG_BOOKE_OR_40x |
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| 25 | wrteei 1 |
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| 26 | #else |
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| 27 | mfmsr r4 |
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| 28 | ori r4, r4, MSR_EE |
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| 29 | mtmsr r4 |
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| 30 | #endif |
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| 31 | |
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| 32 | idle_loop: |
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| 33 | LOAD_REG_IMMEDIATE(r11, EV_HCALL_TOKEN(EV_IDLE)) |
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| 34 | |
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| 35 | .global epapr_ev_idle_start |
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| 36 | epapr_ev_idle_start: |
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| 37 | li r3, -1 |
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| 38 | nop |
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| 39 | nop |
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| 40 | nop |
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| 41 | |
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| 42 | /* |
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| 43 | * Guard against spurious wakeups from a hypervisor -- |
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| 44 | * only interrupt will cause us to return to LR due to |
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| 45 | * _TLF_NAPPING. |
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| 46 | */ |
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| 47 | b idle_loop |
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| 48 | #endif |
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| 49 | |
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| 50 | /* Hypercall entry point. Will be patched with device tree instructions. */ |
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| 51 | .global epapr_hypercall_start |
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| 52 | epapr_hypercall_start: |
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| 53 | li r3, -1 |
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| 54 | nop |
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| 55 | nop |
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| 56 | nop |
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| 57 | blr |
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| 58 | EXPORT_SYMBOL(epapr_hypercall_start) |
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| 59 | |
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