| 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
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| 2 | /* |
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| 3 | * PowerPC version |
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| 4 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) |
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| 5 | * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP |
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| 6 | * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu> |
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| 7 | * Adapted for Power Macintosh by Paul Mackerras. |
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| 8 | * Low-level exception handlers and MMU support |
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| 9 | * rewritten by Paul Mackerras. |
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| 10 | * Copyright (C) 1996 Paul Mackerras. |
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| 11 | * MPC8xx modifications Copyright (C) 1997 Dan Malek (dmalek@jlc.net). |
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| 12 | * |
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| 13 | * This file contains the 64-bit prom entry code. |
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| 14 | */ |
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| 15 | #include <asm/asm-offsets.h> |
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| 16 | #ifdef CONFIG_PPC_BOOK3S |
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| 17 | #include <asm/exception-64s.h> |
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| 18 | #else |
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| 19 | #include <asm/exception-64e.h> |
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| 20 | #endif |
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| 21 | #include <asm/ppc_asm.h> |
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| 22 | |
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| 23 | .section ".text" ,"ax" ,@progbits |
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| 24 | |
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| 25 | _GLOBAL(enter_prom) |
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| 26 | mflr r0 |
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| 27 | std r0,16(r1) |
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| 28 | stdu r1,-SWITCH_FRAME_SIZE(r1) /* Save SP and create stack space */ |
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| 29 | |
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| 30 | /* Because PROM is running in 32b mode, it clobbers the high order half |
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| 31 | * of all registers that it saves. We therefore save those registers |
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| 32 | * PROM might touch to the stack. (r0, r3-r13 are caller saved) |
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| 33 | */ |
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| 34 | SAVE_GPR(2, r1) |
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| 35 | SAVE_GPR(13, r1) |
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| 36 | SAVE_NVGPRS(r1) |
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| 37 | mfcr r10 |
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| 38 | mfmsr r11 |
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| 39 | std r10,_CCR(r1) |
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| 40 | std r11,_MSR(r1) |
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| 41 | |
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| 42 | /* Put PROM address in SRR0 */ |
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| 43 | mtsrr0 r4 |
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| 44 | |
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| 45 | /* Setup our trampoline return addr in LR */ |
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| 46 | bcl 20,31,$+4 |
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| 47 | 0: mflr r4 |
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| 48 | addi r4,r4,(1f - 0b) |
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| 49 | mtlr r4 |
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| 50 | |
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| 51 | /* Prepare a 32-bit mode big endian MSR |
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| 52 | */ |
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| 53 | #ifdef CONFIG_PPC_BOOK3E_64 |
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| 54 | rlwinm r11,r11,0,1,31 |
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| 55 | mtsrr1 r11 |
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| 56 | rfi |
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| 57 | #else /* CONFIG_PPC_BOOK3E_64 */ |
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| 58 | LOAD_REG_IMMEDIATE(r12, MSR_SF | MSR_LE) |
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| 59 | andc r11,r11,r12 |
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| 60 | mtsrr1 r11 |
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| 61 | RFI_TO_KERNEL |
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| 62 | #endif /* CONFIG_PPC_BOOK3E_64 */ |
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| 63 | |
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| 64 | 1: /* Return from OF */ |
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| 65 | FIXUP_ENDIAN |
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| 66 | |
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| 67 | /* Just make sure that r1 top 32 bits didn't get |
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| 68 | * corrupt by OF |
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| 69 | */ |
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| 70 | rldicl r1,r1,0,32 |
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| 71 | |
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| 72 | /* Restore the MSR (back to 64 bits) */ |
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| 73 | ld r0,_MSR(r1) |
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| 74 | MTMSRD(r0) |
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| 75 | isync |
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| 76 | |
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| 77 | /* Restore other registers */ |
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| 78 | REST_GPR(2, r1) |
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| 79 | REST_GPR(13, r1) |
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| 80 | REST_NVGPRS(r1) |
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| 81 | ld r4,_CCR(r1) |
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| 82 | mtcr r4 |
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| 83 | |
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| 84 | addi r1,r1,SWITCH_FRAME_SIZE |
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| 85 | ld r0,16(r1) |
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| 86 | mtlr r0 |
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| 87 | blr |
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| 88 | |
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