| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
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| 2 | /* |
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| 3 | * |
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| 4 | * Copyright SUSE Linux Products GmbH 2009 |
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| 5 | * |
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| 6 | * Authors: Alexander Graf <agraf@suse.de> |
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| 7 | */ |
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| 8 | |
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| 9 | #include <asm/asm-compat.h> |
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| 10 | #include <asm/feature-fixups.h> |
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| 11 | |
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| 12 | #define SHADOW_SLB_ENTRY_LEN 0x10 |
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| 13 | #define OFFSET_ESID(x) (SHADOW_SLB_ENTRY_LEN * x) |
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| 14 | #define OFFSET_VSID(x) ((SHADOW_SLB_ENTRY_LEN * x) + 8) |
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| 15 | |
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| 16 | /****************************************************************************** |
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| 17 | * * |
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| 18 | * Entry code * |
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| 19 | * * |
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| 20 | *****************************************************************************/ |
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| 21 | |
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| 22 | .macro LOAD_GUEST_SEGMENTS |
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| 23 | |
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| 24 | /* Required state: |
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| 25 | * |
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| 26 | * MSR = ~IR|DR |
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| 27 | * R13 = PACA |
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| 28 | * R1 = host R1 |
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| 29 | * R2 = host R2 |
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| 30 | * R3 = shadow vcpu |
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| 31 | * all other volatile GPRS = free except R4, R6 |
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| 32 | * SVCPU[CR] = guest CR |
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| 33 | * SVCPU[XER] = guest XER |
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| 34 | * SVCPU[CTR] = guest CTR |
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| 35 | * SVCPU[LR] = guest LR |
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| 36 | */ |
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| 37 | |
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| 38 | BEGIN_FW_FTR_SECTION |
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| 39 | |
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| 40 | /* Declare SLB shadow as 0 entries big */ |
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| 41 | |
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| 42 | ld r11, PACA_SLBSHADOWPTR(r13) |
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| 43 | li r8, 0 |
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| 44 | stb r8, 3(r11) |
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| 45 | |
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| 46 | END_FW_FTR_SECTION_IFSET(FW_FEATURE_LPAR) |
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| 47 | |
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| 48 | /* Flush SLB */ |
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| 49 | |
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| 50 | li r10, 0 |
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| 51 | slbmte r10, r10 |
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| 52 | slbia |
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| 53 | |
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| 54 | /* Fill SLB with our shadow */ |
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| 55 | |
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| 56 | lbz r12, SVCPU_SLB_MAX(r3) |
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| 57 | mulli r12, r12, 16 |
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| 58 | addi r12, r12, SVCPU_SLB |
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| 59 | add r12, r12, r3 |
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| 60 | |
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| 61 | /* for (r11 = kvm_slb; r11 < kvm_slb + kvm_slb_size; r11+=slb_entry) */ |
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| 62 | li r11, SVCPU_SLB |
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| 63 | add r11, r11, r3 |
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| 64 | |
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| 65 | slb_loop_enter: |
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| 66 | |
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| 67 | ld r10, 0(r11) |
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| 68 | |
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| 69 | andis. r9, r10, SLB_ESID_V@h |
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| 70 | beq slb_loop_enter_skip |
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| 71 | |
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| 72 | ld r9, 8(r11) |
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| 73 | slbmte r9, r10 |
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| 74 | |
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| 75 | slb_loop_enter_skip: |
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| 76 | addi r11, r11, 16 |
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| 77 | cmpd cr0, r11, r12 |
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| 78 | blt slb_loop_enter |
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| 79 | |
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| 80 | slb_do_enter: |
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| 81 | |
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| 82 | .endm |
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| 83 | |
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| 84 | /****************************************************************************** |
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| 85 | * * |
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| 86 | * Exit code * |
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| 87 | * * |
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| 88 | *****************************************************************************/ |
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| 89 | |
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| 90 | .macro LOAD_HOST_SEGMENTS |
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| 91 | |
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| 92 | /* Register usage at this point: |
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| 93 | * |
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| 94 | * R1 = host R1 |
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| 95 | * R2 = host R2 |
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| 96 | * R12 = exit handler id |
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| 97 | * R13 = shadow vcpu - SHADOW_VCPU_OFF [=PACA on PPC64] |
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| 98 | * SVCPU.* = guest * |
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| 99 | * SVCPU[CR] = guest CR |
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| 100 | * SVCPU[XER] = guest XER |
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| 101 | * SVCPU[CTR] = guest CTR |
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| 102 | * SVCPU[LR] = guest LR |
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| 103 | * |
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| 104 | */ |
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| 105 | |
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| 106 | /* Remove all SLB entries that are in use. */ |
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| 107 | |
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| 108 | li r0, 0 |
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| 109 | slbmte r0, r0 |
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| 110 | slbia |
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| 111 | |
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| 112 | /* Restore bolted entries from the shadow */ |
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| 113 | |
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| 114 | ld r11, PACA_SLBSHADOWPTR(r13) |
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| 115 | |
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| 116 | BEGIN_FW_FTR_SECTION |
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| 117 | |
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| 118 | /* Declare SLB shadow as SLB_NUM_BOLTED entries big */ |
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| 119 | |
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| 120 | li r8, SLB_NUM_BOLTED |
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| 121 | stb r8, 3(r11) |
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| 122 | |
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| 123 | END_FW_FTR_SECTION_IFSET(FW_FEATURE_LPAR) |
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| 124 | |
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| 125 | /* Manually load all entries from shadow SLB */ |
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| 126 | |
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| 127 | li r8, SLBSHADOW_SAVEAREA |
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| 128 | li r7, SLBSHADOW_SAVEAREA + 8 |
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| 129 | |
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| 130 | .rept SLB_NUM_BOLTED |
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| 131 | LDX_BE r10, r11, r8 |
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| 132 | cmpdi r10, 0 |
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| 133 | beq 1f |
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| 134 | LDX_BE r9, r11, r7 |
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| 135 | slbmte r9, r10 |
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| 136 | 1: addi r7, r7, SHADOW_SLB_ENTRY_LEN |
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| 137 | addi r8, r8, SHADOW_SLB_ENTRY_LEN |
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| 138 | .endr |
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| 139 | |
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| 140 | isync |
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| 141 | sync |
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| 142 | |
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| 143 | slb_do_exit: |
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| 144 | |
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| 145 | .endm |
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| 146 | |
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