| 1 | /* |
| 2 | * Efika 5K2 platform code |
| 3 | * Some code really inspired from the lite5200b platform. |
| 4 | * |
| 5 | * Copyright (C) 2006 bplan GmbH |
| 6 | * |
| 7 | * This file is licensed under the terms of the GNU General Public License |
| 8 | * version 2. This program is licensed "as is" without any warranty of any |
| 9 | * kind, whether express or implied. |
| 10 | */ |
| 11 | |
| 12 | #include <linux/init.h> |
| 13 | #include <generated/utsrelease.h> |
| 14 | #include <linux/pci.h> |
| 15 | #include <linux/of.h> |
| 16 | #include <linux/seq_file.h> |
| 17 | #include <asm/dma.h> |
| 18 | #include <asm/time.h> |
| 19 | #include <asm/machdep.h> |
| 20 | #include <asm/rtas.h> |
| 21 | #include <asm/mpc52xx.h> |
| 22 | |
| 23 | #define EFIKA_PLATFORM_NAME "Efika" |
| 24 | |
| 25 | |
| 26 | /* ------------------------------------------------------------------------ */ |
| 27 | /* PCI accesses thru RTAS */ |
| 28 | /* ------------------------------------------------------------------------ */ |
| 29 | |
| 30 | #ifdef CONFIG_PCI |
| 31 | |
| 32 | /* |
| 33 | * Access functions for PCI config space using RTAS calls. |
| 34 | */ |
| 35 | static int rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset, |
| 36 | int len, u32 * val) |
| 37 | { |
| 38 | struct pci_controller *hose = pci_bus_to_host(bus); |
| 39 | unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8) |
| 40 | | (((bus->number - hose->first_busno) & 0xff) << 16) |
| 41 | | (hose->global_number << 24); |
| 42 | int ret = -1; |
| 43 | int rval; |
| 44 | |
| 45 | rval = rtas_call(rtas_function_token(RTAS_FN_READ_PCI_CONFIG), 2, 2, &ret, addr, len); |
| 46 | *val = ret; |
| 47 | return rval ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL; |
| 48 | } |
| 49 | |
| 50 | static int rtas_write_config(struct pci_bus *bus, unsigned int devfn, |
| 51 | int offset, int len, u32 val) |
| 52 | { |
| 53 | struct pci_controller *hose = pci_bus_to_host(bus); |
| 54 | unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8) |
| 55 | | (((bus->number - hose->first_busno) & 0xff) << 16) |
| 56 | | (hose->global_number << 24); |
| 57 | int rval; |
| 58 | |
| 59 | rval = rtas_call(rtas_function_token(RTAS_FN_WRITE_PCI_CONFIG), 3, 1, NULL, |
| 60 | addr, len, val); |
| 61 | return rval ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL; |
| 62 | } |
| 63 | |
| 64 | static struct pci_ops rtas_pci_ops = { |
| 65 | .read = rtas_read_config, |
| 66 | .write = rtas_write_config, |
| 67 | }; |
| 68 | |
| 69 | |
| 70 | static void __init efika_pcisetup(void) |
| 71 | { |
| 72 | const int *bus_range; |
| 73 | int len; |
| 74 | struct pci_controller *hose; |
| 75 | struct device_node *root; |
| 76 | struct device_node *pcictrl; |
| 77 | |
| 78 | root = of_find_node_by_path(path: "/" ); |
| 79 | if (root == NULL) { |
| 80 | printk(KERN_WARNING EFIKA_PLATFORM_NAME |
| 81 | ": Unable to find the root node\n" ); |
| 82 | return; |
| 83 | } |
| 84 | |
| 85 | for_each_child_of_node(root, pcictrl) |
| 86 | if (of_node_name_eq(np: pcictrl, name: "pci" )) |
| 87 | break; |
| 88 | |
| 89 | of_node_put(node: root); |
| 90 | |
| 91 | if (pcictrl == NULL) { |
| 92 | printk(KERN_WARNING EFIKA_PLATFORM_NAME |
| 93 | ": Unable to find the PCI bridge node\n" ); |
| 94 | return; |
| 95 | } |
| 96 | |
| 97 | bus_range = of_get_property(node: pcictrl, name: "bus-range" , lenp: &len); |
| 98 | if (bus_range == NULL || len < 2 * sizeof(int)) { |
| 99 | printk(KERN_WARNING EFIKA_PLATFORM_NAME |
| 100 | ": Can't get bus-range for %pOF\n" , pcictrl); |
| 101 | goto out_put; |
| 102 | } |
| 103 | |
| 104 | if (bus_range[1] == bus_range[0]) |
| 105 | printk(KERN_INFO EFIKA_PLATFORM_NAME ": PCI bus %d" , |
| 106 | bus_range[0]); |
| 107 | else |
| 108 | printk(KERN_INFO EFIKA_PLATFORM_NAME ": PCI buses %d..%d" , |
| 109 | bus_range[0], bus_range[1]); |
| 110 | printk(" controlled by %pOF\n" , pcictrl); |
| 111 | printk("\n" ); |
| 112 | |
| 113 | hose = pcibios_alloc_controller(pcictrl); |
| 114 | if (!hose) { |
| 115 | printk(KERN_WARNING EFIKA_PLATFORM_NAME |
| 116 | ": Can't allocate PCI controller structure for %pOF\n" , |
| 117 | pcictrl); |
| 118 | goto out_put; |
| 119 | } |
| 120 | |
| 121 | hose->first_busno = bus_range[0]; |
| 122 | hose->last_busno = bus_range[1]; |
| 123 | hose->ops = &rtas_pci_ops; |
| 124 | |
| 125 | pci_process_bridge_OF_ranges(hose, pcictrl, 0); |
| 126 | return; |
| 127 | out_put: |
| 128 | of_node_put(node: pcictrl); |
| 129 | } |
| 130 | |
| 131 | #else |
| 132 | static void __init efika_pcisetup(void) |
| 133 | {} |
| 134 | #endif |
| 135 | |
| 136 | |
| 137 | |
| 138 | /* ------------------------------------------------------------------------ */ |
| 139 | /* Platform setup */ |
| 140 | /* ------------------------------------------------------------------------ */ |
| 141 | |
| 142 | static void efika_show_cpuinfo(struct seq_file *m) |
| 143 | { |
| 144 | struct device_node *root; |
| 145 | const char *revision; |
| 146 | const char *codegendescription; |
| 147 | const char *codegenvendor; |
| 148 | |
| 149 | root = of_find_node_by_path(path: "/" ); |
| 150 | if (!root) |
| 151 | return; |
| 152 | |
| 153 | revision = of_get_property(node: root, name: "revision" , NULL); |
| 154 | codegendescription = of_get_property(node: root, name: "CODEGEN,description" , NULL); |
| 155 | codegenvendor = of_get_property(node: root, name: "CODEGEN,vendor" , NULL); |
| 156 | |
| 157 | if (codegendescription) |
| 158 | seq_printf(m, fmt: "machine\t\t: %s\n" , codegendescription); |
| 159 | else |
| 160 | seq_printf(m, fmt: "machine\t\t: Efika\n" ); |
| 161 | |
| 162 | if (revision) |
| 163 | seq_printf(m, fmt: "revision\t: %s\n" , revision); |
| 164 | |
| 165 | if (codegenvendor) |
| 166 | seq_printf(m, fmt: "vendor\t\t: %s\n" , codegenvendor); |
| 167 | |
| 168 | of_node_put(node: root); |
| 169 | } |
| 170 | |
| 171 | #ifdef CONFIG_PM |
| 172 | static void efika_suspend_prepare(void __iomem *mbar) |
| 173 | { |
| 174 | u8 pin = 4; /* GPIO_WKUP_4 (GPIO_PSC6_0 - IRDA_RX) */ |
| 175 | u8 level = 1; /* wakeup on high level */ |
| 176 | /* IOW. to wake it up, short pins 1 and 3 on IRDA connector */ |
| 177 | mpc52xx_set_wakeup_gpio(pin, level); |
| 178 | } |
| 179 | #endif |
| 180 | |
| 181 | static void __init efika_setup_arch(void) |
| 182 | { |
| 183 | rtas_initialize(); |
| 184 | |
| 185 | /* Map important registers from the internal memory map */ |
| 186 | mpc52xx_map_common_devices(); |
| 187 | |
| 188 | #ifdef CONFIG_PM |
| 189 | mpc52xx_suspend.board_suspend_prepare = efika_suspend_prepare; |
| 190 | mpc52xx_pm_init(); |
| 191 | #endif |
| 192 | |
| 193 | if (ppc_md.progress) |
| 194 | ppc_md.progress("Linux/PPC " UTS_RELEASE " running on Efika ;-)\n" , 0x0); |
| 195 | } |
| 196 | |
| 197 | static int __init efika_probe(void) |
| 198 | { |
| 199 | struct device_node *root = of_find_node_by_path(path: "/" ); |
| 200 | const char *model = of_get_property(node: root, name: "model" , NULL); |
| 201 | |
| 202 | of_node_put(node: root); |
| 203 | if (model == NULL) |
| 204 | return 0; |
| 205 | if (strcmp(model, "EFIKA5K2" )) |
| 206 | return 0; |
| 207 | |
| 208 | DMA_MODE_READ = 0x44; |
| 209 | DMA_MODE_WRITE = 0x48; |
| 210 | |
| 211 | pm_power_off = rtas_power_off; |
| 212 | |
| 213 | return 1; |
| 214 | } |
| 215 | |
| 216 | define_machine(efika) |
| 217 | { |
| 218 | .name = EFIKA_PLATFORM_NAME, |
| 219 | .probe = efika_probe, |
| 220 | .setup_arch = efika_setup_arch, |
| 221 | .discover_phbs = efika_pcisetup, |
| 222 | .init = mpc52xx_declare_of_platform_devices, |
| 223 | .show_cpuinfo = efika_show_cpuinfo, |
| 224 | .init_IRQ = mpc52xx_init_irq, |
| 225 | .get_irq = mpc52xx_get_irq, |
| 226 | .restart = rtas_restart, |
| 227 | .halt = rtas_halt, |
| 228 | .set_rtc_time = rtas_set_rtc_time, |
| 229 | .get_rtc_time = rtas_get_rtc_time, |
| 230 | .progress = rtas_progress, |
| 231 | .get_boot_time = rtas_get_boot_time, |
| 232 | #ifdef CONFIG_PCI |
| 233 | .phys_mem_access_prot = pci_phys_mem_access_prot, |
| 234 | #endif |
| 235 | }; |
| 236 | |
| 237 | |