| 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
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| 2 | /* |
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| 3 | * crt0_r.S: Entry function for SPU-side context restore. |
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| 4 | * |
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| 5 | * Copyright (C) 2005 IBM |
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| 6 | * |
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| 7 | * Entry and exit function for SPU-side of the context restore |
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| 8 | * sequence. Sets up an initial stack frame, then branches to |
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| 9 | * 'main'. On return, restores all 128 registers from the LSCSA |
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| 10 | * and exits. |
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| 11 | */ |
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| 12 | |
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| 13 | #include <asm/spu_csa.h> |
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| 14 | |
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| 15 | .data |
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| 16 | .align 7 |
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| 17 | .globl regs_spill |
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| 18 | regs_spill: |
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| 19 | .space SIZEOF_SPU_SPILL_REGS, 0x0 |
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| 20 | |
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| 21 | .text |
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| 22 | .global _start |
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| 23 | _start: |
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| 24 | /* Initialize the stack pointer to point to 16368 |
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| 25 | * (16kb-16). The back chain pointer is initialized |
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| 26 | * to NULL. |
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| 27 | */ |
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| 28 | il $0, 0 |
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| 29 | il $SP, 16368 |
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| 30 | stqd $0, 0($SP) |
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| 31 | |
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| 32 | /* Allocate a minimum stack frame for the called main. |
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| 33 | * This is needed so that main has a place to save the |
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| 34 | * link register when it calls another function. |
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| 35 | */ |
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| 36 | stqd $SP, -160($SP) |
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| 37 | ai $SP, $SP, -160 |
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| 38 | |
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| 39 | /* Call the program's main function. */ |
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| 40 | brsl $0, main |
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| 41 | |
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| 42 | .global exit |
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| 43 | .global _exit |
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| 44 | exit: |
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| 45 | _exit: |
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| 46 | /* SPU Context Restore, Step 5: Restore the remaining 112 GPRs. */ |
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| 47 | ila $3, regs_spill + 256 |
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| 48 | restore_regs: |
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| 49 | lqr $4, restore_reg_insts |
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| 50 | restore_reg_loop: |
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| 51 | ai $4, $4, 4 |
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| 52 | .balignl 16, 0x40200000 |
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| 53 | restore_reg_insts: /* must be quad-word aligned. */ |
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| 54 | lqd $16, 0($3) |
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| 55 | lqd $17, 16($3) |
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| 56 | lqd $18, 32($3) |
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| 57 | lqd $19, 48($3) |
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| 58 | andi $5, $4, 0x7F |
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| 59 | stqr $4, restore_reg_insts |
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| 60 | ai $3, $3, 64 |
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| 61 | brnz $5, restore_reg_loop |
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| 62 | |
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| 63 | /* SPU Context Restore Step 17: Restore the first 16 GPRs. */ |
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| 64 | lqa $0, regs_spill + 0 |
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| 65 | lqa $1, regs_spill + 16 |
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| 66 | lqa $2, regs_spill + 32 |
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| 67 | lqa $3, regs_spill + 48 |
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| 68 | lqa $4, regs_spill + 64 |
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| 69 | lqa $5, regs_spill + 80 |
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| 70 | lqa $6, regs_spill + 96 |
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| 71 | lqa $7, regs_spill + 112 |
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| 72 | lqa $8, regs_spill + 128 |
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| 73 | lqa $9, regs_spill + 144 |
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| 74 | lqa $10, regs_spill + 160 |
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| 75 | lqa $11, regs_spill + 176 |
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| 76 | lqa $12, regs_spill + 192 |
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| 77 | lqa $13, regs_spill + 208 |
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| 78 | lqa $14, regs_spill + 224 |
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| 79 | lqa $15, regs_spill + 240 |
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| 80 | |
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| 81 | /* Under normal circumstances, the 'exit' function |
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| 82 | * terminates with 'stop SPU_RESTORE_COMPLETE', |
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| 83 | * indicating that the SPU-side restore code has |
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| 84 | * completed. |
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| 85 | * |
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| 86 | * However it is possible that instructions immediately |
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| 87 | * following the 'stop 0x3ffc' have been modified at run |
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| 88 | * time so as to recreate the exact SPU_Status settings |
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| 89 | * from the application, e.g. illegal instruciton, halt, |
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| 90 | * etc. |
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| 91 | */ |
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| 92 | .global exit_fini |
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| 93 | .global _exit_fini |
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| 94 | exit_fini: |
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| 95 | _exit_fini: |
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| 96 | stop SPU_RESTORE_COMPLETE |
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| 97 | stop 0 |
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| 98 | stop 0 |
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| 99 | stop 0 |
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| 100 | |
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| 101 | /* Pad the size of this crt0.o to be multiple of 16 bytes. */ |
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| 102 | .balignl 16, 0x0 |
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| 103 | |
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