1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (c) 2021 Western Digital Corporation or its affiliates.
4 * Copyright (c) 2022 Ventana Micro Systems Inc.
5 */
6
7#define pr_fmt(fmt) "suspend: " fmt
8
9#include <linux/ftrace.h>
10#include <linux/suspend.h>
11#include <asm/csr.h>
12#include <asm/sbi.h>
13#include <asm/suspend.h>
14
15void suspend_save_csrs(struct suspend_context *context)
16{
17 if (riscv_has_extension_unlikely(RISCV_ISA_EXT_XLINUXENVCFG))
18 context->envcfg = csr_read(CSR_ENVCFG);
19 context->tvec = csr_read(CSR_TVEC);
20 context->ie = csr_read(CSR_IE);
21
22 /*
23 * No need to save/restore IP CSR (i.e. MIP or SIP) because:
24 *
25 * 1. For no-MMU (M-mode) kernel, the bits in MIP are set by
26 * external devices (such as interrupt controller, timer, etc).
27 * 2. For MMU (S-mode) kernel, the bits in SIP are set by
28 * M-mode firmware and external devices (such as interrupt
29 * controller, etc).
30 */
31
32#ifdef CONFIG_MMU
33 if (riscv_has_extension_unlikely(RISCV_ISA_EXT_SSTC)) {
34 context->stimecmp = csr_read(CSR_STIMECMP);
35#if __riscv_xlen < 64
36 context->stimecmph = csr_read(CSR_STIMECMPH);
37#endif
38 }
39
40 context->satp = csr_read(CSR_SATP);
41#endif
42}
43
44void suspend_restore_csrs(struct suspend_context *context)
45{
46 csr_write(CSR_SCRATCH, 0);
47 if (riscv_has_extension_unlikely(RISCV_ISA_EXT_XLINUXENVCFG))
48 csr_write(CSR_ENVCFG, context->envcfg);
49 csr_write(CSR_TVEC, context->tvec);
50 csr_write(CSR_IE, context->ie);
51
52#ifdef CONFIG_MMU
53 if (riscv_has_extension_unlikely(RISCV_ISA_EXT_SSTC)) {
54 csr_write(CSR_STIMECMP, context->stimecmp);
55#if __riscv_xlen < 64
56 csr_write(CSR_STIMECMPH, context->stimecmph);
57#endif
58 }
59
60 csr_write(CSR_SATP, context->satp);
61#endif
62}
63
64int cpu_suspend(unsigned long arg,
65 int (*finish)(unsigned long arg,
66 unsigned long entry,
67 unsigned long context))
68{
69 int rc = 0;
70 struct suspend_context context = { 0 };
71
72 /* Finisher should be non-NULL */
73 if (!finish)
74 return -EINVAL;
75
76 /* Save additional CSRs*/
77 suspend_save_csrs(context: &context);
78
79 /*
80 * Function graph tracer state gets incosistent when the kernel
81 * calls functions that never return (aka finishers) hence disable
82 * graph tracing during their execution.
83 */
84 pause_graph_tracing();
85
86 /* Save context on stack */
87 if (__cpu_suspend_enter(&context)) {
88 /* Call the finisher */
89 rc = finish(arg, __pa_symbol(__cpu_resume_enter),
90 (ulong)&context);
91
92 /*
93 * Should never reach here, unless the suspend finisher
94 * fails. Successful cpu_suspend() should return from
95 * __cpu_resume_entry()
96 */
97 if (!rc)
98 rc = -EOPNOTSUPP;
99 }
100
101 /* Enable function graph tracer */
102 unpause_graph_tracing();
103
104 /* Restore additional CSRs */
105 suspend_restore_csrs(context: &context);
106
107 return rc;
108}
109
110#ifdef CONFIG_RISCV_SBI
111static int sbi_system_suspend(unsigned long sleep_type,
112 unsigned long resume_addr,
113 unsigned long opaque)
114{
115 struct sbiret ret;
116
117 ret = sbi_ecall(SBI_EXT_SUSP, SBI_EXT_SUSP_SYSTEM_SUSPEND,
118 sleep_type, resume_addr, opaque, 0, 0, 0);
119 if (ret.error)
120 return sbi_err_map_linux_errno(ret.error);
121
122 return ret.value;
123}
124
125static int sbi_system_suspend_enter(suspend_state_t state)
126{
127 return cpu_suspend(SBI_SUSP_SLEEP_TYPE_SUSPEND_TO_RAM, sbi_system_suspend);
128}
129
130static const struct platform_suspend_ops sbi_system_suspend_ops = {
131 .valid = suspend_valid_only_mem,
132 .enter = sbi_system_suspend_enter,
133};
134
135static int __init sbi_system_suspend_init(void)
136{
137 if (sbi_spec_version >= sbi_mk_version(2, 0) &&
138 sbi_probe_extension(SBI_EXT_SUSP) > 0) {
139 pr_info("SBI SUSP extension detected\n");
140 if (IS_ENABLED(CONFIG_SUSPEND))
141 suspend_set_ops(&sbi_system_suspend_ops);
142 }
143
144 return 0;
145}
146
147arch_initcall(sbi_system_suspend_init);
148
149static int sbi_suspend_finisher(unsigned long suspend_type,
150 unsigned long resume_addr,
151 unsigned long opaque)
152{
153 struct sbiret ret;
154
155 ret = sbi_ecall(SBI_EXT_HSM, SBI_EXT_HSM_HART_SUSPEND,
156 suspend_type, resume_addr, opaque, 0, 0, 0);
157
158 return (ret.error) ? sbi_err_map_linux_errno(ret.error) : 0;
159}
160
161int riscv_sbi_hart_suspend(u32 state)
162{
163 if (state & SBI_HSM_SUSP_NON_RET_BIT)
164 return cpu_suspend(state, sbi_suspend_finisher);
165 else
166 return sbi_suspend_finisher(state, 0, 0);
167}
168
169bool riscv_sbi_suspend_state_is_valid(u32 state)
170{
171 if (state > SBI_HSM_SUSPEND_RET_DEFAULT &&
172 state < SBI_HSM_SUSPEND_RET_PLATFORM)
173 return false;
174
175 if (state > SBI_HSM_SUSPEND_NON_RET_DEFAULT &&
176 state < SBI_HSM_SUSPEND_NON_RET_PLATFORM)
177 return false;
178
179 return true;
180}
181
182bool riscv_sbi_hsm_is_supported(void)
183{
184 /*
185 * The SBI HSM suspend function is only available when:
186 * 1) SBI version is 0.3 or higher
187 * 2) SBI HSM extension is available
188 */
189 if (sbi_spec_version < sbi_mk_version(0, 3) ||
190 !sbi_probe_extension(SBI_EXT_HSM)) {
191 pr_info("HSM suspend not available\n");
192 return false;
193 }
194
195 return true;
196}
197#endif /* CONFIG_RISCV_SBI */
198

source code of linux/arch/riscv/kernel/suspend.c