| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
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| 2 | /* The registers for cross calls will be: |
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| 3 | * |
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| 4 | * DATA 0: [low 32-bits] Address of function to call, jmp to this |
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| 5 | * [high 32-bits] MMU Context Argument 0, place in %g5 |
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| 6 | * DATA 1: Address Argument 1, place in %g1 |
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| 7 | * DATA 2: Address Argument 2, place in %g7 |
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| 8 | * |
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| 9 | * With this method we can do most of the cross-call tlb/cache |
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| 10 | * flushing very quickly. |
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| 11 | */ |
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| 12 | .align 32 |
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| 13 | .globl do_ivec |
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| 14 | .type do_ivec,#function |
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| 15 | do_ivec: |
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| 16 | mov 0x40, %g3 |
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| 17 | ldxa [%g3 + %g0] ASI_INTR_R, %g3 |
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| 18 | sethi %hi(KERNBASE), %g4 |
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| 19 | cmp %g3, %g4 |
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| 20 | bgeu,pn %xcc, do_ivec_xcall |
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| 21 | srlx %g3, 32, %g5 |
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| 22 | stxa %g0, [%g0] ASI_INTR_RECEIVE |
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| 23 | membar #Sync |
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| 24 | |
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| 25 | sethi %hi(ivector_table_pa), %g2 |
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| 26 | ldx [%g2 + %lo(ivector_table_pa)], %g2 |
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| 27 | sllx %g3, 4, %g3 |
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| 28 | add %g2, %g3, %g3 |
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| 29 | |
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| 30 | TRAP_LOAD_IRQ_WORK_PA(%g6, %g1) |
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| 31 | |
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| 32 | ldx [%g6], %g5 |
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| 33 | stxa %g5, [%g3] ASI_PHYS_USE_EC |
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| 34 | stx %g3, [%g6] |
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| 35 | wr %g0, 1 << PIL_DEVICE_IRQ, %set_softint |
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| 36 | retry |
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| 37 | do_ivec_xcall: |
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| 38 | mov 0x50, %g1 |
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| 39 | ldxa [%g1 + %g0] ASI_INTR_R, %g1 |
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| 40 | srl %g3, 0, %g3 |
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| 41 | |
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| 42 | mov 0x60, %g7 |
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| 43 | ldxa [%g7 + %g0] ASI_INTR_R, %g7 |
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| 44 | stxa %g0, [%g0] ASI_INTR_RECEIVE |
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| 45 | membar #Sync |
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| 46 | ba,pt %xcc, 1f |
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| 47 | nop |
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| 48 | |
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| 49 | .align 32 |
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| 50 | 1: jmpl %g3, %g0 |
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| 51 | nop |
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| 52 | .size do_ivec,.-do_ivec |
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| 53 | |
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