| 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
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| 2 | /* |
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| 3 | * X86 specific ACPICA environments and implementation |
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| 4 | * |
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| 5 | * Copyright (C) 2014, Intel Corporation |
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| 6 | * Author: Lv Zheng <lv.zheng@intel.com> |
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| 7 | */ |
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| 8 | |
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| 9 | #ifndef _ASM_X86_ACENV_H |
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| 10 | #define _ASM_X86_ACENV_H |
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| 11 | |
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| 12 | #include <asm/special_insns.h> |
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| 13 | |
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| 14 | /* Asm macros */ |
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| 15 | |
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| 16 | /* |
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| 17 | * ACPI_FLUSH_CPU_CACHE() flushes caches on entering sleep states. |
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| 18 | * It is required to prevent data loss. |
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| 19 | * |
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| 20 | * While running inside virtual machine, the kernel can bypass cache flushing. |
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| 21 | * Changing sleep state in a virtual machine doesn't affect the host system |
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| 22 | * sleep state and cannot lead to data loss. |
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| 23 | */ |
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| 24 | #define ACPI_FLUSH_CPU_CACHE() \ |
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| 25 | do { \ |
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| 26 | if (!cpu_feature_enabled(X86_FEATURE_HYPERVISOR)) \ |
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| 27 | wbinvd(); \ |
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| 28 | } while (0) |
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| 29 | |
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| 30 | int __acpi_acquire_global_lock(unsigned int *lock); |
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| 31 | int __acpi_release_global_lock(unsigned int *lock); |
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| 32 | |
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| 33 | #define ACPI_ACQUIRE_GLOBAL_LOCK(facs, Acq) \ |
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| 34 | ((Acq) = __acpi_acquire_global_lock(&facs->global_lock)) |
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| 35 | |
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| 36 | #define ACPI_RELEASE_GLOBAL_LOCK(facs, Acq) \ |
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| 37 | ((Acq) = __acpi_release_global_lock(&facs->global_lock)) |
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| 38 | |
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| 39 | /* |
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| 40 | * Math helper asm macros |
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| 41 | */ |
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| 42 | #define ACPI_DIV_64_BY_32(n_hi, n_lo, d32, q32, r32) \ |
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| 43 | asm("divl %2;" \ |
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| 44 | : "=a"(q32), "=d"(r32) \ |
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| 45 | : "r"(d32), \ |
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| 46 | "0"(n_lo), "1"(n_hi)) |
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| 47 | |
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| 48 | #define ACPI_SHIFT_RIGHT_64(n_hi, n_lo) \ |
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| 49 | asm("shrl $1,%2 ;" \ |
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| 50 | "rcrl $1,%3;" \ |
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| 51 | : "=r"(n_hi), "=r"(n_lo) \ |
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| 52 | : "0"(n_hi), "1"(n_lo)) |
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| 53 | |
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| 54 | #endif /* _ASM_X86_ACENV_H */ |
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| 55 | |
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