1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ASM_X86_PGTABLE_H
3#define _ASM_X86_PGTABLE_H
4
5#include <linux/mem_encrypt.h>
6#include <asm/page.h>
7#include <asm/pgtable_types.h>
8
9/*
10 * Macro to mark a page protection value as UC-
11 */
12#define pgprot_noncached(prot) \
13 ((boot_cpu_data.x86 > 3) \
14 ? (__pgprot(pgprot_val(prot) | \
15 cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS))) \
16 : (prot))
17
18#ifndef __ASSEMBLY__
19#include <linux/spinlock.h>
20#include <asm/x86_init.h>
21#include <asm/pkru.h>
22#include <asm/fpu/api.h>
23#include <asm/coco.h>
24#include <asm-generic/pgtable_uffd.h>
25#include <linux/page_table_check.h>
26
27extern pgd_t early_top_pgt[PTRS_PER_PGD];
28bool __init __early_make_pgtable(unsigned long address, pmdval_t pmd);
29
30struct seq_file;
31void ptdump_walk_pgd_level(struct seq_file *m, struct mm_struct *mm);
32void ptdump_walk_pgd_level_debugfs(struct seq_file *m, struct mm_struct *mm,
33 bool user);
34bool ptdump_walk_pgd_level_checkwx(void);
35#define ptdump_check_wx ptdump_walk_pgd_level_checkwx
36void ptdump_walk_user_pgd_level_checkwx(void);
37
38/*
39 * Macros to add or remove encryption attribute
40 */
41#define pgprot_encrypted(prot) __pgprot(cc_mkenc(pgprot_val(prot)))
42#define pgprot_decrypted(prot) __pgprot(cc_mkdec(pgprot_val(prot)))
43
44#ifdef CONFIG_DEBUG_WX
45#define debug_checkwx_user() ptdump_walk_user_pgd_level_checkwx()
46#else
47#define debug_checkwx_user() do { } while (0)
48#endif
49
50/*
51 * ZERO_PAGE is a global shared page that is always zero: used
52 * for zero-mapped memory areas etc..
53 */
54extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
55 __visible;
56#define ZERO_PAGE(vaddr) ((void)(vaddr),virt_to_page(empty_zero_page))
57
58extern spinlock_t pgd_lock;
59extern struct list_head pgd_list;
60
61extern struct mm_struct *pgd_page_get_mm(struct page *page);
62
63extern pmdval_t early_pmd_flags;
64
65#ifdef CONFIG_PARAVIRT_XXL
66#include <asm/paravirt.h>
67#else /* !CONFIG_PARAVIRT_XXL */
68#define set_pte(ptep, pte) native_set_pte(ptep, pte)
69
70#define set_pte_atomic(ptep, pte) \
71 native_set_pte_atomic(ptep, pte)
72
73#define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd)
74
75#ifndef __PAGETABLE_P4D_FOLDED
76#define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd)
77#define pgd_clear(pgd) (pgtable_l5_enabled() ? native_pgd_clear(pgd) : 0)
78#endif
79
80#ifndef set_p4d
81# define set_p4d(p4dp, p4d) native_set_p4d(p4dp, p4d)
82#endif
83
84#ifndef __PAGETABLE_PUD_FOLDED
85#define p4d_clear(p4d) native_p4d_clear(p4d)
86#endif
87
88#ifndef set_pud
89# define set_pud(pudp, pud) native_set_pud(pudp, pud)
90#endif
91
92#ifndef __PAGETABLE_PUD_FOLDED
93#define pud_clear(pud) native_pud_clear(pud)
94#endif
95
96#define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep)
97#define pmd_clear(pmd) native_pmd_clear(pmd)
98
99#define pgd_val(x) native_pgd_val(x)
100#define __pgd(x) native_make_pgd(x)
101
102#ifndef __PAGETABLE_P4D_FOLDED
103#define p4d_val(x) native_p4d_val(x)
104#define __p4d(x) native_make_p4d(x)
105#endif
106
107#ifndef __PAGETABLE_PUD_FOLDED
108#define pud_val(x) native_pud_val(x)
109#define __pud(x) native_make_pud(x)
110#endif
111
112#ifndef __PAGETABLE_PMD_FOLDED
113#define pmd_val(x) native_pmd_val(x)
114#define __pmd(x) native_make_pmd(x)
115#endif
116
117#define pte_val(x) native_pte_val(x)
118#define __pte(x) native_make_pte(x)
119
120#define arch_end_context_switch(prev) do {} while(0)
121#endif /* CONFIG_PARAVIRT_XXL */
122
123/*
124 * The following only work if pte_present() is true.
125 * Undefined behaviour if not..
126 */
127static inline bool pte_dirty(pte_t pte)
128{
129 return pte_flags(pte) & _PAGE_DIRTY_BITS;
130}
131
132static inline bool pte_shstk(pte_t pte)
133{
134 return cpu_feature_enabled(X86_FEATURE_SHSTK) &&
135 (pte_flags(pte) & (_PAGE_RW | _PAGE_DIRTY)) == _PAGE_DIRTY;
136}
137
138static inline int pte_young(pte_t pte)
139{
140 return pte_flags(pte) & _PAGE_ACCESSED;
141}
142
143#define pmd_dirty pmd_dirty
144static inline bool pmd_dirty(pmd_t pmd)
145{
146 return pmd_flags(pmd) & _PAGE_DIRTY_BITS;
147}
148
149static inline bool pmd_shstk(pmd_t pmd)
150{
151 return cpu_feature_enabled(X86_FEATURE_SHSTK) &&
152 (pmd_flags(pmd) & (_PAGE_RW | _PAGE_DIRTY | _PAGE_PSE)) ==
153 (_PAGE_DIRTY | _PAGE_PSE);
154}
155
156#define pmd_young pmd_young
157static inline int pmd_young(pmd_t pmd)
158{
159 return pmd_flags(pmd) & _PAGE_ACCESSED;
160}
161
162static inline bool pud_dirty(pud_t pud)
163{
164 return pud_flags(pud) & _PAGE_DIRTY_BITS;
165}
166
167static inline int pud_young(pud_t pud)
168{
169 return pud_flags(pud) & _PAGE_ACCESSED;
170}
171
172static inline int pte_write(pte_t pte)
173{
174 /*
175 * Shadow stack pages are logically writable, but do not have
176 * _PAGE_RW. Check for them separately from _PAGE_RW itself.
177 */
178 return (pte_flags(pte) & _PAGE_RW) || pte_shstk(pte);
179}
180
181#define pmd_write pmd_write
182static inline int pmd_write(pmd_t pmd)
183{
184 /*
185 * Shadow stack pages are logically writable, but do not have
186 * _PAGE_RW. Check for them separately from _PAGE_RW itself.
187 */
188 return (pmd_flags(pmd) & _PAGE_RW) || pmd_shstk(pmd);
189}
190
191#define pud_write pud_write
192static inline int pud_write(pud_t pud)
193{
194 return pud_flags(pud) & _PAGE_RW;
195}
196
197static inline int pte_huge(pte_t pte)
198{
199 return pte_flags(pte) & _PAGE_PSE;
200}
201
202static inline int pte_global(pte_t pte)
203{
204 return pte_flags(pte) & _PAGE_GLOBAL;
205}
206
207static inline int pte_exec(pte_t pte)
208{
209 return !(pte_flags(pte) & _PAGE_NX);
210}
211
212static inline int pte_special(pte_t pte)
213{
214 return pte_flags(pte) & _PAGE_SPECIAL;
215}
216
217/* Entries that were set to PROT_NONE are inverted */
218
219static inline u64 protnone_mask(u64 val);
220
221#define PFN_PTE_SHIFT PAGE_SHIFT
222
223static inline unsigned long pte_pfn(pte_t pte)
224{
225 phys_addr_t pfn = pte_val(pte);
226 pfn ^= protnone_mask(val: pfn);
227 return (pfn & PTE_PFN_MASK) >> PAGE_SHIFT;
228}
229
230static inline unsigned long pmd_pfn(pmd_t pmd)
231{
232 phys_addr_t pfn = pmd_val(pmd);
233 pfn ^= protnone_mask(val: pfn);
234 return (pfn & pmd_pfn_mask(pmd)) >> PAGE_SHIFT;
235}
236
237static inline unsigned long pud_pfn(pud_t pud)
238{
239 phys_addr_t pfn = pud_val(pud);
240 pfn ^= protnone_mask(val: pfn);
241 return (pfn & pud_pfn_mask(pud)) >> PAGE_SHIFT;
242}
243
244static inline unsigned long p4d_pfn(p4d_t p4d)
245{
246 return (p4d_val(p4d) & p4d_pfn_mask(p4d)) >> PAGE_SHIFT;
247}
248
249static inline unsigned long pgd_pfn(pgd_t pgd)
250{
251 return (pgd_val(pgd) & PTE_PFN_MASK) >> PAGE_SHIFT;
252}
253
254#define p4d_leaf p4d_leaf
255static inline bool p4d_leaf(p4d_t p4d)
256{
257 /* No 512 GiB pages yet */
258 return 0;
259}
260
261#define pte_page(pte) pfn_to_page(pte_pfn(pte))
262
263#define pmd_leaf pmd_leaf
264static inline bool pmd_leaf(pmd_t pte)
265{
266 return pmd_flags(pmd: pte) & _PAGE_PSE;
267}
268
269#ifdef CONFIG_TRANSPARENT_HUGEPAGE
270/* NOTE: when predicate huge page, consider also pmd_devmap, or use pmd_leaf */
271static inline int pmd_trans_huge(pmd_t pmd)
272{
273 return (pmd_val(pmd) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE;
274}
275
276#ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
277static inline int pud_trans_huge(pud_t pud)
278{
279 return (pud_val(pud) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE;
280}
281#endif
282
283#define has_transparent_hugepage has_transparent_hugepage
284static inline int has_transparent_hugepage(void)
285{
286 return boot_cpu_has(X86_FEATURE_PSE);
287}
288
289#ifdef CONFIG_ARCH_HAS_PTE_DEVMAP
290static inline int pmd_devmap(pmd_t pmd)
291{
292 return !!(pmd_val(pmd) & _PAGE_DEVMAP);
293}
294
295#ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
296static inline int pud_devmap(pud_t pud)
297{
298 return !!(pud_val(pud) & _PAGE_DEVMAP);
299}
300#else
301static inline int pud_devmap(pud_t pud)
302{
303 return 0;
304}
305#endif
306
307static inline int pgd_devmap(pgd_t pgd)
308{
309 return 0;
310}
311#endif
312#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
313
314static inline pte_t pte_set_flags(pte_t pte, pteval_t set)
315{
316 pteval_t v = native_pte_val(pte);
317
318 return native_make_pte(val: v | set);
319}
320
321static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear)
322{
323 pteval_t v = native_pte_val(pte);
324
325 return native_make_pte(val: v & ~clear);
326}
327
328/*
329 * Write protection operations can result in Dirty=1,Write=0 PTEs. But in the
330 * case of X86_FEATURE_USER_SHSTK, these PTEs denote shadow stack memory. So
331 * when creating dirty, write-protected memory, a software bit is used:
332 * _PAGE_BIT_SAVED_DIRTY. The following functions take a PTE and transition the
333 * Dirty bit to SavedDirty, and vice-vesra.
334 *
335 * This shifting is only done if needed. In the case of shifting
336 * Dirty->SavedDirty, the condition is if the PTE is Write=0. In the case of
337 * shifting SavedDirty->Dirty, the condition is Write=1.
338 */
339static inline pgprotval_t mksaveddirty_shift(pgprotval_t v)
340{
341 pgprotval_t cond = (~v >> _PAGE_BIT_RW) & 1;
342
343 v |= ((v >> _PAGE_BIT_DIRTY) & cond) << _PAGE_BIT_SAVED_DIRTY;
344 v &= ~(cond << _PAGE_BIT_DIRTY);
345
346 return v;
347}
348
349static inline pgprotval_t clear_saveddirty_shift(pgprotval_t v)
350{
351 pgprotval_t cond = (v >> _PAGE_BIT_RW) & 1;
352
353 v |= ((v >> _PAGE_BIT_SAVED_DIRTY) & cond) << _PAGE_BIT_DIRTY;
354 v &= ~(cond << _PAGE_BIT_SAVED_DIRTY);
355
356 return v;
357}
358
359static inline pte_t pte_mksaveddirty(pte_t pte)
360{
361 pteval_t v = native_pte_val(pte);
362
363 v = mksaveddirty_shift(v);
364 return native_make_pte(val: v);
365}
366
367static inline pte_t pte_clear_saveddirty(pte_t pte)
368{
369 pteval_t v = native_pte_val(pte);
370
371 v = clear_saveddirty_shift(v);
372 return native_make_pte(val: v);
373}
374
375static inline pte_t pte_wrprotect(pte_t pte)
376{
377 pte = pte_clear_flags(pte, _PAGE_RW);
378
379 /*
380 * Blindly clearing _PAGE_RW might accidentally create
381 * a shadow stack PTE (Write=0,Dirty=1). Move the hardware
382 * dirty value to the software bit, if present.
383 */
384 return pte_mksaveddirty(pte);
385}
386
387#ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP
388static inline int pte_uffd_wp(pte_t pte)
389{
390 bool wp = pte_flags(pte) & _PAGE_UFFD_WP;
391
392#ifdef CONFIG_DEBUG_VM
393 /*
394 * Having write bit for wr-protect-marked present ptes is fatal,
395 * because it means the uffd-wp bit will be ignored and write will
396 * just go through.
397 *
398 * Use any chance of pgtable walking to verify this (e.g., when
399 * page swapped out or being migrated for all purposes). It means
400 * something is already wrong. Tell the admin even before the
401 * process crashes. We also nail it with wrong pgtable setup.
402 */
403 WARN_ON_ONCE(wp && pte_write(pte));
404#endif
405
406 return wp;
407}
408
409static inline pte_t pte_mkuffd_wp(pte_t pte)
410{
411 return pte_wrprotect(pte: pte_set_flags(pte, _PAGE_UFFD_WP));
412}
413
414static inline pte_t pte_clear_uffd_wp(pte_t pte)
415{
416 return pte_clear_flags(pte, _PAGE_UFFD_WP);
417}
418#endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */
419
420static inline pte_t pte_mkclean(pte_t pte)
421{
422 return pte_clear_flags(pte, _PAGE_DIRTY_BITS);
423}
424
425static inline pte_t pte_mkold(pte_t pte)
426{
427 return pte_clear_flags(pte, _PAGE_ACCESSED);
428}
429
430static inline pte_t pte_mkexec(pte_t pte)
431{
432 return pte_clear_flags(pte, _PAGE_NX);
433}
434
435static inline pte_t pte_mkdirty(pte_t pte)
436{
437 pte = pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
438
439 return pte_mksaveddirty(pte);
440}
441
442static inline pte_t pte_mkwrite_shstk(pte_t pte)
443{
444 pte = pte_clear_flags(pte, _PAGE_RW);
445
446 return pte_set_flags(pte, _PAGE_DIRTY);
447}
448
449static inline pte_t pte_mkyoung(pte_t pte)
450{
451 return pte_set_flags(pte, _PAGE_ACCESSED);
452}
453
454static inline pte_t pte_mkwrite_novma(pte_t pte)
455{
456 return pte_set_flags(pte, _PAGE_RW);
457}
458
459struct vm_area_struct;
460pte_t pte_mkwrite(pte_t pte, struct vm_area_struct *vma);
461#define pte_mkwrite pte_mkwrite
462
463static inline pte_t pte_mkhuge(pte_t pte)
464{
465 return pte_set_flags(pte, _PAGE_PSE);
466}
467
468static inline pte_t pte_clrhuge(pte_t pte)
469{
470 return pte_clear_flags(pte, _PAGE_PSE);
471}
472
473static inline pte_t pte_mkglobal(pte_t pte)
474{
475 return pte_set_flags(pte, _PAGE_GLOBAL);
476}
477
478static inline pte_t pte_clrglobal(pte_t pte)
479{
480 return pte_clear_flags(pte, _PAGE_GLOBAL);
481}
482
483static inline pte_t pte_mkspecial(pte_t pte)
484{
485 return pte_set_flags(pte, _PAGE_SPECIAL);
486}
487
488static inline pte_t pte_mkdevmap(pte_t pte)
489{
490 return pte_set_flags(pte, _PAGE_SPECIAL|_PAGE_DEVMAP);
491}
492
493static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set)
494{
495 pmdval_t v = native_pmd_val(pmd);
496
497 return native_make_pmd(val: v | set);
498}
499
500static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear)
501{
502 pmdval_t v = native_pmd_val(pmd);
503
504 return native_make_pmd(val: v & ~clear);
505}
506
507/* See comments above mksaveddirty_shift() */
508static inline pmd_t pmd_mksaveddirty(pmd_t pmd)
509{
510 pmdval_t v = native_pmd_val(pmd);
511
512 v = mksaveddirty_shift(v);
513 return native_make_pmd(val: v);
514}
515
516/* See comments above mksaveddirty_shift() */
517static inline pmd_t pmd_clear_saveddirty(pmd_t pmd)
518{
519 pmdval_t v = native_pmd_val(pmd);
520
521 v = clear_saveddirty_shift(v);
522 return native_make_pmd(val: v);
523}
524
525static inline pmd_t pmd_wrprotect(pmd_t pmd)
526{
527 pmd = pmd_clear_flags(pmd, _PAGE_RW);
528
529 /*
530 * Blindly clearing _PAGE_RW might accidentally create
531 * a shadow stack PMD (RW=0, Dirty=1). Move the hardware
532 * dirty value to the software bit.
533 */
534 return pmd_mksaveddirty(pmd);
535}
536
537#ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP
538static inline int pmd_uffd_wp(pmd_t pmd)
539{
540 return pmd_flags(pmd) & _PAGE_UFFD_WP;
541}
542
543static inline pmd_t pmd_mkuffd_wp(pmd_t pmd)
544{
545 return pmd_wrprotect(pmd: pmd_set_flags(pmd, _PAGE_UFFD_WP));
546}
547
548static inline pmd_t pmd_clear_uffd_wp(pmd_t pmd)
549{
550 return pmd_clear_flags(pmd, _PAGE_UFFD_WP);
551}
552#endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */
553
554static inline pmd_t pmd_mkold(pmd_t pmd)
555{
556 return pmd_clear_flags(pmd, _PAGE_ACCESSED);
557}
558
559static inline pmd_t pmd_mkclean(pmd_t pmd)
560{
561 return pmd_clear_flags(pmd, _PAGE_DIRTY_BITS);
562}
563
564static inline pmd_t pmd_mkdirty(pmd_t pmd)
565{
566 pmd = pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
567
568 return pmd_mksaveddirty(pmd);
569}
570
571static inline pmd_t pmd_mkwrite_shstk(pmd_t pmd)
572{
573 pmd = pmd_clear_flags(pmd, _PAGE_RW);
574
575 return pmd_set_flags(pmd, _PAGE_DIRTY);
576}
577
578static inline pmd_t pmd_mkdevmap(pmd_t pmd)
579{
580 return pmd_set_flags(pmd, _PAGE_DEVMAP);
581}
582
583static inline pmd_t pmd_mkhuge(pmd_t pmd)
584{
585 return pmd_set_flags(pmd, _PAGE_PSE);
586}
587
588static inline pmd_t pmd_mkyoung(pmd_t pmd)
589{
590 return pmd_set_flags(pmd, _PAGE_ACCESSED);
591}
592
593static inline pmd_t pmd_mkwrite_novma(pmd_t pmd)
594{
595 return pmd_set_flags(pmd, _PAGE_RW);
596}
597
598pmd_t pmd_mkwrite(pmd_t pmd, struct vm_area_struct *vma);
599#define pmd_mkwrite pmd_mkwrite
600
601static inline pud_t pud_set_flags(pud_t pud, pudval_t set)
602{
603 pudval_t v = native_pud_val(pud);
604
605 return native_make_pud(val: v | set);
606}
607
608static inline pud_t pud_clear_flags(pud_t pud, pudval_t clear)
609{
610 pudval_t v = native_pud_val(pud);
611
612 return native_make_pud(val: v & ~clear);
613}
614
615/* See comments above mksaveddirty_shift() */
616static inline pud_t pud_mksaveddirty(pud_t pud)
617{
618 pudval_t v = native_pud_val(pud);
619
620 v = mksaveddirty_shift(v);
621 return native_make_pud(val: v);
622}
623
624/* See comments above mksaveddirty_shift() */
625static inline pud_t pud_clear_saveddirty(pud_t pud)
626{
627 pudval_t v = native_pud_val(pud);
628
629 v = clear_saveddirty_shift(v);
630 return native_make_pud(val: v);
631}
632
633static inline pud_t pud_mkold(pud_t pud)
634{
635 return pud_clear_flags(pud, _PAGE_ACCESSED);
636}
637
638static inline pud_t pud_mkclean(pud_t pud)
639{
640 return pud_clear_flags(pud, _PAGE_DIRTY_BITS);
641}
642
643static inline pud_t pud_wrprotect(pud_t pud)
644{
645 pud = pud_clear_flags(pud, _PAGE_RW);
646
647 /*
648 * Blindly clearing _PAGE_RW might accidentally create
649 * a shadow stack PUD (RW=0, Dirty=1). Move the hardware
650 * dirty value to the software bit.
651 */
652 return pud_mksaveddirty(pud);
653}
654
655static inline pud_t pud_mkdirty(pud_t pud)
656{
657 pud = pud_set_flags(pud, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
658
659 return pud_mksaveddirty(pud);
660}
661
662static inline pud_t pud_mkdevmap(pud_t pud)
663{
664 return pud_set_flags(pud, _PAGE_DEVMAP);
665}
666
667static inline pud_t pud_mkhuge(pud_t pud)
668{
669 return pud_set_flags(pud, _PAGE_PSE);
670}
671
672static inline pud_t pud_mkyoung(pud_t pud)
673{
674 return pud_set_flags(pud, _PAGE_ACCESSED);
675}
676
677static inline pud_t pud_mkwrite(pud_t pud)
678{
679 pud = pud_set_flags(pud, _PAGE_RW);
680
681 return pud_clear_saveddirty(pud);
682}
683
684#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
685static inline int pte_soft_dirty(pte_t pte)
686{
687 return pte_flags(pte) & _PAGE_SOFT_DIRTY;
688}
689
690static inline int pmd_soft_dirty(pmd_t pmd)
691{
692 return pmd_flags(pmd) & _PAGE_SOFT_DIRTY;
693}
694
695static inline int pud_soft_dirty(pud_t pud)
696{
697 return pud_flags(pud) & _PAGE_SOFT_DIRTY;
698}
699
700static inline pte_t pte_mksoft_dirty(pte_t pte)
701{
702 return pte_set_flags(pte, _PAGE_SOFT_DIRTY);
703}
704
705static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
706{
707 return pmd_set_flags(pmd, _PAGE_SOFT_DIRTY);
708}
709
710static inline pud_t pud_mksoft_dirty(pud_t pud)
711{
712 return pud_set_flags(pud, _PAGE_SOFT_DIRTY);
713}
714
715static inline pte_t pte_clear_soft_dirty(pte_t pte)
716{
717 return pte_clear_flags(pte, _PAGE_SOFT_DIRTY);
718}
719
720static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
721{
722 return pmd_clear_flags(pmd, _PAGE_SOFT_DIRTY);
723}
724
725static inline pud_t pud_clear_soft_dirty(pud_t pud)
726{
727 return pud_clear_flags(pud, _PAGE_SOFT_DIRTY);
728}
729
730#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
731
732/*
733 * Mask out unsupported bits in a present pgprot. Non-present pgprots
734 * can use those bits for other purposes, so leave them be.
735 */
736static inline pgprotval_t massage_pgprot(pgprot_t pgprot)
737{
738 pgprotval_t protval = pgprot_val(pgprot);
739
740 if (protval & _PAGE_PRESENT)
741 protval &= __supported_pte_mask;
742
743 return protval;
744}
745
746static inline pgprotval_t check_pgprot(pgprot_t pgprot)
747{
748 pgprotval_t massaged_val = massage_pgprot(pgprot);
749
750 /* mmdebug.h can not be included here because of dependencies */
751#ifdef CONFIG_DEBUG_VM
752 WARN_ONCE(pgprot_val(pgprot) != massaged_val,
753 "attempted to set unsupported pgprot: %016llx "
754 "bits: %016llx supported: %016llx\n",
755 (u64)pgprot_val(pgprot),
756 (u64)pgprot_val(pgprot) ^ massaged_val,
757 (u64)__supported_pte_mask);
758#endif
759
760 return massaged_val;
761}
762
763static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
764{
765 phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT;
766 pfn ^= protnone_mask(pgprot_val(pgprot));
767 pfn &= PTE_PFN_MASK;
768 return __pte(val: pfn | check_pgprot(pgprot));
769}
770
771static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
772{
773 phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT;
774 pfn ^= protnone_mask(pgprot_val(pgprot));
775 pfn &= PHYSICAL_PMD_PAGE_MASK;
776 return __pmd(val: pfn | check_pgprot(pgprot));
777}
778
779static inline pud_t pfn_pud(unsigned long page_nr, pgprot_t pgprot)
780{
781 phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT;
782 pfn ^= protnone_mask(pgprot_val(pgprot));
783 pfn &= PHYSICAL_PUD_PAGE_MASK;
784 return __pud(val: pfn | check_pgprot(pgprot));
785}
786
787static inline pmd_t pmd_mkinvalid(pmd_t pmd)
788{
789 return pfn_pmd(page_nr: pmd_pfn(pmd),
790 __pgprot(pmd_flags(pmd) & ~(_PAGE_PRESENT|_PAGE_PROTNONE)));
791}
792
793static inline u64 flip_protnone_guard(u64 oldval, u64 val, u64 mask);
794
795static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
796{
797 pteval_t val = pte_val(pte), oldval = val;
798 pte_t pte_result;
799
800 /*
801 * Chop off the NX bit (if present), and add the NX portion of
802 * the newprot (if present):
803 */
804 val &= _PAGE_CHG_MASK;
805 val |= check_pgprot(pgprot: newprot) & ~_PAGE_CHG_MASK;
806 val = flip_protnone_guard(oldval, val, PTE_PFN_MASK);
807
808 pte_result = __pte(val);
809
810 /*
811 * To avoid creating Write=0,Dirty=1 PTEs, pte_modify() needs to avoid:
812 * 1. Marking Write=0 PTEs Dirty=1
813 * 2. Marking Dirty=1 PTEs Write=0
814 *
815 * The first case cannot happen because the _PAGE_CHG_MASK will filter
816 * out any Dirty bit passed in newprot. Handle the second case by
817 * going through the mksaveddirty exercise. Only do this if the old
818 * value was Write=1 to avoid doing this on Shadow Stack PTEs.
819 */
820 if (oldval & _PAGE_RW)
821 pte_result = pte_mksaveddirty(pte: pte_result);
822 else
823 pte_result = pte_clear_saveddirty(pte: pte_result);
824
825 return pte_result;
826}
827
828static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
829{
830 pmdval_t val = pmd_val(pmd), oldval = val;
831 pmd_t pmd_result;
832
833 val &= (_HPAGE_CHG_MASK & ~_PAGE_DIRTY);
834 val |= check_pgprot(pgprot: newprot) & ~_HPAGE_CHG_MASK;
835 val = flip_protnone_guard(oldval, val, PHYSICAL_PMD_PAGE_MASK);
836
837 pmd_result = __pmd(val);
838
839 /*
840 * To avoid creating Write=0,Dirty=1 PMDs, pte_modify() needs to avoid:
841 * 1. Marking Write=0 PMDs Dirty=1
842 * 2. Marking Dirty=1 PMDs Write=0
843 *
844 * The first case cannot happen because the _PAGE_CHG_MASK will filter
845 * out any Dirty bit passed in newprot. Handle the second case by
846 * going through the mksaveddirty exercise. Only do this if the old
847 * value was Write=1 to avoid doing this on Shadow Stack PTEs.
848 */
849 if (oldval & _PAGE_RW)
850 pmd_result = pmd_mksaveddirty(pmd: pmd_result);
851 else
852 pmd_result = pmd_clear_saveddirty(pmd: pmd_result);
853
854 return pmd_result;
855}
856
857/*
858 * mprotect needs to preserve PAT and encryption bits when updating
859 * vm_page_prot
860 */
861#define pgprot_modify pgprot_modify
862static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
863{
864 pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK;
865 pgprotval_t addbits = pgprot_val(newprot) & ~_PAGE_CHG_MASK;
866 return __pgprot(preservebits | addbits);
867}
868
869#define pte_pgprot(x) __pgprot(pte_flags(x))
870#define pmd_pgprot(x) __pgprot(pmd_flags(x))
871#define pud_pgprot(x) __pgprot(pud_flags(x))
872#define p4d_pgprot(x) __pgprot(p4d_flags(x))
873
874#define canon_pgprot(p) __pgprot(massage_pgprot(p))
875
876static inline int is_new_memtype_allowed(u64 paddr, unsigned long size,
877 enum page_cache_mode pcm,
878 enum page_cache_mode new_pcm)
879{
880 /*
881 * PAT type is always WB for untracked ranges, so no need to check.
882 */
883 if (x86_platform.is_untracked_pat_range(paddr, paddr + size))
884 return 1;
885
886 /*
887 * Certain new memtypes are not allowed with certain
888 * requested memtype:
889 * - request is uncached, return cannot be write-back
890 * - request is write-combine, return cannot be write-back
891 * - request is write-through, return cannot be write-back
892 * - request is write-through, return cannot be write-combine
893 */
894 if ((pcm == _PAGE_CACHE_MODE_UC_MINUS &&
895 new_pcm == _PAGE_CACHE_MODE_WB) ||
896 (pcm == _PAGE_CACHE_MODE_WC &&
897 new_pcm == _PAGE_CACHE_MODE_WB) ||
898 (pcm == _PAGE_CACHE_MODE_WT &&
899 new_pcm == _PAGE_CACHE_MODE_WB) ||
900 (pcm == _PAGE_CACHE_MODE_WT &&
901 new_pcm == _PAGE_CACHE_MODE_WC)) {
902 return 0;
903 }
904
905 return 1;
906}
907
908pmd_t *populate_extra_pmd(unsigned long vaddr);
909pte_t *populate_extra_pte(unsigned long vaddr);
910
911#ifdef CONFIG_MITIGATION_PAGE_TABLE_ISOLATION
912pgd_t __pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd);
913
914/*
915 * Take a PGD location (pgdp) and a pgd value that needs to be set there.
916 * Populates the user and returns the resulting PGD that must be set in
917 * the kernel copy of the page tables.
918 */
919static inline pgd_t pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd)
920{
921 if (!static_cpu_has(X86_FEATURE_PTI))
922 return pgd;
923 return __pti_set_user_pgtbl(pgdp, pgd);
924}
925#else /* CONFIG_MITIGATION_PAGE_TABLE_ISOLATION */
926static inline pgd_t pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd)
927{
928 return pgd;
929}
930#endif /* CONFIG_MITIGATION_PAGE_TABLE_ISOLATION */
931
932#endif /* __ASSEMBLY__ */
933
934
935#ifdef CONFIG_X86_32
936# include <asm/pgtable_32.h>
937#else
938# include <asm/pgtable_64.h>
939#endif
940
941#ifndef __ASSEMBLY__
942#include <linux/mm_types.h>
943#include <linux/mmdebug.h>
944#include <linux/log2.h>
945#include <asm/fixmap.h>
946
947static inline int pte_none(pte_t pte)
948{
949 return !(pte.pte & ~(_PAGE_KNL_ERRATUM_MASK));
950}
951
952#define __HAVE_ARCH_PTE_SAME
953static inline int pte_same(pte_t a, pte_t b)
954{
955 return a.pte == b.pte;
956}
957
958static inline pte_t pte_advance_pfn(pte_t pte, unsigned long nr)
959{
960 if (__pte_needs_invert(val: pte_val(pte)))
961 return __pte(val: pte_val(pte) - (nr << PFN_PTE_SHIFT));
962 return __pte(val: pte_val(pte) + (nr << PFN_PTE_SHIFT));
963}
964#define pte_advance_pfn pte_advance_pfn
965
966static inline int pte_present(pte_t a)
967{
968 return pte_flags(pte: a) & (_PAGE_PRESENT | _PAGE_PROTNONE);
969}
970
971#ifdef CONFIG_ARCH_HAS_PTE_DEVMAP
972static inline int pte_devmap(pte_t a)
973{
974 return (pte_flags(pte: a) & _PAGE_DEVMAP) == _PAGE_DEVMAP;
975}
976#endif
977
978#define pte_accessible pte_accessible
979static inline bool pte_accessible(struct mm_struct *mm, pte_t a)
980{
981 if (pte_flags(pte: a) & _PAGE_PRESENT)
982 return true;
983
984 if ((pte_flags(pte: a) & _PAGE_PROTNONE) &&
985 atomic_read(v: &mm->tlb_flush_pending))
986 return true;
987
988 return false;
989}
990
991static inline int pmd_present(pmd_t pmd)
992{
993 /*
994 * Checking for _PAGE_PSE is needed too because
995 * split_huge_page will temporarily clear the present bit (but
996 * the _PAGE_PSE flag will remain set at all times while the
997 * _PAGE_PRESENT bit is clear).
998 */
999 return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE);
1000}
1001
1002#ifdef CONFIG_NUMA_BALANCING
1003/*
1004 * These work without NUMA balancing but the kernel does not care. See the
1005 * comment in include/linux/pgtable.h
1006 */
1007static inline int pte_protnone(pte_t pte)
1008{
1009 return (pte_flags(pte) & (_PAGE_PROTNONE | _PAGE_PRESENT))
1010 == _PAGE_PROTNONE;
1011}
1012
1013static inline int pmd_protnone(pmd_t pmd)
1014{
1015 return (pmd_flags(pmd) & (_PAGE_PROTNONE | _PAGE_PRESENT))
1016 == _PAGE_PROTNONE;
1017}
1018#endif /* CONFIG_NUMA_BALANCING */
1019
1020static inline int pmd_none(pmd_t pmd)
1021{
1022 /* Only check low word on 32-bit platforms, since it might be
1023 out of sync with upper half. */
1024 unsigned long val = native_pmd_val(pmd);
1025 return (val & ~_PAGE_KNL_ERRATUM_MASK) == 0;
1026}
1027
1028static inline unsigned long pmd_page_vaddr(pmd_t pmd)
1029{
1030 return (unsigned long)__va(pmd_val(pmd) & pmd_pfn_mask(pmd));
1031}
1032
1033/*
1034 * Currently stuck as a macro due to indirect forward reference to
1035 * linux/mmzone.h's __section_mem_map_addr() definition:
1036 */
1037#define pmd_page(pmd) pfn_to_page(pmd_pfn(pmd))
1038
1039/*
1040 * Conversion functions: convert a page and protection to a page entry,
1041 * and a page entry and page directory to the page they refer to.
1042 *
1043 * (Currently stuck as a macro because of indirect forward reference
1044 * to linux/mm.h:page_to_nid())
1045 */
1046#define mk_pte(page, pgprot) \
1047({ \
1048 pgprot_t __pgprot = pgprot; \
1049 \
1050 WARN_ON_ONCE((pgprot_val(__pgprot) & (_PAGE_DIRTY | _PAGE_RW)) == \
1051 _PAGE_DIRTY); \
1052 pfn_pte(page_to_pfn(page), __pgprot); \
1053})
1054
1055static inline int pmd_bad(pmd_t pmd)
1056{
1057 return (pmd_flags(pmd) & ~(_PAGE_USER | _PAGE_ACCESSED)) !=
1058 (_KERNPG_TABLE & ~_PAGE_ACCESSED);
1059}
1060
1061static inline unsigned long pages_to_mb(unsigned long npg)
1062{
1063 return npg >> (20 - PAGE_SHIFT);
1064}
1065
1066#if CONFIG_PGTABLE_LEVELS > 2
1067static inline int pud_none(pud_t pud)
1068{
1069 return (native_pud_val(pud) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0;
1070}
1071
1072static inline int pud_present(pud_t pud)
1073{
1074 return pud_flags(pud) & _PAGE_PRESENT;
1075}
1076
1077static inline pmd_t *pud_pgtable(pud_t pud)
1078{
1079 return (pmd_t *)__va(pud_val(pud) & pud_pfn_mask(pud));
1080}
1081
1082/*
1083 * Currently stuck as a macro due to indirect forward reference to
1084 * linux/mmzone.h's __section_mem_map_addr() definition:
1085 */
1086#define pud_page(pud) pfn_to_page(pud_pfn(pud))
1087
1088#define pud_leaf pud_leaf
1089static inline bool pud_leaf(pud_t pud)
1090{
1091 return (pud_val(pud) & (_PAGE_PSE | _PAGE_PRESENT)) ==
1092 (_PAGE_PSE | _PAGE_PRESENT);
1093}
1094
1095static inline int pud_bad(pud_t pud)
1096{
1097 return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0;
1098}
1099#endif /* CONFIG_PGTABLE_LEVELS > 2 */
1100
1101#if CONFIG_PGTABLE_LEVELS > 3
1102static inline int p4d_none(p4d_t p4d)
1103{
1104 return (native_p4d_val(p4d) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0;
1105}
1106
1107static inline int p4d_present(p4d_t p4d)
1108{
1109 return p4d_flags(p4d) & _PAGE_PRESENT;
1110}
1111
1112static inline pud_t *p4d_pgtable(p4d_t p4d)
1113{
1114 return (pud_t *)__va(p4d_val(p4d) & p4d_pfn_mask(p4d));
1115}
1116
1117/*
1118 * Currently stuck as a macro due to indirect forward reference to
1119 * linux/mmzone.h's __section_mem_map_addr() definition:
1120 */
1121#define p4d_page(p4d) pfn_to_page(p4d_pfn(p4d))
1122
1123static inline int p4d_bad(p4d_t p4d)
1124{
1125 unsigned long ignore_flags = _KERNPG_TABLE | _PAGE_USER;
1126
1127 if (IS_ENABLED(CONFIG_MITIGATION_PAGE_TABLE_ISOLATION))
1128 ignore_flags |= _PAGE_NX;
1129
1130 return (p4d_flags(p4d) & ~ignore_flags) != 0;
1131}
1132#endif /* CONFIG_PGTABLE_LEVELS > 3 */
1133
1134static inline unsigned long p4d_index(unsigned long address)
1135{
1136 return (address >> P4D_SHIFT) & (PTRS_PER_P4D - 1);
1137}
1138
1139#if CONFIG_PGTABLE_LEVELS > 4
1140static inline int pgd_present(pgd_t pgd)
1141{
1142 if (!pgtable_l5_enabled())
1143 return 1;
1144 return pgd_flags(pgd) & _PAGE_PRESENT;
1145}
1146
1147static inline unsigned long pgd_page_vaddr(pgd_t pgd)
1148{
1149 return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK);
1150}
1151
1152/*
1153 * Currently stuck as a macro due to indirect forward reference to
1154 * linux/mmzone.h's __section_mem_map_addr() definition:
1155 */
1156#define pgd_page(pgd) pfn_to_page(pgd_pfn(pgd))
1157
1158/* to find an entry in a page-table-directory. */
1159static inline p4d_t *p4d_offset(pgd_t *pgd, unsigned long address)
1160{
1161 if (!pgtable_l5_enabled())
1162 return (p4d_t *)pgd;
1163 return (p4d_t *)pgd_page_vaddr(pgd: *pgd) + p4d_index(address);
1164}
1165
1166static inline int pgd_bad(pgd_t pgd)
1167{
1168 unsigned long ignore_flags = _PAGE_USER;
1169
1170 if (!pgtable_l5_enabled())
1171 return 0;
1172
1173 if (IS_ENABLED(CONFIG_MITIGATION_PAGE_TABLE_ISOLATION))
1174 ignore_flags |= _PAGE_NX;
1175
1176 return (pgd_flags(pgd) & ~ignore_flags) != _KERNPG_TABLE;
1177}
1178
1179static inline int pgd_none(pgd_t pgd)
1180{
1181 if (!pgtable_l5_enabled())
1182 return 0;
1183 /*
1184 * There is no need to do a workaround for the KNL stray
1185 * A/D bit erratum here. PGDs only point to page tables
1186 * except on 32-bit non-PAE which is not supported on
1187 * KNL.
1188 */
1189 return !native_pgd_val(pgd);
1190}
1191#endif /* CONFIG_PGTABLE_LEVELS > 4 */
1192
1193#endif /* __ASSEMBLY__ */
1194
1195#define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET)
1196#define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY)
1197
1198#ifndef __ASSEMBLY__
1199
1200extern int direct_gbpages;
1201void init_mem_mapping(void);
1202void early_alloc_pgt_buf(void);
1203extern void memblock_find_dma_reserve(void);
1204void __init poking_init(void);
1205unsigned long init_memory_mapping(unsigned long start,
1206 unsigned long end, pgprot_t prot);
1207
1208#ifdef CONFIG_X86_64
1209extern pgd_t trampoline_pgd_entry;
1210#endif
1211
1212/* local pte updates need not use xchg for locking */
1213static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
1214{
1215 pte_t res = *ptep;
1216
1217 /* Pure native function needs no input for mm, addr */
1218 native_pte_clear(NULL, addr: 0, ptep);
1219 return res;
1220}
1221
1222static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp)
1223{
1224 pmd_t res = *pmdp;
1225
1226 native_pmd_clear(pmd: pmdp);
1227 return res;
1228}
1229
1230static inline pud_t native_local_pudp_get_and_clear(pud_t *pudp)
1231{
1232 pud_t res = *pudp;
1233
1234 native_pud_clear(pud: pudp);
1235 return res;
1236}
1237
1238static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
1239 pmd_t *pmdp, pmd_t pmd)
1240{
1241 page_table_check_pmd_set(mm, pmdp, pmd);
1242 set_pmd(pmdp, pmd);
1243}
1244
1245static inline void set_pud_at(struct mm_struct *mm, unsigned long addr,
1246 pud_t *pudp, pud_t pud)
1247{
1248 page_table_check_pud_set(mm, pudp, pud);
1249 native_set_pud(pudp, pud);
1250}
1251
1252/*
1253 * We only update the dirty/accessed state if we set
1254 * the dirty bit by hand in the kernel, since the hardware
1255 * will do the accessed bit for us, and we don't want to
1256 * race with other CPU's that might be updating the dirty
1257 * bit at the same time.
1258 */
1259struct vm_area_struct;
1260
1261#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
1262extern int ptep_set_access_flags(struct vm_area_struct *vma,
1263 unsigned long address, pte_t *ptep,
1264 pte_t entry, int dirty);
1265
1266#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
1267extern int ptep_test_and_clear_young(struct vm_area_struct *vma,
1268 unsigned long addr, pte_t *ptep);
1269
1270#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
1271extern int ptep_clear_flush_young(struct vm_area_struct *vma,
1272 unsigned long address, pte_t *ptep);
1273
1274#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
1275static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
1276 pte_t *ptep)
1277{
1278 pte_t pte = native_ptep_get_and_clear(xp: ptep);
1279 page_table_check_pte_clear(mm, pte);
1280 return pte;
1281}
1282
1283#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
1284static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
1285 unsigned long addr, pte_t *ptep,
1286 int full)
1287{
1288 pte_t pte;
1289 if (full) {
1290 /*
1291 * Full address destruction in progress; paravirt does not
1292 * care about updates and native needs no locking
1293 */
1294 pte = native_local_ptep_get_and_clear(ptep);
1295 page_table_check_pte_clear(mm, pte);
1296 } else {
1297 pte = ptep_get_and_clear(mm, addr, ptep);
1298 }
1299 return pte;
1300}
1301
1302#define __HAVE_ARCH_PTEP_SET_WRPROTECT
1303static inline void ptep_set_wrprotect(struct mm_struct *mm,
1304 unsigned long addr, pte_t *ptep)
1305{
1306 /*
1307 * Avoid accidentally creating shadow stack PTEs
1308 * (Write=0,Dirty=1). Use cmpxchg() to prevent races with
1309 * the hardware setting Dirty=1.
1310 */
1311 pte_t old_pte, new_pte;
1312
1313 old_pte = READ_ONCE(*ptep);
1314 do {
1315 new_pte = pte_wrprotect(pte: old_pte);
1316 } while (!try_cmpxchg((long *)&ptep->pte, (long *)&old_pte, *(long *)&new_pte));
1317}
1318
1319#define flush_tlb_fix_spurious_fault(vma, address, ptep) do { } while (0)
1320
1321#define mk_pmd(page, pgprot) pfn_pmd(page_to_pfn(page), (pgprot))
1322
1323#define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
1324extern int pmdp_set_access_flags(struct vm_area_struct *vma,
1325 unsigned long address, pmd_t *pmdp,
1326 pmd_t entry, int dirty);
1327extern int pudp_set_access_flags(struct vm_area_struct *vma,
1328 unsigned long address, pud_t *pudp,
1329 pud_t entry, int dirty);
1330
1331#define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
1332extern int pmdp_test_and_clear_young(struct vm_area_struct *vma,
1333 unsigned long addr, pmd_t *pmdp);
1334extern int pudp_test_and_clear_young(struct vm_area_struct *vma,
1335 unsigned long addr, pud_t *pudp);
1336
1337#define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
1338extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
1339 unsigned long address, pmd_t *pmdp);
1340
1341
1342#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
1343static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, unsigned long addr,
1344 pmd_t *pmdp)
1345{
1346 pmd_t pmd = native_pmdp_get_and_clear(xp: pmdp);
1347
1348 page_table_check_pmd_clear(mm, pmd);
1349
1350 return pmd;
1351}
1352
1353#define __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR
1354static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm,
1355 unsigned long addr, pud_t *pudp)
1356{
1357 pud_t pud = native_pudp_get_and_clear(xp: pudp);
1358
1359 page_table_check_pud_clear(mm, pud);
1360
1361 return pud;
1362}
1363
1364#define __HAVE_ARCH_PMDP_SET_WRPROTECT
1365static inline void pmdp_set_wrprotect(struct mm_struct *mm,
1366 unsigned long addr, pmd_t *pmdp)
1367{
1368 /*
1369 * Avoid accidentally creating shadow stack PTEs
1370 * (Write=0,Dirty=1). Use cmpxchg() to prevent races with
1371 * the hardware setting Dirty=1.
1372 */
1373 pmd_t old_pmd, new_pmd;
1374
1375 old_pmd = READ_ONCE(*pmdp);
1376 do {
1377 new_pmd = pmd_wrprotect(pmd: old_pmd);
1378 } while (!try_cmpxchg((long *)pmdp, (long *)&old_pmd, *(long *)&new_pmd));
1379}
1380
1381#ifndef pmdp_establish
1382#define pmdp_establish pmdp_establish
1383static inline pmd_t pmdp_establish(struct vm_area_struct *vma,
1384 unsigned long address, pmd_t *pmdp, pmd_t pmd)
1385{
1386 page_table_check_pmd_set(mm: vma->vm_mm, pmdp, pmd);
1387 if (IS_ENABLED(CONFIG_SMP)) {
1388 return xchg(pmdp, pmd);
1389 } else {
1390 pmd_t old = *pmdp;
1391 WRITE_ONCE(*pmdp, pmd);
1392 return old;
1393 }
1394}
1395#endif
1396
1397#define __HAVE_ARCH_PMDP_INVALIDATE_AD
1398extern pmd_t pmdp_invalidate_ad(struct vm_area_struct *vma,
1399 unsigned long address, pmd_t *pmdp);
1400
1401/*
1402 * Page table pages are page-aligned. The lower half of the top
1403 * level is used for userspace and the top half for the kernel.
1404 *
1405 * Returns true for parts of the PGD that map userspace and
1406 * false for the parts that map the kernel.
1407 */
1408static inline bool pgdp_maps_userspace(void *__ptr)
1409{
1410 unsigned long ptr = (unsigned long)__ptr;
1411
1412 return (((ptr & ~PAGE_MASK) / sizeof(pgd_t)) < PGD_KERNEL_START);
1413}
1414
1415#define pgd_leaf pgd_leaf
1416static inline bool pgd_leaf(pgd_t pgd) { return false; }
1417
1418#ifdef CONFIG_MITIGATION_PAGE_TABLE_ISOLATION
1419/*
1420 * All top-level MITIGATION_PAGE_TABLE_ISOLATION page tables are order-1 pages
1421 * (8k-aligned and 8k in size). The kernel one is at the beginning 4k and
1422 * the user one is in the last 4k. To switch between them, you
1423 * just need to flip the 12th bit in their addresses.
1424 */
1425#define PTI_PGTABLE_SWITCH_BIT PAGE_SHIFT
1426
1427/*
1428 * This generates better code than the inline assembly in
1429 * __set_bit().
1430 */
1431static inline void *ptr_set_bit(void *ptr, int bit)
1432{
1433 unsigned long __ptr = (unsigned long)ptr;
1434
1435 __ptr |= BIT(bit);
1436 return (void *)__ptr;
1437}
1438static inline void *ptr_clear_bit(void *ptr, int bit)
1439{
1440 unsigned long __ptr = (unsigned long)ptr;
1441
1442 __ptr &= ~BIT(bit);
1443 return (void *)__ptr;
1444}
1445
1446static inline pgd_t *kernel_to_user_pgdp(pgd_t *pgdp)
1447{
1448 return ptr_set_bit(ptr: pgdp, PTI_PGTABLE_SWITCH_BIT);
1449}
1450
1451static inline pgd_t *user_to_kernel_pgdp(pgd_t *pgdp)
1452{
1453 return ptr_clear_bit(ptr: pgdp, PTI_PGTABLE_SWITCH_BIT);
1454}
1455
1456static inline p4d_t *kernel_to_user_p4dp(p4d_t *p4dp)
1457{
1458 return ptr_set_bit(ptr: p4dp, PTI_PGTABLE_SWITCH_BIT);
1459}
1460
1461static inline p4d_t *user_to_kernel_p4dp(p4d_t *p4dp)
1462{
1463 return ptr_clear_bit(ptr: p4dp, PTI_PGTABLE_SWITCH_BIT);
1464}
1465#endif /* CONFIG_MITIGATION_PAGE_TABLE_ISOLATION */
1466
1467/*
1468 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
1469 *
1470 * dst - pointer to pgd range anywhere on a pgd page
1471 * src - ""
1472 * count - the number of pgds to copy.
1473 *
1474 * dst and src can be on the same page, but the range must not overlap,
1475 * and must not cross a page boundary.
1476 */
1477static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
1478{
1479 memcpy(dst, src, count * sizeof(pgd_t));
1480#ifdef CONFIG_MITIGATION_PAGE_TABLE_ISOLATION
1481 if (!static_cpu_has(X86_FEATURE_PTI))
1482 return;
1483 /* Clone the user space pgd as well */
1484 memcpy(kernel_to_user_pgdp(dst), kernel_to_user_pgdp(src),
1485 count * sizeof(pgd_t));
1486#endif
1487}
1488
1489#define PTE_SHIFT ilog2(PTRS_PER_PTE)
1490static inline int page_level_shift(enum pg_level level)
1491{
1492 return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT;
1493}
1494static inline unsigned long page_level_size(enum pg_level level)
1495{
1496 return 1UL << page_level_shift(level);
1497}
1498static inline unsigned long page_level_mask(enum pg_level level)
1499{
1500 return ~(page_level_size(level) - 1);
1501}
1502
1503/*
1504 * The x86 doesn't have any external MMU info: the kernel page
1505 * tables contain all the necessary information.
1506 */
1507static inline void update_mmu_cache(struct vm_area_struct *vma,
1508 unsigned long addr, pte_t *ptep)
1509{
1510}
1511static inline void update_mmu_cache_range(struct vm_fault *vmf,
1512 struct vm_area_struct *vma, unsigned long addr,
1513 pte_t *ptep, unsigned int nr)
1514{
1515}
1516static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
1517 unsigned long addr, pmd_t *pmd)
1518{
1519}
1520static inline void update_mmu_cache_pud(struct vm_area_struct *vma,
1521 unsigned long addr, pud_t *pud)
1522{
1523}
1524static inline pte_t pte_swp_mkexclusive(pte_t pte)
1525{
1526 return pte_set_flags(pte, _PAGE_SWP_EXCLUSIVE);
1527}
1528
1529static inline int pte_swp_exclusive(pte_t pte)
1530{
1531 return pte_flags(pte) & _PAGE_SWP_EXCLUSIVE;
1532}
1533
1534static inline pte_t pte_swp_clear_exclusive(pte_t pte)
1535{
1536 return pte_clear_flags(pte, _PAGE_SWP_EXCLUSIVE);
1537}
1538
1539#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
1540static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
1541{
1542 return pte_set_flags(pte, _PAGE_SWP_SOFT_DIRTY);
1543}
1544
1545static inline int pte_swp_soft_dirty(pte_t pte)
1546{
1547 return pte_flags(pte) & _PAGE_SWP_SOFT_DIRTY;
1548}
1549
1550static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
1551{
1552 return pte_clear_flags(pte, _PAGE_SWP_SOFT_DIRTY);
1553}
1554
1555#ifdef CONFIG_ARCH_ENABLE_THP_MIGRATION
1556static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
1557{
1558 return pmd_set_flags(pmd, _PAGE_SWP_SOFT_DIRTY);
1559}
1560
1561static inline int pmd_swp_soft_dirty(pmd_t pmd)
1562{
1563 return pmd_flags(pmd) & _PAGE_SWP_SOFT_DIRTY;
1564}
1565
1566static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
1567{
1568 return pmd_clear_flags(pmd, _PAGE_SWP_SOFT_DIRTY);
1569}
1570#endif
1571#endif
1572
1573#ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP
1574static inline pte_t pte_swp_mkuffd_wp(pte_t pte)
1575{
1576 return pte_set_flags(pte, _PAGE_SWP_UFFD_WP);
1577}
1578
1579static inline int pte_swp_uffd_wp(pte_t pte)
1580{
1581 return pte_flags(pte) & _PAGE_SWP_UFFD_WP;
1582}
1583
1584static inline pte_t pte_swp_clear_uffd_wp(pte_t pte)
1585{
1586 return pte_clear_flags(pte, _PAGE_SWP_UFFD_WP);
1587}
1588
1589static inline pmd_t pmd_swp_mkuffd_wp(pmd_t pmd)
1590{
1591 return pmd_set_flags(pmd, _PAGE_SWP_UFFD_WP);
1592}
1593
1594static inline int pmd_swp_uffd_wp(pmd_t pmd)
1595{
1596 return pmd_flags(pmd) & _PAGE_SWP_UFFD_WP;
1597}
1598
1599static inline pmd_t pmd_swp_clear_uffd_wp(pmd_t pmd)
1600{
1601 return pmd_clear_flags(pmd, _PAGE_SWP_UFFD_WP);
1602}
1603#endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */
1604
1605static inline u16 pte_flags_pkey(unsigned long pte_flags)
1606{
1607#ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
1608 /* ifdef to avoid doing 59-bit shift on 32-bit values */
1609 return (pte_flags & _PAGE_PKEY_MASK) >> _PAGE_BIT_PKEY_BIT0;
1610#else
1611 return 0;
1612#endif
1613}
1614
1615static inline bool __pkru_allows_pkey(u16 pkey, bool write)
1616{
1617 u32 pkru = read_pkru();
1618
1619 if (!__pkru_allows_read(pkru, pkey))
1620 return false;
1621 if (write && !__pkru_allows_write(pkru, pkey))
1622 return false;
1623
1624 return true;
1625}
1626
1627/*
1628 * 'pteval' can come from a PTE, PMD or PUD. We only check
1629 * _PAGE_PRESENT, _PAGE_USER, and _PAGE_RW in here which are the
1630 * same value on all 3 types.
1631 */
1632static inline bool __pte_access_permitted(unsigned long pteval, bool write)
1633{
1634 unsigned long need_pte_bits = _PAGE_PRESENT|_PAGE_USER;
1635
1636 /*
1637 * Write=0,Dirty=1 PTEs are shadow stack, which the kernel
1638 * shouldn't generally allow access to, but since they
1639 * are already Write=0, the below logic covers both cases.
1640 */
1641 if (write)
1642 need_pte_bits |= _PAGE_RW;
1643
1644 if ((pteval & need_pte_bits) != need_pte_bits)
1645 return 0;
1646
1647 return __pkru_allows_pkey(pkey: pte_flags_pkey(pte_flags: pteval), write);
1648}
1649
1650#define pte_access_permitted pte_access_permitted
1651static inline bool pte_access_permitted(pte_t pte, bool write)
1652{
1653 return __pte_access_permitted(pteval: pte_val(pte), write);
1654}
1655
1656#define pmd_access_permitted pmd_access_permitted
1657static inline bool pmd_access_permitted(pmd_t pmd, bool write)
1658{
1659 return __pte_access_permitted(pteval: pmd_val(pmd), write);
1660}
1661
1662#define pud_access_permitted pud_access_permitted
1663static inline bool pud_access_permitted(pud_t pud, bool write)
1664{
1665 return __pte_access_permitted(pteval: pud_val(pud), write);
1666}
1667
1668#define __HAVE_ARCH_PFN_MODIFY_ALLOWED 1
1669extern bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot);
1670
1671static inline bool arch_has_pfn_modify_check(void)
1672{
1673 return boot_cpu_has_bug(X86_BUG_L1TF);
1674}
1675
1676#define arch_check_zapped_pte arch_check_zapped_pte
1677void arch_check_zapped_pte(struct vm_area_struct *vma, pte_t pte);
1678
1679#define arch_check_zapped_pmd arch_check_zapped_pmd
1680void arch_check_zapped_pmd(struct vm_area_struct *vma, pmd_t pmd);
1681
1682#ifdef CONFIG_XEN_PV
1683#define arch_has_hw_nonleaf_pmd_young arch_has_hw_nonleaf_pmd_young
1684static inline bool arch_has_hw_nonleaf_pmd_young(void)
1685{
1686 return !cpu_feature_enabled(X86_FEATURE_XENPV);
1687}
1688#endif
1689
1690#ifdef CONFIG_PAGE_TABLE_CHECK
1691static inline bool pte_user_accessible_page(pte_t pte)
1692{
1693 return (pte_val(pte) & _PAGE_PRESENT) && (pte_val(pte) & _PAGE_USER);
1694}
1695
1696static inline bool pmd_user_accessible_page(pmd_t pmd)
1697{
1698 return pmd_leaf(pte: pmd) && (pmd_val(pmd) & _PAGE_PRESENT) && (pmd_val(pmd) & _PAGE_USER);
1699}
1700
1701static inline bool pud_user_accessible_page(pud_t pud)
1702{
1703 return pud_leaf(pud) && (pud_val(pud) & _PAGE_PRESENT) && (pud_val(pud) & _PAGE_USER);
1704}
1705#endif
1706
1707#ifdef CONFIG_X86_SGX
1708int arch_memory_failure(unsigned long pfn, int flags);
1709#define arch_memory_failure arch_memory_failure
1710
1711bool arch_is_platform_page(u64 paddr);
1712#define arch_is_platform_page arch_is_platform_page
1713#endif
1714
1715#endif /* __ASSEMBLY__ */
1716
1717#endif /* _ASM_X86_PGTABLE_H */
1718

source code of linux/arch/x86/include/asm/pgtable.h