1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ASM_X86_PGTABLE_H
3#define _ASM_X86_PGTABLE_H
4
5#include <linux/mem_encrypt.h>
6#include <asm/page.h>
7#include <asm/pgtable_types.h>
8
9/*
10 * Macro to mark a page protection value as UC-
11 */
12#define pgprot_noncached(prot) \
13 ((boot_cpu_data.x86 > 3) \
14 ? (__pgprot(pgprot_val(prot) | \
15 cachemode2protval(_PAGE_CACHE_MODE_UC_MINUS))) \
16 : (prot))
17
18#ifndef __ASSEMBLER__
19#include <linux/spinlock.h>
20#include <asm/x86_init.h>
21#include <asm/pkru.h>
22#include <asm/fpu/api.h>
23#include <asm/coco.h>
24#include <asm-generic/pgtable_uffd.h>
25#include <linux/page_table_check.h>
26
27extern pgd_t early_top_pgt[PTRS_PER_PGD];
28bool __init __early_make_pgtable(unsigned long address, pmdval_t pmd);
29
30struct seq_file;
31void ptdump_walk_pgd_level(struct seq_file *m, struct mm_struct *mm);
32void ptdump_walk_pgd_level_debugfs(struct seq_file *m, struct mm_struct *mm,
33 bool user);
34bool ptdump_walk_pgd_level_checkwx(void);
35#define ptdump_check_wx ptdump_walk_pgd_level_checkwx
36void ptdump_walk_user_pgd_level_checkwx(void);
37
38/*
39 * Macros to add or remove encryption attribute
40 */
41#define pgprot_encrypted(prot) __pgprot(cc_mkenc(pgprot_val(prot)))
42#define pgprot_decrypted(prot) __pgprot(cc_mkdec(pgprot_val(prot)))
43
44#ifdef CONFIG_DEBUG_WX
45#define debug_checkwx_user() ptdump_walk_user_pgd_level_checkwx()
46#else
47#define debug_checkwx_user() do { } while (0)
48#endif
49
50/*
51 * ZERO_PAGE is a global shared page that is always zero: used
52 * for zero-mapped memory areas etc..
53 */
54extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
55 __visible;
56#define ZERO_PAGE(vaddr) ((void)(vaddr),virt_to_page(empty_zero_page))
57
58extern spinlock_t pgd_lock;
59extern struct list_head pgd_list;
60
61extern struct mm_struct *pgd_page_get_mm(struct page *page);
62
63extern pmdval_t early_pmd_flags;
64
65#ifdef CONFIG_PARAVIRT_XXL
66#include <asm/paravirt.h>
67#else /* !CONFIG_PARAVIRT_XXL */
68#define set_pte(ptep, pte) native_set_pte(ptep, pte)
69
70#define set_pte_atomic(ptep, pte) \
71 native_set_pte_atomic(ptep, pte)
72
73#define set_pmd(pmdp, pmd) native_set_pmd(pmdp, pmd)
74
75#ifndef __PAGETABLE_P4D_FOLDED
76#define set_pgd(pgdp, pgd) native_set_pgd(pgdp, pgd)
77#define pgd_clear(pgd) (pgtable_l5_enabled() ? native_pgd_clear(pgd) : 0)
78#endif
79
80#ifndef set_p4d
81# define set_p4d(p4dp, p4d) native_set_p4d(p4dp, p4d)
82#endif
83
84#ifndef __PAGETABLE_PUD_FOLDED
85#define p4d_clear(p4d) native_p4d_clear(p4d)
86#endif
87
88#ifndef set_pud
89# define set_pud(pudp, pud) native_set_pud(pudp, pud)
90#endif
91
92#ifndef __PAGETABLE_PUD_FOLDED
93#define pud_clear(pud) native_pud_clear(pud)
94#endif
95
96#define pte_clear(mm, addr, ptep) native_pte_clear(mm, addr, ptep)
97#define pmd_clear(pmd) native_pmd_clear(pmd)
98
99#define pgd_val(x) native_pgd_val(x)
100#define __pgd(x) native_make_pgd(x)
101
102#ifndef __PAGETABLE_P4D_FOLDED
103#define p4d_val(x) native_p4d_val(x)
104#define __p4d(x) native_make_p4d(x)
105#endif
106
107#ifndef __PAGETABLE_PUD_FOLDED
108#define pud_val(x) native_pud_val(x)
109#define __pud(x) native_make_pud(x)
110#endif
111
112#ifndef __PAGETABLE_PMD_FOLDED
113#define pmd_val(x) native_pmd_val(x)
114#define __pmd(x) native_make_pmd(x)
115#endif
116
117#define pte_val(x) native_pte_val(x)
118#define __pte(x) native_make_pte(x)
119
120#define arch_end_context_switch(prev) do {} while(0)
121#endif /* CONFIG_PARAVIRT_XXL */
122
123static inline pmd_t pmd_set_flags(pmd_t pmd, pmdval_t set)
124{
125 pmdval_t v = native_pmd_val(pmd);
126
127 return native_make_pmd(val: v | set);
128}
129
130static inline pmd_t pmd_clear_flags(pmd_t pmd, pmdval_t clear)
131{
132 pmdval_t v = native_pmd_val(pmd);
133
134 return native_make_pmd(val: v & ~clear);
135}
136
137static inline pud_t pud_set_flags(pud_t pud, pudval_t set)
138{
139 pudval_t v = native_pud_val(pud);
140
141 return native_make_pud(val: v | set);
142}
143
144static inline pud_t pud_clear_flags(pud_t pud, pudval_t clear)
145{
146 pudval_t v = native_pud_val(pud);
147
148 return native_make_pud(val: v & ~clear);
149}
150
151/*
152 * The following only work if pte_present() is true.
153 * Undefined behaviour if not..
154 */
155static inline bool pte_dirty(pte_t pte)
156{
157 return pte_flags(pte) & _PAGE_DIRTY_BITS;
158}
159
160static inline bool pte_shstk(pte_t pte)
161{
162 return cpu_feature_enabled(X86_FEATURE_SHSTK) &&
163 (pte_flags(pte) & (_PAGE_RW | _PAGE_DIRTY)) == _PAGE_DIRTY;
164}
165
166static inline int pte_young(pte_t pte)
167{
168 return pte_flags(pte) & _PAGE_ACCESSED;
169}
170
171static inline bool pte_decrypted(pte_t pte)
172{
173 return cc_mkdec(val: pte_val(pte)) == pte_val(pte);
174}
175
176#define pmd_dirty pmd_dirty
177static inline bool pmd_dirty(pmd_t pmd)
178{
179 return pmd_flags(pmd) & _PAGE_DIRTY_BITS;
180}
181
182static inline bool pmd_shstk(pmd_t pmd)
183{
184 return cpu_feature_enabled(X86_FEATURE_SHSTK) &&
185 (pmd_flags(pmd) & (_PAGE_RW | _PAGE_DIRTY | _PAGE_PSE)) ==
186 (_PAGE_DIRTY | _PAGE_PSE);
187}
188
189#define pmd_young pmd_young
190static inline int pmd_young(pmd_t pmd)
191{
192 return pmd_flags(pmd) & _PAGE_ACCESSED;
193}
194
195static inline bool pud_dirty(pud_t pud)
196{
197 return pud_flags(pud) & _PAGE_DIRTY_BITS;
198}
199
200static inline int pud_young(pud_t pud)
201{
202 return pud_flags(pud) & _PAGE_ACCESSED;
203}
204
205static inline bool pud_shstk(pud_t pud)
206{
207 return cpu_feature_enabled(X86_FEATURE_SHSTK) &&
208 (pud_flags(pud) & (_PAGE_RW | _PAGE_DIRTY | _PAGE_PSE)) ==
209 (_PAGE_DIRTY | _PAGE_PSE);
210}
211
212static inline int pte_write(pte_t pte)
213{
214 /*
215 * Shadow stack pages are logically writable, but do not have
216 * _PAGE_RW. Check for them separately from _PAGE_RW itself.
217 */
218 return (pte_flags(pte) & _PAGE_RW) || pte_shstk(pte);
219}
220
221#define pmd_write pmd_write
222static inline int pmd_write(pmd_t pmd)
223{
224 /*
225 * Shadow stack pages are logically writable, but do not have
226 * _PAGE_RW. Check for them separately from _PAGE_RW itself.
227 */
228 return (pmd_flags(pmd) & _PAGE_RW) || pmd_shstk(pmd);
229}
230
231#define pud_write pud_write
232static inline int pud_write(pud_t pud)
233{
234 return pud_flags(pud) & _PAGE_RW;
235}
236
237static inline int pte_huge(pte_t pte)
238{
239 return pte_flags(pte) & _PAGE_PSE;
240}
241
242static inline int pte_global(pte_t pte)
243{
244 return pte_flags(pte) & _PAGE_GLOBAL;
245}
246
247static inline int pte_exec(pte_t pte)
248{
249 return !(pte_flags(pte) & _PAGE_NX);
250}
251
252static inline int pte_special(pte_t pte)
253{
254 return pte_flags(pte) & _PAGE_SPECIAL;
255}
256
257/* Entries that were set to PROT_NONE are inverted */
258
259static inline u64 protnone_mask(u64 val);
260
261#define PFN_PTE_SHIFT PAGE_SHIFT
262
263static inline unsigned long pte_pfn(pte_t pte)
264{
265 phys_addr_t pfn = pte_val(pte);
266 pfn ^= protnone_mask(val: pfn);
267 return (pfn & PTE_PFN_MASK) >> PAGE_SHIFT;
268}
269
270static inline unsigned long pmd_pfn(pmd_t pmd)
271{
272 phys_addr_t pfn = pmd_val(pmd);
273 pfn ^= protnone_mask(val: pfn);
274 return (pfn & pmd_pfn_mask(pmd)) >> PAGE_SHIFT;
275}
276
277#define pud_pfn pud_pfn
278static inline unsigned long pud_pfn(pud_t pud)
279{
280 phys_addr_t pfn = pud_val(pud);
281 pfn ^= protnone_mask(val: pfn);
282 return (pfn & pud_pfn_mask(pud)) >> PAGE_SHIFT;
283}
284
285static inline unsigned long p4d_pfn(p4d_t p4d)
286{
287 return (p4d_val(p4d) & p4d_pfn_mask(p4d)) >> PAGE_SHIFT;
288}
289
290static inline unsigned long pgd_pfn(pgd_t pgd)
291{
292 return (pgd_val(pgd) & PTE_PFN_MASK) >> PAGE_SHIFT;
293}
294
295#define pte_page(pte) pfn_to_page(pte_pfn(pte))
296
297#define pmd_leaf pmd_leaf
298static inline bool pmd_leaf(pmd_t pte)
299{
300 return pmd_flags(pmd: pte) & _PAGE_PSE;
301}
302
303#ifdef CONFIG_TRANSPARENT_HUGEPAGE
304/* NOTE: when predicate huge page, consider also pmd_devmap, or use pmd_leaf */
305static inline int pmd_trans_huge(pmd_t pmd)
306{
307 return (pmd_val(pmd) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE;
308}
309
310#ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
311static inline int pud_trans_huge(pud_t pud)
312{
313 return (pud_val(pud) & (_PAGE_PSE|_PAGE_DEVMAP)) == _PAGE_PSE;
314}
315#endif
316
317#define has_transparent_hugepage has_transparent_hugepage
318static inline int has_transparent_hugepage(void)
319{
320 return boot_cpu_has(X86_FEATURE_PSE);
321}
322
323#ifdef CONFIG_ARCH_HAS_PTE_DEVMAP
324static inline int pmd_devmap(pmd_t pmd)
325{
326 return !!(pmd_val(pmd) & _PAGE_DEVMAP);
327}
328
329#ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
330static inline int pud_devmap(pud_t pud)
331{
332 return !!(pud_val(pud) & _PAGE_DEVMAP);
333}
334#else
335static inline int pud_devmap(pud_t pud)
336{
337 return 0;
338}
339#endif
340
341#ifdef CONFIG_ARCH_SUPPORTS_PMD_PFNMAP
342static inline bool pmd_special(pmd_t pmd)
343{
344 return pmd_flags(pmd) & _PAGE_SPECIAL;
345}
346
347static inline pmd_t pmd_mkspecial(pmd_t pmd)
348{
349 return pmd_set_flags(pmd, _PAGE_SPECIAL);
350}
351#endif /* CONFIG_ARCH_SUPPORTS_PMD_PFNMAP */
352
353#ifdef CONFIG_ARCH_SUPPORTS_PUD_PFNMAP
354static inline bool pud_special(pud_t pud)
355{
356 return pud_flags(pud) & _PAGE_SPECIAL;
357}
358
359static inline pud_t pud_mkspecial(pud_t pud)
360{
361 return pud_set_flags(pud, _PAGE_SPECIAL);
362}
363#endif /* CONFIG_ARCH_SUPPORTS_PUD_PFNMAP */
364
365static inline int pgd_devmap(pgd_t pgd)
366{
367 return 0;
368}
369#endif
370#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
371
372static inline pte_t pte_set_flags(pte_t pte, pteval_t set)
373{
374 pteval_t v = native_pte_val(pte);
375
376 return native_make_pte(val: v | set);
377}
378
379static inline pte_t pte_clear_flags(pte_t pte, pteval_t clear)
380{
381 pteval_t v = native_pte_val(pte);
382
383 return native_make_pte(val: v & ~clear);
384}
385
386/*
387 * Write protection operations can result in Dirty=1,Write=0 PTEs. But in the
388 * case of X86_FEATURE_USER_SHSTK, these PTEs denote shadow stack memory. So
389 * when creating dirty, write-protected memory, a software bit is used:
390 * _PAGE_BIT_SAVED_DIRTY. The following functions take a PTE and transition the
391 * Dirty bit to SavedDirty, and vice-vesra.
392 *
393 * This shifting is only done if needed. In the case of shifting
394 * Dirty->SavedDirty, the condition is if the PTE is Write=0. In the case of
395 * shifting SavedDirty->Dirty, the condition is Write=1.
396 */
397static inline pgprotval_t mksaveddirty_shift(pgprotval_t v)
398{
399 pgprotval_t cond = (~v >> _PAGE_BIT_RW) & 1;
400
401 v |= ((v >> _PAGE_BIT_DIRTY) & cond) << _PAGE_BIT_SAVED_DIRTY;
402 v &= ~(cond << _PAGE_BIT_DIRTY);
403
404 return v;
405}
406
407static inline pgprotval_t clear_saveddirty_shift(pgprotval_t v)
408{
409 pgprotval_t cond = (v >> _PAGE_BIT_RW) & 1;
410
411 v |= ((v >> _PAGE_BIT_SAVED_DIRTY) & cond) << _PAGE_BIT_DIRTY;
412 v &= ~(cond << _PAGE_BIT_SAVED_DIRTY);
413
414 return v;
415}
416
417static inline pte_t pte_mksaveddirty(pte_t pte)
418{
419 pteval_t v = native_pte_val(pte);
420
421 v = mksaveddirty_shift(v);
422 return native_make_pte(val: v);
423}
424
425static inline pte_t pte_clear_saveddirty(pte_t pte)
426{
427 pteval_t v = native_pte_val(pte);
428
429 v = clear_saveddirty_shift(v);
430 return native_make_pte(val: v);
431}
432
433static inline pte_t pte_wrprotect(pte_t pte)
434{
435 pte = pte_clear_flags(pte, _PAGE_RW);
436
437 /*
438 * Blindly clearing _PAGE_RW might accidentally create
439 * a shadow stack PTE (Write=0,Dirty=1). Move the hardware
440 * dirty value to the software bit, if present.
441 */
442 return pte_mksaveddirty(pte);
443}
444
445#ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP
446static inline int pte_uffd_wp(pte_t pte)
447{
448 return pte_flags(pte) & _PAGE_UFFD_WP;
449}
450
451static inline pte_t pte_mkuffd_wp(pte_t pte)
452{
453 return pte_wrprotect(pte: pte_set_flags(pte, _PAGE_UFFD_WP));
454}
455
456static inline pte_t pte_clear_uffd_wp(pte_t pte)
457{
458 return pte_clear_flags(pte, _PAGE_UFFD_WP);
459}
460#endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */
461
462static inline pte_t pte_mkclean(pte_t pte)
463{
464 return pte_clear_flags(pte, _PAGE_DIRTY_BITS);
465}
466
467static inline pte_t pte_mkold(pte_t pte)
468{
469 return pte_clear_flags(pte, _PAGE_ACCESSED);
470}
471
472static inline pte_t pte_mkexec(pte_t pte)
473{
474 return pte_clear_flags(pte, _PAGE_NX);
475}
476
477static inline pte_t pte_mkdirty(pte_t pte)
478{
479 pte = pte_set_flags(pte, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
480
481 return pte_mksaveddirty(pte);
482}
483
484static inline pte_t pte_mkwrite_shstk(pte_t pte)
485{
486 pte = pte_clear_flags(pte, _PAGE_RW);
487
488 return pte_set_flags(pte, _PAGE_DIRTY);
489}
490
491static inline pte_t pte_mkyoung(pte_t pte)
492{
493 return pte_set_flags(pte, _PAGE_ACCESSED);
494}
495
496static inline pte_t pte_mkwrite_novma(pte_t pte)
497{
498 return pte_set_flags(pte, _PAGE_RW);
499}
500
501struct vm_area_struct;
502pte_t pte_mkwrite(pte_t pte, struct vm_area_struct *vma);
503#define pte_mkwrite pte_mkwrite
504
505static inline pte_t pte_mkhuge(pte_t pte)
506{
507 return pte_set_flags(pte, _PAGE_PSE);
508}
509
510static inline pte_t pte_clrhuge(pte_t pte)
511{
512 return pte_clear_flags(pte, _PAGE_PSE);
513}
514
515static inline pte_t pte_mkglobal(pte_t pte)
516{
517 return pte_set_flags(pte, _PAGE_GLOBAL);
518}
519
520static inline pte_t pte_clrglobal(pte_t pte)
521{
522 return pte_clear_flags(pte, _PAGE_GLOBAL);
523}
524
525static inline pte_t pte_mkspecial(pte_t pte)
526{
527 return pte_set_flags(pte, _PAGE_SPECIAL);
528}
529
530static inline pte_t pte_mkdevmap(pte_t pte)
531{
532 return pte_set_flags(pte, _PAGE_SPECIAL|_PAGE_DEVMAP);
533}
534
535/* See comments above mksaveddirty_shift() */
536static inline pmd_t pmd_mksaveddirty(pmd_t pmd)
537{
538 pmdval_t v = native_pmd_val(pmd);
539
540 v = mksaveddirty_shift(v);
541 return native_make_pmd(val: v);
542}
543
544/* See comments above mksaveddirty_shift() */
545static inline pmd_t pmd_clear_saveddirty(pmd_t pmd)
546{
547 pmdval_t v = native_pmd_val(pmd);
548
549 v = clear_saveddirty_shift(v);
550 return native_make_pmd(val: v);
551}
552
553static inline pmd_t pmd_wrprotect(pmd_t pmd)
554{
555 pmd = pmd_clear_flags(pmd, _PAGE_RW);
556
557 /*
558 * Blindly clearing _PAGE_RW might accidentally create
559 * a shadow stack PMD (RW=0, Dirty=1). Move the hardware
560 * dirty value to the software bit.
561 */
562 return pmd_mksaveddirty(pmd);
563}
564
565#ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP
566static inline int pmd_uffd_wp(pmd_t pmd)
567{
568 return pmd_flags(pmd) & _PAGE_UFFD_WP;
569}
570
571static inline pmd_t pmd_mkuffd_wp(pmd_t pmd)
572{
573 return pmd_wrprotect(pmd: pmd_set_flags(pmd, _PAGE_UFFD_WP));
574}
575
576static inline pmd_t pmd_clear_uffd_wp(pmd_t pmd)
577{
578 return pmd_clear_flags(pmd, _PAGE_UFFD_WP);
579}
580#endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */
581
582static inline pmd_t pmd_mkold(pmd_t pmd)
583{
584 return pmd_clear_flags(pmd, _PAGE_ACCESSED);
585}
586
587static inline pmd_t pmd_mkclean(pmd_t pmd)
588{
589 return pmd_clear_flags(pmd, _PAGE_DIRTY_BITS);
590}
591
592static inline pmd_t pmd_mkdirty(pmd_t pmd)
593{
594 pmd = pmd_set_flags(pmd, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
595
596 return pmd_mksaveddirty(pmd);
597}
598
599static inline pmd_t pmd_mkwrite_shstk(pmd_t pmd)
600{
601 pmd = pmd_clear_flags(pmd, _PAGE_RW);
602
603 return pmd_set_flags(pmd, _PAGE_DIRTY);
604}
605
606static inline pmd_t pmd_mkdevmap(pmd_t pmd)
607{
608 return pmd_set_flags(pmd, _PAGE_DEVMAP);
609}
610
611static inline pmd_t pmd_mkhuge(pmd_t pmd)
612{
613 return pmd_set_flags(pmd, _PAGE_PSE);
614}
615
616static inline pmd_t pmd_mkyoung(pmd_t pmd)
617{
618 return pmd_set_flags(pmd, _PAGE_ACCESSED);
619}
620
621static inline pmd_t pmd_mkwrite_novma(pmd_t pmd)
622{
623 return pmd_set_flags(pmd, _PAGE_RW);
624}
625
626pmd_t pmd_mkwrite(pmd_t pmd, struct vm_area_struct *vma);
627#define pmd_mkwrite pmd_mkwrite
628
629/* See comments above mksaveddirty_shift() */
630static inline pud_t pud_mksaveddirty(pud_t pud)
631{
632 pudval_t v = native_pud_val(pud);
633
634 v = mksaveddirty_shift(v);
635 return native_make_pud(val: v);
636}
637
638/* See comments above mksaveddirty_shift() */
639static inline pud_t pud_clear_saveddirty(pud_t pud)
640{
641 pudval_t v = native_pud_val(pud);
642
643 v = clear_saveddirty_shift(v);
644 return native_make_pud(val: v);
645}
646
647static inline pud_t pud_mkold(pud_t pud)
648{
649 return pud_clear_flags(pud, _PAGE_ACCESSED);
650}
651
652static inline pud_t pud_mkclean(pud_t pud)
653{
654 return pud_clear_flags(pud, _PAGE_DIRTY_BITS);
655}
656
657static inline pud_t pud_wrprotect(pud_t pud)
658{
659 pud = pud_clear_flags(pud, _PAGE_RW);
660
661 /*
662 * Blindly clearing _PAGE_RW might accidentally create
663 * a shadow stack PUD (RW=0, Dirty=1). Move the hardware
664 * dirty value to the software bit.
665 */
666 return pud_mksaveddirty(pud);
667}
668
669static inline pud_t pud_mkdirty(pud_t pud)
670{
671 pud = pud_set_flags(pud, _PAGE_DIRTY | _PAGE_SOFT_DIRTY);
672
673 return pud_mksaveddirty(pud);
674}
675
676static inline pud_t pud_mkdevmap(pud_t pud)
677{
678 return pud_set_flags(pud, _PAGE_DEVMAP);
679}
680
681static inline pud_t pud_mkhuge(pud_t pud)
682{
683 return pud_set_flags(pud, _PAGE_PSE);
684}
685
686static inline pud_t pud_mkyoung(pud_t pud)
687{
688 return pud_set_flags(pud, _PAGE_ACCESSED);
689}
690
691static inline pud_t pud_mkwrite(pud_t pud)
692{
693 pud = pud_set_flags(pud, _PAGE_RW);
694
695 return pud_clear_saveddirty(pud);
696}
697
698#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
699static inline int pte_soft_dirty(pte_t pte)
700{
701 return pte_flags(pte) & _PAGE_SOFT_DIRTY;
702}
703
704static inline int pmd_soft_dirty(pmd_t pmd)
705{
706 return pmd_flags(pmd) & _PAGE_SOFT_DIRTY;
707}
708
709static inline int pud_soft_dirty(pud_t pud)
710{
711 return pud_flags(pud) & _PAGE_SOFT_DIRTY;
712}
713
714static inline pte_t pte_mksoft_dirty(pte_t pte)
715{
716 return pte_set_flags(pte, _PAGE_SOFT_DIRTY);
717}
718
719static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
720{
721 return pmd_set_flags(pmd, _PAGE_SOFT_DIRTY);
722}
723
724static inline pud_t pud_mksoft_dirty(pud_t pud)
725{
726 return pud_set_flags(pud, _PAGE_SOFT_DIRTY);
727}
728
729static inline pte_t pte_clear_soft_dirty(pte_t pte)
730{
731 return pte_clear_flags(pte, _PAGE_SOFT_DIRTY);
732}
733
734static inline pmd_t pmd_clear_soft_dirty(pmd_t pmd)
735{
736 return pmd_clear_flags(pmd, _PAGE_SOFT_DIRTY);
737}
738
739static inline pud_t pud_clear_soft_dirty(pud_t pud)
740{
741 return pud_clear_flags(pud, _PAGE_SOFT_DIRTY);
742}
743
744#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
745
746/*
747 * Mask out unsupported bits in a present pgprot. Non-present pgprots
748 * can use those bits for other purposes, so leave them be.
749 */
750static inline pgprotval_t massage_pgprot(pgprot_t pgprot)
751{
752 pgprotval_t protval = pgprot_val(pgprot);
753
754 if (protval & _PAGE_PRESENT)
755 protval &= __supported_pte_mask;
756
757 return protval;
758}
759
760static inline pgprotval_t check_pgprot(pgprot_t pgprot)
761{
762 pgprotval_t massaged_val = massage_pgprot(pgprot);
763
764 /* mmdebug.h can not be included here because of dependencies */
765#ifdef CONFIG_DEBUG_VM
766 WARN_ONCE(pgprot_val(pgprot) != massaged_val,
767 "attempted to set unsupported pgprot: %016llx "
768 "bits: %016llx supported: %016llx\n",
769 (u64)pgprot_val(pgprot),
770 (u64)pgprot_val(pgprot) ^ massaged_val,
771 (u64)__supported_pte_mask);
772#endif
773
774 return massaged_val;
775}
776
777static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
778{
779 phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT;
780 /* This bit combination is used to mark shadow stacks */
781 WARN_ON_ONCE((pgprot_val(pgprot) & (_PAGE_DIRTY | _PAGE_RW)) ==
782 _PAGE_DIRTY);
783 pfn ^= protnone_mask(pgprot_val(pgprot));
784 pfn &= PTE_PFN_MASK;
785 return __pte(val: pfn | check_pgprot(pgprot));
786}
787
788static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
789{
790 phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT;
791 pfn ^= protnone_mask(pgprot_val(pgprot));
792 pfn &= PHYSICAL_PMD_PAGE_MASK;
793 return __pmd(val: pfn | check_pgprot(pgprot));
794}
795
796static inline pud_t pfn_pud(unsigned long page_nr, pgprot_t pgprot)
797{
798 phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT;
799 pfn ^= protnone_mask(pgprot_val(pgprot));
800 pfn &= PHYSICAL_PUD_PAGE_MASK;
801 return __pud(val: pfn | check_pgprot(pgprot));
802}
803
804static inline pmd_t pmd_mkinvalid(pmd_t pmd)
805{
806 return pfn_pmd(page_nr: pmd_pfn(pmd),
807 __pgprot(pmd_flags(pmd) & ~(_PAGE_PRESENT|_PAGE_PROTNONE)));
808}
809
810static inline pud_t pud_mkinvalid(pud_t pud)
811{
812 return pfn_pud(pud_pfn(pud),
813 __pgprot(pud_flags(pud) & ~(_PAGE_PRESENT|_PAGE_PROTNONE)));
814}
815
816static inline u64 flip_protnone_guard(u64 oldval, u64 val, u64 mask);
817
818static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
819{
820 pteval_t val = pte_val(pte), oldval = val;
821 pte_t pte_result;
822
823 /*
824 * Chop off the NX bit (if present), and add the NX portion of
825 * the newprot (if present):
826 */
827 val &= _PAGE_CHG_MASK;
828 val |= check_pgprot(pgprot: newprot) & ~_PAGE_CHG_MASK;
829 val = flip_protnone_guard(oldval, val, PTE_PFN_MASK);
830
831 pte_result = __pte(val);
832
833 /*
834 * To avoid creating Write=0,Dirty=1 PTEs, pte_modify() needs to avoid:
835 * 1. Marking Write=0 PTEs Dirty=1
836 * 2. Marking Dirty=1 PTEs Write=0
837 *
838 * The first case cannot happen because the _PAGE_CHG_MASK will filter
839 * out any Dirty bit passed in newprot. Handle the second case by
840 * going through the mksaveddirty exercise. Only do this if the old
841 * value was Write=1 to avoid doing this on Shadow Stack PTEs.
842 */
843 if (oldval & _PAGE_RW)
844 pte_result = pte_mksaveddirty(pte: pte_result);
845 else
846 pte_result = pte_clear_saveddirty(pte: pte_result);
847
848 return pte_result;
849}
850
851static inline pmd_t pmd_modify(pmd_t pmd, pgprot_t newprot)
852{
853 pmdval_t val = pmd_val(pmd), oldval = val;
854 pmd_t pmd_result;
855
856 val &= (_HPAGE_CHG_MASK & ~_PAGE_DIRTY);
857 val |= check_pgprot(pgprot: newprot) & ~_HPAGE_CHG_MASK;
858 val = flip_protnone_guard(oldval, val, PHYSICAL_PMD_PAGE_MASK);
859
860 pmd_result = __pmd(val);
861
862 /*
863 * Avoid creating shadow stack PMD by accident. See comment in
864 * pte_modify().
865 */
866 if (oldval & _PAGE_RW)
867 pmd_result = pmd_mksaveddirty(pmd: pmd_result);
868 else
869 pmd_result = pmd_clear_saveddirty(pmd: pmd_result);
870
871 return pmd_result;
872}
873
874static inline pud_t pud_modify(pud_t pud, pgprot_t newprot)
875{
876 pudval_t val = pud_val(pud), oldval = val;
877 pud_t pud_result;
878
879 val &= _HPAGE_CHG_MASK;
880 val |= check_pgprot(pgprot: newprot) & ~_HPAGE_CHG_MASK;
881 val = flip_protnone_guard(oldval, val, PHYSICAL_PUD_PAGE_MASK);
882
883 pud_result = __pud(val);
884
885 /*
886 * Avoid creating shadow stack PUD by accident. See comment in
887 * pte_modify().
888 */
889 if (oldval & _PAGE_RW)
890 pud_result = pud_mksaveddirty(pud: pud_result);
891 else
892 pud_result = pud_clear_saveddirty(pud: pud_result);
893
894 return pud_result;
895}
896
897/*
898 * mprotect needs to preserve PAT and encryption bits when updating
899 * vm_page_prot
900 */
901#define pgprot_modify pgprot_modify
902static inline pgprot_t pgprot_modify(pgprot_t oldprot, pgprot_t newprot)
903{
904 pgprotval_t preservebits = pgprot_val(oldprot) & _PAGE_CHG_MASK;
905 pgprotval_t addbits = pgprot_val(newprot) & ~_PAGE_CHG_MASK;
906 return __pgprot(preservebits | addbits);
907}
908
909#define pte_pgprot(x) __pgprot(pte_flags(x))
910#define pmd_pgprot(x) __pgprot(pmd_flags(x))
911#define pud_pgprot(x) __pgprot(pud_flags(x))
912#define p4d_pgprot(x) __pgprot(p4d_flags(x))
913
914#define canon_pgprot(p) __pgprot(massage_pgprot(p))
915
916static inline int is_new_memtype_allowed(u64 paddr, unsigned long size,
917 enum page_cache_mode pcm,
918 enum page_cache_mode new_pcm)
919{
920 /*
921 * PAT type is always WB for untracked ranges, so no need to check.
922 */
923 if (x86_platform.is_untracked_pat_range(paddr, paddr + size))
924 return 1;
925
926 /*
927 * Certain new memtypes are not allowed with certain
928 * requested memtype:
929 * - request is uncached, return cannot be write-back
930 * - request is write-combine, return cannot be write-back
931 * - request is write-through, return cannot be write-back
932 * - request is write-through, return cannot be write-combine
933 */
934 if ((pcm == _PAGE_CACHE_MODE_UC_MINUS &&
935 new_pcm == _PAGE_CACHE_MODE_WB) ||
936 (pcm == _PAGE_CACHE_MODE_WC &&
937 new_pcm == _PAGE_CACHE_MODE_WB) ||
938 (pcm == _PAGE_CACHE_MODE_WT &&
939 new_pcm == _PAGE_CACHE_MODE_WB) ||
940 (pcm == _PAGE_CACHE_MODE_WT &&
941 new_pcm == _PAGE_CACHE_MODE_WC)) {
942 return 0;
943 }
944
945 return 1;
946}
947
948pmd_t *populate_extra_pmd(unsigned long vaddr);
949pte_t *populate_extra_pte(unsigned long vaddr);
950
951#ifdef CONFIG_MITIGATION_PAGE_TABLE_ISOLATION
952pgd_t __pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd);
953
954/*
955 * Take a PGD location (pgdp) and a pgd value that needs to be set there.
956 * Populates the user and returns the resulting PGD that must be set in
957 * the kernel copy of the page tables.
958 */
959static inline pgd_t pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd)
960{
961 if (!static_cpu_has(X86_FEATURE_PTI))
962 return pgd;
963 return __pti_set_user_pgtbl(pgdp, pgd);
964}
965#else /* CONFIG_MITIGATION_PAGE_TABLE_ISOLATION */
966static inline pgd_t pti_set_user_pgtbl(pgd_t *pgdp, pgd_t pgd)
967{
968 return pgd;
969}
970#endif /* CONFIG_MITIGATION_PAGE_TABLE_ISOLATION */
971
972#endif /* __ASSEMBLER__ */
973
974
975#ifdef CONFIG_X86_32
976# include <asm/pgtable_32.h>
977#else
978# include <asm/pgtable_64.h>
979#endif
980
981#ifndef __ASSEMBLER__
982#include <linux/mm_types.h>
983#include <linux/mmdebug.h>
984#include <linux/log2.h>
985#include <asm/fixmap.h>
986
987static inline int pte_none(pte_t pte)
988{
989 return !(pte.pte & ~(_PAGE_KNL_ERRATUM_MASK));
990}
991
992#define __HAVE_ARCH_PTE_SAME
993static inline int pte_same(pte_t a, pte_t b)
994{
995 return a.pte == b.pte;
996}
997
998static inline pte_t pte_advance_pfn(pte_t pte, unsigned long nr)
999{
1000 if (__pte_needs_invert(val: pte_val(pte)))
1001 return __pte(val: pte_val(pte) - (nr << PFN_PTE_SHIFT));
1002 return __pte(val: pte_val(pte) + (nr << PFN_PTE_SHIFT));
1003}
1004#define pte_advance_pfn pte_advance_pfn
1005
1006static inline int pte_present(pte_t a)
1007{
1008 return pte_flags(pte: a) & (_PAGE_PRESENT | _PAGE_PROTNONE);
1009}
1010
1011#ifdef CONFIG_ARCH_HAS_PTE_DEVMAP
1012static inline int pte_devmap(pte_t a)
1013{
1014 return (pte_flags(pte: a) & _PAGE_DEVMAP) == _PAGE_DEVMAP;
1015}
1016#endif
1017
1018#define pte_accessible pte_accessible
1019static inline bool pte_accessible(struct mm_struct *mm, pte_t a)
1020{
1021 if (pte_flags(pte: a) & _PAGE_PRESENT)
1022 return true;
1023
1024 if ((pte_flags(pte: a) & _PAGE_PROTNONE) &&
1025 atomic_read(v: &mm->tlb_flush_pending))
1026 return true;
1027
1028 return false;
1029}
1030
1031static inline int pmd_present(pmd_t pmd)
1032{
1033 /*
1034 * Checking for _PAGE_PSE is needed too because
1035 * split_huge_page will temporarily clear the present bit (but
1036 * the _PAGE_PSE flag will remain set at all times while the
1037 * _PAGE_PRESENT bit is clear).
1038 */
1039 return pmd_flags(pmd) & (_PAGE_PRESENT | _PAGE_PROTNONE | _PAGE_PSE);
1040}
1041
1042#ifdef CONFIG_NUMA_BALANCING
1043/*
1044 * These work without NUMA balancing but the kernel does not care. See the
1045 * comment in include/linux/pgtable.h
1046 */
1047static inline int pte_protnone(pte_t pte)
1048{
1049 return (pte_flags(pte) & (_PAGE_PROTNONE | _PAGE_PRESENT))
1050 == _PAGE_PROTNONE;
1051}
1052
1053static inline int pmd_protnone(pmd_t pmd)
1054{
1055 return (pmd_flags(pmd) & (_PAGE_PROTNONE | _PAGE_PRESENT))
1056 == _PAGE_PROTNONE;
1057}
1058#endif /* CONFIG_NUMA_BALANCING */
1059
1060static inline int pmd_none(pmd_t pmd)
1061{
1062 /* Only check low word on 32-bit platforms, since it might be
1063 out of sync with upper half. */
1064 unsigned long val = native_pmd_val(pmd);
1065 return (val & ~_PAGE_KNL_ERRATUM_MASK) == 0;
1066}
1067
1068static inline unsigned long pmd_page_vaddr(pmd_t pmd)
1069{
1070 return (unsigned long)__va(pmd_val(pmd) & pmd_pfn_mask(pmd));
1071}
1072
1073/*
1074 * Currently stuck as a macro due to indirect forward reference to
1075 * linux/mmzone.h's __section_mem_map_addr() definition:
1076 */
1077#define pmd_page(pmd) pfn_to_page(pmd_pfn(pmd))
1078
1079static inline int pmd_bad(pmd_t pmd)
1080{
1081 return (pmd_flags(pmd) & ~(_PAGE_USER | _PAGE_ACCESSED)) !=
1082 (_KERNPG_TABLE & ~_PAGE_ACCESSED);
1083}
1084
1085static inline unsigned long pages_to_mb(unsigned long npg)
1086{
1087 return npg >> (20 - PAGE_SHIFT);
1088}
1089
1090#if CONFIG_PGTABLE_LEVELS > 2
1091static inline int pud_none(pud_t pud)
1092{
1093 return (native_pud_val(pud) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0;
1094}
1095
1096static inline int pud_present(pud_t pud)
1097{
1098 return pud_flags(pud) & _PAGE_PRESENT;
1099}
1100
1101static inline pmd_t *pud_pgtable(pud_t pud)
1102{
1103 return (pmd_t *)__va(pud_val(pud) & pud_pfn_mask(pud));
1104}
1105
1106/*
1107 * Currently stuck as a macro due to indirect forward reference to
1108 * linux/mmzone.h's __section_mem_map_addr() definition:
1109 */
1110#define pud_page(pud) pfn_to_page(pud_pfn(pud))
1111
1112#define pud_leaf pud_leaf
1113static inline bool pud_leaf(pud_t pud)
1114{
1115 return pud_val(pud) & _PAGE_PSE;
1116}
1117
1118static inline int pud_bad(pud_t pud)
1119{
1120 return (pud_flags(pud) & ~(_KERNPG_TABLE | _PAGE_USER)) != 0;
1121}
1122#endif /* CONFIG_PGTABLE_LEVELS > 2 */
1123
1124#if CONFIG_PGTABLE_LEVELS > 3
1125static inline int p4d_none(p4d_t p4d)
1126{
1127 return (native_p4d_val(p4d) & ~(_PAGE_KNL_ERRATUM_MASK)) == 0;
1128}
1129
1130static inline int p4d_present(p4d_t p4d)
1131{
1132 return p4d_flags(p4d) & _PAGE_PRESENT;
1133}
1134
1135static inline pud_t *p4d_pgtable(p4d_t p4d)
1136{
1137 return (pud_t *)__va(p4d_val(p4d) & p4d_pfn_mask(p4d));
1138}
1139
1140/*
1141 * Currently stuck as a macro due to indirect forward reference to
1142 * linux/mmzone.h's __section_mem_map_addr() definition:
1143 */
1144#define p4d_page(p4d) pfn_to_page(p4d_pfn(p4d))
1145
1146static inline int p4d_bad(p4d_t p4d)
1147{
1148 unsigned long ignore_flags = _KERNPG_TABLE | _PAGE_USER;
1149
1150 if (IS_ENABLED(CONFIG_MITIGATION_PAGE_TABLE_ISOLATION))
1151 ignore_flags |= _PAGE_NX;
1152
1153 return (p4d_flags(p4d) & ~ignore_flags) != 0;
1154}
1155#endif /* CONFIG_PGTABLE_LEVELS > 3 */
1156
1157static inline unsigned long p4d_index(unsigned long address)
1158{
1159 return (address >> P4D_SHIFT) & (PTRS_PER_P4D - 1);
1160}
1161
1162#if CONFIG_PGTABLE_LEVELS > 4
1163static inline int pgd_present(pgd_t pgd)
1164{
1165 if (!pgtable_l5_enabled())
1166 return 1;
1167 return pgd_flags(pgd) & _PAGE_PRESENT;
1168}
1169
1170static inline unsigned long pgd_page_vaddr(pgd_t pgd)
1171{
1172 return (unsigned long)__va((unsigned long)pgd_val(pgd) & PTE_PFN_MASK);
1173}
1174
1175/*
1176 * Currently stuck as a macro due to indirect forward reference to
1177 * linux/mmzone.h's __section_mem_map_addr() definition:
1178 */
1179#define pgd_page(pgd) pfn_to_page(pgd_pfn(pgd))
1180
1181/* to find an entry in a page-table-directory. */
1182static inline p4d_t *p4d_offset(pgd_t *pgd, unsigned long address)
1183{
1184 if (!pgtable_l5_enabled())
1185 return (p4d_t *)pgd;
1186 return (p4d_t *)pgd_page_vaddr(pgd: *pgd) + p4d_index(address);
1187}
1188
1189static inline int pgd_bad(pgd_t pgd)
1190{
1191 unsigned long ignore_flags = _PAGE_USER;
1192
1193 if (!pgtable_l5_enabled())
1194 return 0;
1195
1196 if (IS_ENABLED(CONFIG_MITIGATION_PAGE_TABLE_ISOLATION))
1197 ignore_flags |= _PAGE_NX;
1198
1199 return (pgd_flags(pgd) & ~ignore_flags) != _KERNPG_TABLE;
1200}
1201
1202static inline int pgd_none(pgd_t pgd)
1203{
1204 if (!pgtable_l5_enabled())
1205 return 0;
1206 /*
1207 * There is no need to do a workaround for the KNL stray
1208 * A/D bit erratum here. PGDs only point to page tables
1209 * except on 32-bit non-PAE which is not supported on
1210 * KNL.
1211 */
1212 return !native_pgd_val(pgd);
1213}
1214#endif /* CONFIG_PGTABLE_LEVELS > 4 */
1215
1216#endif /* __ASSEMBLER__ */
1217
1218#define KERNEL_PGD_BOUNDARY pgd_index(PAGE_OFFSET)
1219#define KERNEL_PGD_PTRS (PTRS_PER_PGD - KERNEL_PGD_BOUNDARY)
1220
1221#ifndef __ASSEMBLER__
1222
1223extern int direct_gbpages;
1224void init_mem_mapping(void);
1225void early_alloc_pgt_buf(void);
1226void __init poking_init(void);
1227unsigned long init_memory_mapping(unsigned long start,
1228 unsigned long end, pgprot_t prot);
1229
1230#ifdef CONFIG_X86_64
1231extern pgd_t trampoline_pgd_entry;
1232#endif
1233
1234/* local pte updates need not use xchg for locking */
1235static inline pte_t native_local_ptep_get_and_clear(pte_t *ptep)
1236{
1237 pte_t res = *ptep;
1238
1239 /* Pure native function needs no input for mm, addr */
1240 native_pte_clear(NULL, addr: 0, ptep);
1241 return res;
1242}
1243
1244static inline pmd_t native_local_pmdp_get_and_clear(pmd_t *pmdp)
1245{
1246 pmd_t res = *pmdp;
1247
1248 native_pmd_clear(pmd: pmdp);
1249 return res;
1250}
1251
1252static inline pud_t native_local_pudp_get_and_clear(pud_t *pudp)
1253{
1254 pud_t res = *pudp;
1255
1256 native_pud_clear(pud: pudp);
1257 return res;
1258}
1259
1260static inline void set_pmd_at(struct mm_struct *mm, unsigned long addr,
1261 pmd_t *pmdp, pmd_t pmd)
1262{
1263 page_table_check_pmd_set(mm, pmdp, pmd);
1264 set_pmd(pmdp, pmd);
1265}
1266
1267static inline void set_pud_at(struct mm_struct *mm, unsigned long addr,
1268 pud_t *pudp, pud_t pud)
1269{
1270 page_table_check_pud_set(mm, pudp, pud);
1271 native_set_pud(pudp, pud);
1272}
1273
1274/*
1275 * We only update the dirty/accessed state if we set
1276 * the dirty bit by hand in the kernel, since the hardware
1277 * will do the accessed bit for us, and we don't want to
1278 * race with other CPU's that might be updating the dirty
1279 * bit at the same time.
1280 */
1281struct vm_area_struct;
1282
1283#define __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
1284extern int ptep_set_access_flags(struct vm_area_struct *vma,
1285 unsigned long address, pte_t *ptep,
1286 pte_t entry, int dirty);
1287
1288#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
1289extern int ptep_test_and_clear_young(struct vm_area_struct *vma,
1290 unsigned long addr, pte_t *ptep);
1291
1292#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
1293extern int ptep_clear_flush_young(struct vm_area_struct *vma,
1294 unsigned long address, pte_t *ptep);
1295
1296#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
1297static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
1298 pte_t *ptep)
1299{
1300 pte_t pte = native_ptep_get_and_clear(xp: ptep);
1301 page_table_check_pte_clear(mm, pte);
1302 return pte;
1303}
1304
1305#define __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
1306static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
1307 unsigned long addr, pte_t *ptep,
1308 int full)
1309{
1310 pte_t pte;
1311 if (full) {
1312 /*
1313 * Full address destruction in progress; paravirt does not
1314 * care about updates and native needs no locking
1315 */
1316 pte = native_local_ptep_get_and_clear(ptep);
1317 page_table_check_pte_clear(mm, pte);
1318 } else {
1319 pte = ptep_get_and_clear(mm, addr, ptep);
1320 }
1321 return pte;
1322}
1323
1324#define __HAVE_ARCH_PTEP_SET_WRPROTECT
1325static inline void ptep_set_wrprotect(struct mm_struct *mm,
1326 unsigned long addr, pte_t *ptep)
1327{
1328 /*
1329 * Avoid accidentally creating shadow stack PTEs
1330 * (Write=0,Dirty=1). Use cmpxchg() to prevent races with
1331 * the hardware setting Dirty=1.
1332 */
1333 pte_t old_pte, new_pte;
1334
1335 old_pte = READ_ONCE(*ptep);
1336 do {
1337 new_pte = pte_wrprotect(pte: old_pte);
1338 } while (!try_cmpxchg((long *)&ptep->pte, (long *)&old_pte, *(long *)&new_pte));
1339}
1340
1341#define flush_tlb_fix_spurious_fault(vma, address, ptep) do { } while (0)
1342
1343#define __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
1344extern int pmdp_set_access_flags(struct vm_area_struct *vma,
1345 unsigned long address, pmd_t *pmdp,
1346 pmd_t entry, int dirty);
1347extern int pudp_set_access_flags(struct vm_area_struct *vma,
1348 unsigned long address, pud_t *pudp,
1349 pud_t entry, int dirty);
1350
1351#define __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
1352extern int pmdp_test_and_clear_young(struct vm_area_struct *vma,
1353 unsigned long addr, pmd_t *pmdp);
1354extern int pudp_test_and_clear_young(struct vm_area_struct *vma,
1355 unsigned long addr, pud_t *pudp);
1356
1357#define __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
1358extern int pmdp_clear_flush_young(struct vm_area_struct *vma,
1359 unsigned long address, pmd_t *pmdp);
1360
1361
1362#define __HAVE_ARCH_PMDP_HUGE_GET_AND_CLEAR
1363static inline pmd_t pmdp_huge_get_and_clear(struct mm_struct *mm, unsigned long addr,
1364 pmd_t *pmdp)
1365{
1366 pmd_t pmd = native_pmdp_get_and_clear(xp: pmdp);
1367
1368 page_table_check_pmd_clear(mm, pmd);
1369
1370 return pmd;
1371}
1372
1373#define __HAVE_ARCH_PUDP_HUGE_GET_AND_CLEAR
1374static inline pud_t pudp_huge_get_and_clear(struct mm_struct *mm,
1375 unsigned long addr, pud_t *pudp)
1376{
1377 pud_t pud = native_pudp_get_and_clear(xp: pudp);
1378
1379 page_table_check_pud_clear(mm, pud);
1380
1381 return pud;
1382}
1383
1384#define __HAVE_ARCH_PMDP_SET_WRPROTECT
1385static inline void pmdp_set_wrprotect(struct mm_struct *mm,
1386 unsigned long addr, pmd_t *pmdp)
1387{
1388 /*
1389 * Avoid accidentally creating shadow stack PTEs
1390 * (Write=0,Dirty=1). Use cmpxchg() to prevent races with
1391 * the hardware setting Dirty=1.
1392 */
1393 pmd_t old_pmd, new_pmd;
1394
1395 old_pmd = READ_ONCE(*pmdp);
1396 do {
1397 new_pmd = pmd_wrprotect(pmd: old_pmd);
1398 } while (!try_cmpxchg((long *)pmdp, (long *)&old_pmd, *(long *)&new_pmd));
1399}
1400
1401#ifndef pmdp_establish
1402#define pmdp_establish pmdp_establish
1403static inline pmd_t pmdp_establish(struct vm_area_struct *vma,
1404 unsigned long address, pmd_t *pmdp, pmd_t pmd)
1405{
1406 page_table_check_pmd_set(vma->vm_mm, pmdp, pmd);
1407 if (IS_ENABLED(CONFIG_SMP)) {
1408 return xchg(pmdp, pmd);
1409 } else {
1410 pmd_t old = *pmdp;
1411 WRITE_ONCE(*pmdp, pmd);
1412 return old;
1413 }
1414}
1415#endif
1416
1417#ifdef CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD
1418static inline pud_t pudp_establish(struct vm_area_struct *vma,
1419 unsigned long address, pud_t *pudp, pud_t pud)
1420{
1421 page_table_check_pud_set(vma->vm_mm, pudp, pud);
1422 if (IS_ENABLED(CONFIG_SMP)) {
1423 return xchg(pudp, pud);
1424 } else {
1425 pud_t old = *pudp;
1426 WRITE_ONCE(*pudp, pud);
1427 return old;
1428 }
1429}
1430#endif
1431
1432#define __HAVE_ARCH_PMDP_INVALIDATE_AD
1433extern pmd_t pmdp_invalidate_ad(struct vm_area_struct *vma,
1434 unsigned long address, pmd_t *pmdp);
1435
1436pud_t pudp_invalidate(struct vm_area_struct *vma, unsigned long address,
1437 pud_t *pudp);
1438
1439/*
1440 * Page table pages are page-aligned. The lower half of the top
1441 * level is used for userspace and the top half for the kernel.
1442 *
1443 * Returns true for parts of the PGD that map userspace and
1444 * false for the parts that map the kernel.
1445 */
1446static inline bool pgdp_maps_userspace(void *__ptr)
1447{
1448 unsigned long ptr = (unsigned long)__ptr;
1449
1450 return (((ptr & ~PAGE_MASK) / sizeof(pgd_t)) < PGD_KERNEL_START);
1451}
1452
1453#ifdef CONFIG_MITIGATION_PAGE_TABLE_ISOLATION
1454/*
1455 * All top-level MITIGATION_PAGE_TABLE_ISOLATION page tables are order-1 pages
1456 * (8k-aligned and 8k in size). The kernel one is at the beginning 4k and
1457 * the user one is in the last 4k. To switch between them, you
1458 * just need to flip the 12th bit in their addresses.
1459 */
1460#define PTI_PGTABLE_SWITCH_BIT PAGE_SHIFT
1461
1462/*
1463 * This generates better code than the inline assembly in
1464 * __set_bit().
1465 */
1466static inline void *ptr_set_bit(void *ptr, int bit)
1467{
1468 unsigned long __ptr = (unsigned long)ptr;
1469
1470 __ptr |= BIT(bit);
1471 return (void *)__ptr;
1472}
1473static inline void *ptr_clear_bit(void *ptr, int bit)
1474{
1475 unsigned long __ptr = (unsigned long)ptr;
1476
1477 __ptr &= ~BIT(bit);
1478 return (void *)__ptr;
1479}
1480
1481static inline pgd_t *kernel_to_user_pgdp(pgd_t *pgdp)
1482{
1483 return ptr_set_bit(ptr: pgdp, PTI_PGTABLE_SWITCH_BIT);
1484}
1485
1486static inline pgd_t *user_to_kernel_pgdp(pgd_t *pgdp)
1487{
1488 return ptr_clear_bit(ptr: pgdp, PTI_PGTABLE_SWITCH_BIT);
1489}
1490
1491static inline p4d_t *kernel_to_user_p4dp(p4d_t *p4dp)
1492{
1493 return ptr_set_bit(ptr: p4dp, PTI_PGTABLE_SWITCH_BIT);
1494}
1495
1496static inline p4d_t *user_to_kernel_p4dp(p4d_t *p4dp)
1497{
1498 return ptr_clear_bit(ptr: p4dp, PTI_PGTABLE_SWITCH_BIT);
1499}
1500#endif /* CONFIG_MITIGATION_PAGE_TABLE_ISOLATION */
1501
1502/*
1503 * clone_pgd_range(pgd_t *dst, pgd_t *src, int count);
1504 *
1505 * dst - pointer to pgd range anywhere on a pgd page
1506 * src - ""
1507 * count - the number of pgds to copy.
1508 *
1509 * dst and src can be on the same page, but the range must not overlap,
1510 * and must not cross a page boundary.
1511 */
1512static inline void clone_pgd_range(pgd_t *dst, pgd_t *src, int count)
1513{
1514 memcpy(dst, src, count * sizeof(pgd_t));
1515#ifdef CONFIG_MITIGATION_PAGE_TABLE_ISOLATION
1516 if (!static_cpu_has(X86_FEATURE_PTI))
1517 return;
1518 /* Clone the user space pgd as well */
1519 memcpy(kernel_to_user_pgdp(dst), kernel_to_user_pgdp(src),
1520 count * sizeof(pgd_t));
1521#endif
1522}
1523
1524#define PTE_SHIFT ilog2(PTRS_PER_PTE)
1525static inline int page_level_shift(enum pg_level level)
1526{
1527 return (PAGE_SHIFT - PTE_SHIFT) + level * PTE_SHIFT;
1528}
1529static inline unsigned long page_level_size(enum pg_level level)
1530{
1531 return 1UL << page_level_shift(level);
1532}
1533static inline unsigned long page_level_mask(enum pg_level level)
1534{
1535 return ~(page_level_size(level) - 1);
1536}
1537
1538/*
1539 * The x86 doesn't have any external MMU info: the kernel page
1540 * tables contain all the necessary information.
1541 */
1542static inline void update_mmu_cache(struct vm_area_struct *vma,
1543 unsigned long addr, pte_t *ptep)
1544{
1545}
1546static inline void update_mmu_cache_range(struct vm_fault *vmf,
1547 struct vm_area_struct *vma, unsigned long addr,
1548 pte_t *ptep, unsigned int nr)
1549{
1550}
1551static inline void update_mmu_cache_pmd(struct vm_area_struct *vma,
1552 unsigned long addr, pmd_t *pmd)
1553{
1554}
1555static inline void update_mmu_cache_pud(struct vm_area_struct *vma,
1556 unsigned long addr, pud_t *pud)
1557{
1558}
1559static inline pte_t pte_swp_mkexclusive(pte_t pte)
1560{
1561 return pte_set_flags(pte, _PAGE_SWP_EXCLUSIVE);
1562}
1563
1564static inline int pte_swp_exclusive(pte_t pte)
1565{
1566 return pte_flags(pte) & _PAGE_SWP_EXCLUSIVE;
1567}
1568
1569static inline pte_t pte_swp_clear_exclusive(pte_t pte)
1570{
1571 return pte_clear_flags(pte, _PAGE_SWP_EXCLUSIVE);
1572}
1573
1574#ifdef CONFIG_HAVE_ARCH_SOFT_DIRTY
1575static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
1576{
1577 return pte_set_flags(pte, _PAGE_SWP_SOFT_DIRTY);
1578}
1579
1580static inline int pte_swp_soft_dirty(pte_t pte)
1581{
1582 return pte_flags(pte) & _PAGE_SWP_SOFT_DIRTY;
1583}
1584
1585static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
1586{
1587 return pte_clear_flags(pte, _PAGE_SWP_SOFT_DIRTY);
1588}
1589
1590#ifdef CONFIG_ARCH_ENABLE_THP_MIGRATION
1591static inline pmd_t pmd_swp_mksoft_dirty(pmd_t pmd)
1592{
1593 return pmd_set_flags(pmd, _PAGE_SWP_SOFT_DIRTY);
1594}
1595
1596static inline int pmd_swp_soft_dirty(pmd_t pmd)
1597{
1598 return pmd_flags(pmd) & _PAGE_SWP_SOFT_DIRTY;
1599}
1600
1601static inline pmd_t pmd_swp_clear_soft_dirty(pmd_t pmd)
1602{
1603 return pmd_clear_flags(pmd, _PAGE_SWP_SOFT_DIRTY);
1604}
1605#endif
1606#endif
1607
1608#ifdef CONFIG_HAVE_ARCH_USERFAULTFD_WP
1609static inline pte_t pte_swp_mkuffd_wp(pte_t pte)
1610{
1611 return pte_set_flags(pte, _PAGE_SWP_UFFD_WP);
1612}
1613
1614static inline int pte_swp_uffd_wp(pte_t pte)
1615{
1616 return pte_flags(pte) & _PAGE_SWP_UFFD_WP;
1617}
1618
1619static inline pte_t pte_swp_clear_uffd_wp(pte_t pte)
1620{
1621 return pte_clear_flags(pte, _PAGE_SWP_UFFD_WP);
1622}
1623
1624static inline pmd_t pmd_swp_mkuffd_wp(pmd_t pmd)
1625{
1626 return pmd_set_flags(pmd, _PAGE_SWP_UFFD_WP);
1627}
1628
1629static inline int pmd_swp_uffd_wp(pmd_t pmd)
1630{
1631 return pmd_flags(pmd) & _PAGE_SWP_UFFD_WP;
1632}
1633
1634static inline pmd_t pmd_swp_clear_uffd_wp(pmd_t pmd)
1635{
1636 return pmd_clear_flags(pmd, _PAGE_SWP_UFFD_WP);
1637}
1638#endif /* CONFIG_HAVE_ARCH_USERFAULTFD_WP */
1639
1640static inline u16 pte_flags_pkey(unsigned long pte_flags)
1641{
1642#ifdef CONFIG_X86_INTEL_MEMORY_PROTECTION_KEYS
1643 /* ifdef to avoid doing 59-bit shift on 32-bit values */
1644 return (pte_flags & _PAGE_PKEY_MASK) >> _PAGE_BIT_PKEY_BIT0;
1645#else
1646 return 0;
1647#endif
1648}
1649
1650static inline bool __pkru_allows_pkey(u16 pkey, bool write)
1651{
1652 u32 pkru = read_pkru();
1653
1654 if (!__pkru_allows_read(pkru, pkey))
1655 return false;
1656 if (write && !__pkru_allows_write(pkru, pkey))
1657 return false;
1658
1659 return true;
1660}
1661
1662/*
1663 * 'pteval' can come from a PTE, PMD or PUD. We only check
1664 * _PAGE_PRESENT, _PAGE_USER, and _PAGE_RW in here which are the
1665 * same value on all 3 types.
1666 */
1667static inline bool __pte_access_permitted(unsigned long pteval, bool write)
1668{
1669 unsigned long need_pte_bits = _PAGE_PRESENT|_PAGE_USER;
1670
1671 /*
1672 * Write=0,Dirty=1 PTEs are shadow stack, which the kernel
1673 * shouldn't generally allow access to, but since they
1674 * are already Write=0, the below logic covers both cases.
1675 */
1676 if (write)
1677 need_pte_bits |= _PAGE_RW;
1678
1679 if ((pteval & need_pte_bits) != need_pte_bits)
1680 return 0;
1681
1682 return __pkru_allows_pkey(pkey: pte_flags_pkey(pte_flags: pteval), write);
1683}
1684
1685#define pte_access_permitted pte_access_permitted
1686static inline bool pte_access_permitted(pte_t pte, bool write)
1687{
1688 return __pte_access_permitted(pteval: pte_val(pte), write);
1689}
1690
1691#define pmd_access_permitted pmd_access_permitted
1692static inline bool pmd_access_permitted(pmd_t pmd, bool write)
1693{
1694 return __pte_access_permitted(pteval: pmd_val(pmd), write);
1695}
1696
1697#define pud_access_permitted pud_access_permitted
1698static inline bool pud_access_permitted(pud_t pud, bool write)
1699{
1700 return __pte_access_permitted(pteval: pud_val(pud), write);
1701}
1702
1703#define __HAVE_ARCH_PFN_MODIFY_ALLOWED 1
1704extern bool pfn_modify_allowed(unsigned long pfn, pgprot_t prot);
1705
1706static inline bool arch_has_pfn_modify_check(void)
1707{
1708 return boot_cpu_has_bug(X86_BUG_L1TF);
1709}
1710
1711#define arch_check_zapped_pte arch_check_zapped_pte
1712void arch_check_zapped_pte(struct vm_area_struct *vma, pte_t pte);
1713
1714#define arch_check_zapped_pmd arch_check_zapped_pmd
1715void arch_check_zapped_pmd(struct vm_area_struct *vma, pmd_t pmd);
1716
1717#define arch_check_zapped_pud arch_check_zapped_pud
1718void arch_check_zapped_pud(struct vm_area_struct *vma, pud_t pud);
1719
1720#ifdef CONFIG_XEN_PV
1721#define arch_has_hw_nonleaf_pmd_young arch_has_hw_nonleaf_pmd_young
1722static inline bool arch_has_hw_nonleaf_pmd_young(void)
1723{
1724 return !cpu_feature_enabled(X86_FEATURE_XENPV);
1725}
1726#endif
1727
1728#ifdef CONFIG_PAGE_TABLE_CHECK
1729static inline bool pte_user_accessible_page(pte_t pte)
1730{
1731 return (pte_val(pte) & _PAGE_PRESENT) && (pte_val(pte) & _PAGE_USER);
1732}
1733
1734static inline bool pmd_user_accessible_page(pmd_t pmd)
1735{
1736 return pmd_leaf(pte: pmd) && (pmd_val(pmd) & _PAGE_PRESENT) && (pmd_val(pmd) & _PAGE_USER);
1737}
1738
1739static inline bool pud_user_accessible_page(pud_t pud)
1740{
1741 return pud_leaf(pud) && (pud_val(pud) & _PAGE_PRESENT) && (pud_val(pud) & _PAGE_USER);
1742}
1743#endif
1744
1745#ifdef CONFIG_X86_SGX
1746int arch_memory_failure(unsigned long pfn, int flags);
1747#define arch_memory_failure arch_memory_failure
1748
1749bool arch_is_platform_page(u64 paddr);
1750#define arch_is_platform_page arch_is_platform_page
1751#endif
1752
1753/*
1754 * Use set_p*_safe(), and elide TLB flushing, when confident that *no*
1755 * TLB flush will be required as a result of the "set". For example, use
1756 * in scenarios where it is known ahead of time that the routine is
1757 * setting non-present entries, or re-setting an existing entry to the
1758 * same value. Otherwise, use the typical "set" helpers and flush the
1759 * TLB.
1760 */
1761#define set_pte_safe(ptep, pte) \
1762({ \
1763 WARN_ON_ONCE(pte_present(*ptep) && !pte_same(*ptep, pte)); \
1764 set_pte(ptep, pte); \
1765})
1766
1767#define set_pmd_safe(pmdp, pmd) \
1768({ \
1769 WARN_ON_ONCE(pmd_present(*pmdp) && !pmd_same(*pmdp, pmd)); \
1770 set_pmd(pmdp, pmd); \
1771})
1772
1773#define set_pud_safe(pudp, pud) \
1774({ \
1775 WARN_ON_ONCE(pud_present(*pudp) && !pud_same(*pudp, pud)); \
1776 set_pud(pudp, pud); \
1777})
1778
1779#define set_p4d_safe(p4dp, p4d) \
1780({ \
1781 WARN_ON_ONCE(p4d_present(*p4dp) && !p4d_same(*p4dp, p4d)); \
1782 set_p4d(p4dp, p4d); \
1783})
1784
1785#define set_pgd_safe(pgdp, pgd) \
1786({ \
1787 WARN_ON_ONCE(pgd_present(*pgdp) && !pgd_same(*pgdp, pgd)); \
1788 set_pgd(pgdp, pgd); \
1789})
1790#endif /* __ASSEMBLER__ */
1791
1792#endif /* _ASM_X86_PGTABLE_H */
1793

source code of linux/arch/x86/include/asm/pgtable.h