1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | #ifndef _ASM_X86_SMP_H |
3 | #define _ASM_X86_SMP_H |
4 | #ifndef __ASSEMBLY__ |
5 | #include <linux/cpumask.h> |
6 | |
7 | #include <asm/cpumask.h> |
8 | #include <asm/current.h> |
9 | #include <asm/thread_info.h> |
10 | |
11 | extern int smp_num_siblings; |
12 | extern unsigned int num_processors; |
13 | |
14 | DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_sibling_map); |
15 | DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_core_map); |
16 | DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_die_map); |
17 | /* cpus sharing the last level cache: */ |
18 | DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_llc_shared_map); |
19 | DECLARE_PER_CPU_READ_MOSTLY(cpumask_var_t, cpu_l2c_shared_map); |
20 | |
21 | DECLARE_EARLY_PER_CPU_READ_MOSTLY(u32, x86_cpu_to_apicid); |
22 | DECLARE_EARLY_PER_CPU_READ_MOSTLY(u32, x86_cpu_to_acpiid); |
23 | |
24 | struct task_struct; |
25 | |
26 | struct smp_ops { |
27 | void (*smp_prepare_boot_cpu)(void); |
28 | void (*smp_prepare_cpus)(unsigned max_cpus); |
29 | void (*smp_cpus_done)(unsigned max_cpus); |
30 | |
31 | void (*stop_other_cpus)(int wait); |
32 | void (*crash_stop_other_cpus)(void); |
33 | void (*smp_send_reschedule)(int cpu); |
34 | |
35 | void (*cleanup_dead_cpu)(unsigned cpu); |
36 | void (*poll_sync_state)(void); |
37 | int (*kick_ap_alive)(unsigned cpu, struct task_struct *tidle); |
38 | int (*cpu_disable)(void); |
39 | void (*cpu_die)(unsigned int cpu); |
40 | void (*play_dead)(void); |
41 | |
42 | void (*send_call_func_ipi)(const struct cpumask *mask); |
43 | void (*send_call_func_single_ipi)(int cpu); |
44 | }; |
45 | |
46 | /* Globals due to paravirt */ |
47 | extern void set_cpu_sibling_map(int cpu); |
48 | |
49 | #ifdef CONFIG_SMP |
50 | extern struct smp_ops smp_ops; |
51 | |
52 | static inline void smp_send_stop(void) |
53 | { |
54 | smp_ops.stop_other_cpus(0); |
55 | } |
56 | |
57 | static inline void stop_other_cpus(void) |
58 | { |
59 | smp_ops.stop_other_cpus(1); |
60 | } |
61 | |
62 | static inline void smp_prepare_boot_cpu(void) |
63 | { |
64 | smp_ops.smp_prepare_boot_cpu(); |
65 | } |
66 | |
67 | static inline void smp_prepare_cpus(unsigned int max_cpus) |
68 | { |
69 | smp_ops.smp_prepare_cpus(max_cpus); |
70 | } |
71 | |
72 | static inline void smp_cpus_done(unsigned int max_cpus) |
73 | { |
74 | smp_ops.smp_cpus_done(max_cpus); |
75 | } |
76 | |
77 | static inline int __cpu_disable(void) |
78 | { |
79 | return smp_ops.cpu_disable(); |
80 | } |
81 | |
82 | static inline void __cpu_die(unsigned int cpu) |
83 | { |
84 | if (smp_ops.cpu_die) |
85 | smp_ops.cpu_die(cpu); |
86 | } |
87 | |
88 | static inline void __noreturn play_dead(void) |
89 | { |
90 | smp_ops.play_dead(); |
91 | BUG(); |
92 | } |
93 | |
94 | static inline void arch_smp_send_reschedule(int cpu) |
95 | { |
96 | smp_ops.smp_send_reschedule(cpu); |
97 | } |
98 | |
99 | static inline void arch_send_call_function_single_ipi(int cpu) |
100 | { |
101 | smp_ops.send_call_func_single_ipi(cpu); |
102 | } |
103 | |
104 | static inline void arch_send_call_function_ipi_mask(const struct cpumask *mask) |
105 | { |
106 | smp_ops.send_call_func_ipi(mask); |
107 | } |
108 | |
109 | void cpu_disable_common(void); |
110 | void native_smp_prepare_boot_cpu(void); |
111 | void smp_prepare_cpus_common(void); |
112 | void native_smp_prepare_cpus(unsigned int max_cpus); |
113 | void calculate_max_logical_packages(void); |
114 | void native_smp_cpus_done(unsigned int max_cpus); |
115 | int common_cpu_up(unsigned int cpunum, struct task_struct *tidle); |
116 | int native_kick_ap(unsigned int cpu, struct task_struct *tidle); |
117 | int native_cpu_disable(void); |
118 | void __noreturn hlt_play_dead(void); |
119 | void native_play_dead(void); |
120 | void play_dead_common(void); |
121 | void wbinvd_on_cpu(int cpu); |
122 | int wbinvd_on_all_cpus(void); |
123 | |
124 | void smp_kick_mwait_play_dead(void); |
125 | |
126 | void native_smp_send_reschedule(int cpu); |
127 | void native_send_call_func_ipi(const struct cpumask *mask); |
128 | void native_send_call_func_single_ipi(int cpu); |
129 | |
130 | void smp_store_cpu_info(int id); |
131 | |
132 | asmlinkage __visible void smp_reboot_interrupt(void); |
133 | __visible void smp_reschedule_interrupt(struct pt_regs *regs); |
134 | __visible void smp_call_function_interrupt(struct pt_regs *regs); |
135 | __visible void smp_call_function_single_interrupt(struct pt_regs *r); |
136 | |
137 | #define cpu_physical_id(cpu) per_cpu(x86_cpu_to_apicid, cpu) |
138 | #define cpu_acpi_id(cpu) per_cpu(x86_cpu_to_acpiid, cpu) |
139 | |
140 | /* |
141 | * This function is needed by all SMP systems. It must _always_ be valid |
142 | * from the initial startup. |
143 | */ |
144 | #define raw_smp_processor_id() this_cpu_read(pcpu_hot.cpu_number) |
145 | #define __smp_processor_id() __this_cpu_read(pcpu_hot.cpu_number) |
146 | |
147 | #ifdef CONFIG_X86_32 |
148 | extern int safe_smp_processor_id(void); |
149 | #else |
150 | # define safe_smp_processor_id() smp_processor_id() |
151 | #endif |
152 | |
153 | static inline struct cpumask *cpu_llc_shared_mask(int cpu) |
154 | { |
155 | return per_cpu(cpu_llc_shared_map, cpu); |
156 | } |
157 | |
158 | static inline struct cpumask *cpu_l2c_shared_mask(int cpu) |
159 | { |
160 | return per_cpu(cpu_l2c_shared_map, cpu); |
161 | } |
162 | |
163 | #else /* !CONFIG_SMP */ |
164 | #define wbinvd_on_cpu(cpu) wbinvd() |
165 | static inline int wbinvd_on_all_cpus(void) |
166 | { |
167 | wbinvd(); |
168 | return 0; |
169 | } |
170 | |
171 | static inline struct cpumask *cpu_llc_shared_mask(int cpu) |
172 | { |
173 | return (struct cpumask *)cpumask_of(0); |
174 | } |
175 | #endif /* CONFIG_SMP */ |
176 | |
177 | extern unsigned disabled_cpus; |
178 | |
179 | #ifdef CONFIG_DEBUG_NMI_SELFTEST |
180 | extern void nmi_selftest(void); |
181 | #else |
182 | #define nmi_selftest() do { } while (0) |
183 | #endif |
184 | |
185 | extern unsigned int smpboot_control; |
186 | extern unsigned long apic_mmio_base; |
187 | |
188 | #endif /* !__ASSEMBLY__ */ |
189 | |
190 | /* Control bits for startup_64 */ |
191 | #define STARTUP_READ_APICID 0x80000000 |
192 | |
193 | /* Top 8 bits are reserved for control */ |
194 | #define STARTUP_PARALLEL_MASK 0xFF000000 |
195 | |
196 | #endif /* _ASM_X86_SMP_H */ |
197 | |