1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | #ifndef __KVM_X86_VMX_POSTED_INTR_H |
3 | #define __KVM_X86_VMX_POSTED_INTR_H |
4 | |
5 | #define POSTED_INTR_ON 0 |
6 | #define POSTED_INTR_SN 1 |
7 | |
8 | #define PID_TABLE_ENTRY_VALID 1 |
9 | |
10 | /* Posted-Interrupt Descriptor */ |
11 | struct pi_desc { |
12 | u32 pir[8]; /* Posted interrupt requested */ |
13 | union { |
14 | struct { |
15 | /* bit 256 - Outstanding Notification */ |
16 | u16 on : 1, |
17 | /* bit 257 - Suppress Notification */ |
18 | sn : 1, |
19 | /* bit 271:258 - Reserved */ |
20 | rsvd_1 : 14; |
21 | /* bit 279:272 - Notification Vector */ |
22 | u8 nv; |
23 | /* bit 287:280 - Reserved */ |
24 | u8 rsvd_2; |
25 | /* bit 319:288 - Notification Destination */ |
26 | u32 ndst; |
27 | }; |
28 | u64 control; |
29 | }; |
30 | u32 rsvd[6]; |
31 | } __aligned(64); |
32 | |
33 | static inline bool pi_test_and_set_on(struct pi_desc *pi_desc) |
34 | { |
35 | return test_and_set_bit(POSTED_INTR_ON, |
36 | addr: (unsigned long *)&pi_desc->control); |
37 | } |
38 | |
39 | static inline bool pi_test_and_clear_on(struct pi_desc *pi_desc) |
40 | { |
41 | return test_and_clear_bit(POSTED_INTR_ON, |
42 | addr: (unsigned long *)&pi_desc->control); |
43 | } |
44 | |
45 | static inline bool pi_test_and_clear_sn(struct pi_desc *pi_desc) |
46 | { |
47 | return test_and_clear_bit(POSTED_INTR_SN, |
48 | addr: (unsigned long *)&pi_desc->control); |
49 | } |
50 | |
51 | static inline bool pi_test_and_set_pir(int vector, struct pi_desc *pi_desc) |
52 | { |
53 | return test_and_set_bit(nr: vector, addr: (unsigned long *)pi_desc->pir); |
54 | } |
55 | |
56 | static inline bool pi_is_pir_empty(struct pi_desc *pi_desc) |
57 | { |
58 | return bitmap_empty(src: (unsigned long *)pi_desc->pir, NR_VECTORS); |
59 | } |
60 | |
61 | static inline void pi_set_sn(struct pi_desc *pi_desc) |
62 | { |
63 | set_bit(POSTED_INTR_SN, |
64 | addr: (unsigned long *)&pi_desc->control); |
65 | } |
66 | |
67 | static inline void pi_set_on(struct pi_desc *pi_desc) |
68 | { |
69 | set_bit(POSTED_INTR_ON, |
70 | addr: (unsigned long *)&pi_desc->control); |
71 | } |
72 | |
73 | static inline void pi_clear_on(struct pi_desc *pi_desc) |
74 | { |
75 | clear_bit(POSTED_INTR_ON, |
76 | addr: (unsigned long *)&pi_desc->control); |
77 | } |
78 | |
79 | static inline void pi_clear_sn(struct pi_desc *pi_desc) |
80 | { |
81 | clear_bit(POSTED_INTR_SN, |
82 | addr: (unsigned long *)&pi_desc->control); |
83 | } |
84 | |
85 | static inline bool pi_test_on(struct pi_desc *pi_desc) |
86 | { |
87 | return test_bit(POSTED_INTR_ON, |
88 | (unsigned long *)&pi_desc->control); |
89 | } |
90 | |
91 | static inline bool pi_test_sn(struct pi_desc *pi_desc) |
92 | { |
93 | return test_bit(POSTED_INTR_SN, |
94 | (unsigned long *)&pi_desc->control); |
95 | } |
96 | |
97 | void vmx_vcpu_pi_load(struct kvm_vcpu *vcpu, int cpu); |
98 | void vmx_vcpu_pi_put(struct kvm_vcpu *vcpu); |
99 | void pi_wakeup_handler(void); |
100 | void __init pi_init_cpu(int cpu); |
101 | bool pi_has_pending_interrupt(struct kvm_vcpu *vcpu); |
102 | int vmx_pi_update_irte(struct kvm *kvm, unsigned int host_irq, |
103 | uint32_t guest_irq, bool set); |
104 | void vmx_pi_start_assignment(struct kvm *kvm); |
105 | |
106 | #endif /* __KVM_X86_VMX_POSTED_INTR_H */ |
107 | |