1	// SPDX-License-Identifier: GPL-2.0
2	//
3	// Register map access API
4	//
5	// Copyright 2011 Wolfson Microelectronics plc
6	//
7	// Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8
9	#include <linux/device.h>
10	#include <linux/slab.h>
11	#include <linux/export.h>
12	#include <linux/mutex.h>
13	#include <linux/err.h>
14	#include <linux/property.h>
15	#include <linux/rbtree.h>
16	#include <linux/sched.h>
17	#include <linux/delay.h>
18	#include <linux/log2.h>
19	#include <linux/hwspinlock.h>
20	#include <asm/unaligned.h>
21
22	#define CREATE_TRACE_POINTS
23	#include "trace.h"
24
25	#include "internal.h"
26
27	/*
28	* Sometimes for failures during very early init the trace
29	* infrastructure isn't available early enough to be used. For this
30	* sort of problem defining LOG_DEVICE will add printks for basic
31	* register I/O on a specific device.
32	*/
33	#undef LOG_DEVICE
34
35	#ifdef LOG_DEVICE
36	static inline bool regmap_should_log(struct regmap *map)
37	{
38	return (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0);
39	}
40	#else
41	static inline bool regmap_should_log(struct regmap *map) { return false; }
42	#endif
43
44
45	static int _regmap_update_bits(struct regmap *map, unsigned int reg,
46	unsigned int mask, unsigned int val,
47	bool *change, bool force_write);
48
49	static int _regmap_bus_reg_read(void *context, unsigned int reg,
50	unsigned int *val);
51	static int _regmap_bus_read(void *context, unsigned int reg,
52	unsigned int *val);
53	static int _regmap_bus_formatted_write(void *context, unsigned int reg,
54	unsigned int val);
55	static int _regmap_bus_reg_write(void *context, unsigned int reg,
56	unsigned int val);
57	static int _regmap_bus_raw_write(void *context, unsigned int reg,
58	unsigned int val);
59
60	bool regmap_reg_in_ranges(unsigned int reg,
61	const struct regmap_range *ranges,
62	unsigned int nranges)
63	{
64	const struct regmap_range *r;
65	int i;
66
67	for (i = 0, r = ranges; i < nranges; i++, r++)
68	if (regmap_reg_in_range(reg, range: r))
69	return true;
70	return false;
71	}
72	EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
73
74	bool regmap_check_range_table(struct regmap *map, unsigned int reg,
75	const struct regmap_access_table *table)
76	{
77	/* Check "no ranges" first */
78	if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
79	return false;
80
81	/* In case zero "yes ranges" are supplied, any reg is OK */
82	if (!table->n_yes_ranges)
83	return true;
84
85	return regmap_reg_in_ranges(reg, table->yes_ranges,
86	table->n_yes_ranges);
87	}
88	EXPORT_SYMBOL_GPL(regmap_check_range_table);
89
90	bool regmap_writeable(struct regmap *map, unsigned int reg)
91	{
92	if (map->max_register_is_set && reg > map->max_register)
93	return false;
94
95	if (map->writeable_reg)
96	return map->writeable_reg(map->dev, reg);
97
98	if (map->wr_table)
99	return regmap_check_range_table(map, reg, map->wr_table);
100
101	return true;
102	}
103
104	bool regmap_cached(struct regmap *map, unsigned int reg)
105	{
106	int ret;
107	unsigned int val;
108
109	if (map->cache_type == REGCACHE_NONE)
110	return false;
111
112	if (!map->cache_ops)
113	return false;
114
115	if (map->max_register_is_set && reg > map->max_register)
116	return false;
117
118	map->lock(map->lock_arg);
119	ret = regcache_read(map, reg, value: &val);
120	map->unlock(map->lock_arg);
121	if (ret)
122	return false;
123
124	return true;
125	}
126
127	bool regmap_readable(struct regmap *map, unsigned int reg)
128	{
129	if (!map->reg_read)
130	return false;
131
132	if (map->max_register_is_set && reg > map->max_register)
133	return false;
134
135	if (map->format.format_write)
136	return false;
137
138	if (map->readable_reg)
139	return map->readable_reg(map->dev, reg);
140
141	if (map->rd_table)
142	return regmap_check_range_table(map, reg, map->rd_table);
143
144	return true;
145	}
146
147	bool regmap_volatile(struct regmap *map, unsigned int reg)
148	{
149	if (!map->format.format_write && !regmap_readable(map, reg))
150	return false;
151
152	if (map->volatile_reg)
153	return map->volatile_reg(map->dev, reg);
154
155	if (map->volatile_table)
156	return regmap_check_range_table(map, reg, map->volatile_table);
157
158	if (map->cache_ops)
159	return false;
160	else
161	return true;
162	}
163
164	bool regmap_precious(struct regmap *map, unsigned int reg)
165	{
166	if (!regmap_readable(map, reg))
167	return false;
168
169	if (map->precious_reg)
170	return map->precious_reg(map->dev, reg);
171
172	if (map->precious_table)
173	return regmap_check_range_table(map, reg, map->precious_table);
174
175	return false;
176	}
177
178	bool regmap_writeable_noinc(struct regmap *map, unsigned int reg)
179	{
180	if (map->writeable_noinc_reg)
181	return map->writeable_noinc_reg(map->dev, reg);
182
183	if (map->wr_noinc_table)
184	return regmap_check_range_table(map, reg, map->wr_noinc_table);
185
186	return true;
187	}
188
189	bool regmap_readable_noinc(struct regmap *map, unsigned int reg)
190	{
191	if (map->readable_noinc_reg)
192	return map->readable_noinc_reg(map->dev, reg);
193
194	if (map->rd_noinc_table)
195	return regmap_check_range_table(map, reg, map->rd_noinc_table);
196
197	return true;
198	}
199
200	static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
201	size_t num)
202	{
203	unsigned int i;
204
205	for (i = 0; i < num; i++)
206	if (!regmap_volatile(map, reg: reg + regmap_get_offset(map, index: i)))
207	return false;
208
209	return true;
210	}
211
212	static void regmap_format_12_20_write(struct regmap *map,
213	unsigned int reg, unsigned int val)
214	{
215	u8 *out = map->work_buf;
216
217	out[0] = reg >> 4;
218	out[1] = (reg << 4) | (val >> 16);
219	out[2] = val >> 8;
220	out[3] = val;
221	}
222
223
224	static void regmap_format_2_6_write(struct regmap *map,
225	unsigned int reg, unsigned int val)
226	{
227	u8 *out = map->work_buf;
228
229	*out = (reg << 6) | val;
230	}
231
232	static void regmap_format_4_12_write(struct regmap *map,
233	unsigned int reg, unsigned int val)
234	{
235	__be16 *out = map->work_buf;
236	*out = cpu_to_be16((reg << 12) | val);
237	}
238
239	static void regmap_format_7_9_write(struct regmap *map,
240	unsigned int reg, unsigned int val)
241	{
242	__be16 *out = map->work_buf;
243	*out = cpu_to_be16((reg << 9) | val);
244	}
245
246	static void regmap_format_7_17_write(struct regmap *map,
247	unsigned int reg, unsigned int val)
248	{
249	u8 *out = map->work_buf;
250
251	out[2] = val;
252	out[1] = val >> 8;
253	out[0] = (val >> 16) | (reg << 1);
254	}
255
256	static void regmap_format_10_14_write(struct regmap *map,
257	unsigned int reg, unsigned int val)
258	{
259	u8 *out = map->work_buf;
260
261	out[2] = val;
262	out[1] = (val >> 8) | (reg << 6);
263	out[0] = reg >> 2;
264	}
265
266	static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
267	{
268	u8 *b = buf;
269
270	b[0] = val << shift;
271	}
272
273	static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
274	{
275	put_unaligned_be16(val: val << shift, p: buf);
276	}
277
278	static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift)
279	{
280	put_unaligned_le16(val: val << shift, p: buf);
281	}
282
283	static void regmap_format_16_native(void *buf, unsigned int val,
284	unsigned int shift)
285	{
286	u16 v = val << shift;
287
288	memcpy(buf, &v, sizeof(v));
289	}
290
291	static void regmap_format_24_be(void *buf, unsigned int val, unsigned int shift)
292	{
293	put_unaligned_be24(val: val << shift, p: buf);
294	}
295
296	static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
297	{
298	put_unaligned_be32(val: val << shift, p: buf);
299	}
300
301	static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift)
302	{
303	put_unaligned_le32(val: val << shift, p: buf);
304	}
305
306	static void regmap_format_32_native(void *buf, unsigned int val,
307	unsigned int shift)
308	{
309	u32 v = val << shift;
310
311	memcpy(buf, &v, sizeof(v));
312	}
313
314	static void regmap_parse_inplace_noop(void *buf)
315	{
316	}
317
318	static unsigned int regmap_parse_8(const void *buf)
319	{
320	const u8 *b = buf;
321
322	return b[0];
323	}
324
325	static unsigned int regmap_parse_16_be(const void *buf)
326	{
327	return get_unaligned_be16(p: buf);
328	}
329
330	static unsigned int regmap_parse_16_le(const void *buf)
331	{
332	return get_unaligned_le16(p: buf);
333	}
334
335	static void regmap_parse_16_be_inplace(void *buf)
336	{
337	u16 v = get_unaligned_be16(p: buf);
338
339	memcpy(buf, &v, sizeof(v));
340	}
341
342	static void regmap_parse_16_le_inplace(void *buf)
343	{
344	u16 v = get_unaligned_le16(p: buf);
345
346	memcpy(buf, &v, sizeof(v));
347	}
348
349	static unsigned int regmap_parse_16_native(const void *buf)
350	{
351	u16 v;
352
353	memcpy(&v, buf, sizeof(v));
354	return v;
355	}
356
357	static unsigned int regmap_parse_24_be(const void *buf)
358	{
359	return get_unaligned_be24(p: buf);
360	}
361
362	static unsigned int regmap_parse_32_be(const void *buf)
363	{
364	return get_unaligned_be32(p: buf);
365	}
366
367	static unsigned int regmap_parse_32_le(const void *buf)
368	{
369	return get_unaligned_le32(p: buf);
370	}
371
372	static void regmap_parse_32_be_inplace(void *buf)
373	{
374	u32 v = get_unaligned_be32(p: buf);
375
376	memcpy(buf, &v, sizeof(v));
377	}
378
379	static void regmap_parse_32_le_inplace(void *buf)
380	{
381	u32 v = get_unaligned_le32(p: buf);
382
383	memcpy(buf, &v, sizeof(v));
384	}
385
386	static unsigned int regmap_parse_32_native(const void *buf)
387	{
388	u32 v;
389
390	memcpy(&v, buf, sizeof(v));
391	return v;
392	}
393
394	static void regmap_lock_hwlock(void *__map)
395	{
396	struct regmap *map = __map;
397
398	hwspin_lock_timeout(hwlock: map->hwlock, UINT_MAX);
399	}
400
401	static void regmap_lock_hwlock_irq(void *__map)
402	{
403	struct regmap *map = __map;
404
405	hwspin_lock_timeout_irq(hwlock: map->hwlock, UINT_MAX);
406	}
407
408	static void regmap_lock_hwlock_irqsave(void *__map)
409	{
410	struct regmap *map = __map;
411
412	hwspin_lock_timeout_irqsave(hwlock: map->hwlock, UINT_MAX,
413	flags: &map->spinlock_flags);
414	}
415
416	static void regmap_unlock_hwlock(void *__map)
417	{
418	struct regmap *map = __map;
419
420	hwspin_unlock(hwlock: map->hwlock);
421	}
422
423	static void regmap_unlock_hwlock_irq(void *__map)
424	{
425	struct regmap *map = __map;
426
427	hwspin_unlock_irq(hwlock: map->hwlock);
428	}
429
430	static void regmap_unlock_hwlock_irqrestore(void *__map)
431	{
432	struct regmap *map = __map;
433
434	hwspin_unlock_irqrestore(hwlock: map->hwlock, flags: &map->spinlock_flags);
435	}
436
437	static void regmap_lock_unlock_none(void *__map)
438	{
439
440	}
441
442	static void regmap_lock_mutex(void *__map)
443	{
444	struct regmap *map = __map;
445	mutex_lock(&map->mutex);
446	}
447
448	static void regmap_unlock_mutex(void *__map)
449	{
450	struct regmap *map = __map;
451	mutex_unlock(lock: &map->mutex);
452	}
453
454	static void regmap_lock_spinlock(void *__map)
455	__acquires(&map->spinlock)
456	{
457	struct regmap *map = __map;
458	unsigned long flags;
459
460	spin_lock_irqsave(&map->spinlock, flags);
461	map->spinlock_flags = flags;
462	}
463
464	static void regmap_unlock_spinlock(void *__map)
465	__releases(&map->spinlock)
466	{
467	struct regmap *map = __map;
468	spin_unlock_irqrestore(lock: &map->spinlock, flags: map->spinlock_flags);
469	}
470
471	static void regmap_lock_raw_spinlock(void *__map)
472	__acquires(&map->raw_spinlock)
473	{
474	struct regmap *map = __map;
475	unsigned long flags;
476
477	raw_spin_lock_irqsave(&map->raw_spinlock, flags);
478	map->raw_spinlock_flags = flags;
479	}
480
481	static void regmap_unlock_raw_spinlock(void *__map)
482	__releases(&map->raw_spinlock)
483	{
484	struct regmap *map = __map;
485	raw_spin_unlock_irqrestore(&map->raw_spinlock, map->raw_spinlock_flags);
486	}
487
488	static void dev_get_regmap_release(struct device *dev, void *res)
489	{
490	/*
491	* We don't actually have anything to do here; the goal here
492	* is not to manage the regmap but to provide a simple way to
493	* get the regmap back given a struct device.
494	*/
495	}
496
497	static bool _regmap_range_add(struct regmap *map,
498	struct regmap_range_node *data)
499	{
500	struct rb_root *root = &map->range_tree;
501	struct rb_node **new = &(root->rb_node), *parent = NULL;
502
503	while (*new) {
504	struct regmap_range_node *this =
505	rb_entry(*new, struct regmap_range_node, node);
506
507	parent = *new;
508	if (data->range_max < this->range_min)
509	new = &((*new)->rb_left);
510	else if (data->range_min > this->range_max)
511	new = &((*new)->rb_right);
512	else
513	return false;
514	}
515
516	rb_link_node(node: &data->node, parent, rb_link: new);
517	rb_insert_color(&data->node, root);
518
519	return true;
520	}
521
522	static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
523	unsigned int reg)
524	{
525	struct rb_node *node = map->range_tree.rb_node;
526
527	while (node) {
528	struct regmap_range_node *this =
529	rb_entry(node, struct regmap_range_node, node);
530
531	if (reg < this->range_min)
532	node = node->rb_left;
533	else if (reg > this->range_max)
534	node = node->rb_right;
535	else
536	return this;
537	}
538
539	return NULL;
540	}
541
542	static void regmap_range_exit(struct regmap *map)
543	{
544	struct rb_node *next;
545	struct regmap_range_node *range_node;
546
547	next = rb_first(&map->range_tree);
548	while (next) {
549	range_node = rb_entry(next, struct regmap_range_node, node);
550	next = rb_next(&range_node->node);
551	rb_erase(&range_node->node, &map->range_tree);
552	kfree(objp: range_node);
553	}
554
555	kfree(objp: map->selector_work_buf);
556	}
557
558	static int regmap_set_name(struct regmap *map, const struct regmap_config *config)
559	{
560	if (config->name) {
561	const char *name = kstrdup_const(s: config->name, GFP_KERNEL);
562
563	if (!name)
564	return -ENOMEM;
565
566	kfree_const(x: map->name);
567	map->name = name;
568	}
569
570	return 0;
571	}
572
573	int regmap_attach_dev(struct device *dev, struct regmap *map,
574	const struct regmap_config *config)
575	{
576	struct regmap **m;
577	int ret;
578
579	map->dev = dev;
580
581	ret = regmap_set_name(map, config);
582	if (ret)
583	return ret;
584
585	regmap_debugfs_exit(map);
586	regmap_debugfs_init(map);
587
588	/* Add a devres resource for dev_get_regmap() */
589	m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
590	if (!m) {
591	regmap_debugfs_exit(map);
592	return -ENOMEM;
593	}
594	*m = map;
595	devres_add(dev, res: m);
596
597	return 0;
598	}
599	EXPORT_SYMBOL_GPL(regmap_attach_dev);
600
601	static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus,
602	const struct regmap_config *config)
603	{
604	enum regmap_endian endian;
605
606	/* Retrieve the endianness specification from the regmap config */
607	endian = config->reg_format_endian;
608
609	/* If the regmap config specified a non-default value, use that */
610	if (endian != REGMAP_ENDIAN_DEFAULT)
611	return endian;
612
613	/* Retrieve the endianness specification from the bus config */
614	if (bus && bus->reg_format_endian_default)
615	endian = bus->reg_format_endian_default;
616
617	/* If the bus specified a non-default value, use that */
618	if (endian != REGMAP_ENDIAN_DEFAULT)
619	return endian;
620
621	/* Use this if no other value was found */
622	return REGMAP_ENDIAN_BIG;
623	}
624
625	enum regmap_endian regmap_get_val_endian(struct device *dev,
626	const struct regmap_bus *bus,
627	const struct regmap_config *config)
628	{
629	struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
630	enum regmap_endian endian;
631
632	/* Retrieve the endianness specification from the regmap config */
633	endian = config->val_format_endian;
634
635	/* If the regmap config specified a non-default value, use that */
636	if (endian != REGMAP_ENDIAN_DEFAULT)
637	return endian;
638
639	/* If the firmware node exist try to get endianness from it */
640	if (fwnode_property_read_bool(fwnode, propname: "big-endian"))
641	endian = REGMAP_ENDIAN_BIG;
642	else if (fwnode_property_read_bool(fwnode, propname: "little-endian"))
643	endian = REGMAP_ENDIAN_LITTLE;
644	else if (fwnode_property_read_bool(fwnode, propname: "native-endian"))
645	endian = REGMAP_ENDIAN_NATIVE;
646
647	/* If the endianness was specified in fwnode, use that */
648	if (endian != REGMAP_ENDIAN_DEFAULT)
649	return endian;
650
651	/* Retrieve the endianness specification from the bus config */
652	if (bus && bus->val_format_endian_default)
653	endian = bus->val_format_endian_default;
654
655	/* If the bus specified a non-default value, use that */
656	if (endian != REGMAP_ENDIAN_DEFAULT)
657	return endian;
658
659	/* Use this if no other value was found */
660	return REGMAP_ENDIAN_BIG;
661	}
662	EXPORT_SYMBOL_GPL(regmap_get_val_endian);
663
664	struct regmap *__regmap_init(struct device *dev,
665	const struct regmap_bus *bus,
666	void *bus_context,
667	const struct regmap_config *config,
668	struct lock_class_key *lock_key,
669	const char *lock_name)
670	{
671	struct regmap *map;
672	int ret = -EINVAL;
673	enum regmap_endian reg_endian, val_endian;
674	int i, j;
675
676	if (!config)
677	goto err;
678
679	map = kzalloc(size: sizeof(*map), GFP_KERNEL);
680	if (map == NULL) {
681	ret = -ENOMEM;
682	goto err;
683	}
684
685	ret = regmap_set_name(map, config);
686	if (ret)
687	goto err_map;
688
689	ret = -EINVAL; /* Later error paths rely on this */
690
691	if (config->disable_locking) {
692	map->lock = map->unlock = regmap_lock_unlock_none;
693	map->can_sleep = config->can_sleep;
694	regmap_debugfs_disable(map);
695	} else if (config->lock && config->unlock) {
696	map->lock = config->lock;
697	map->unlock = config->unlock;
698	map->lock_arg = config->lock_arg;
699	map->can_sleep = config->can_sleep;
700	} else if (config->use_hwlock) {
701	map->hwlock = hwspin_lock_request_specific(id: config->hwlock_id);
702	if (!map->hwlock) {
703	ret = -ENXIO;
704	goto err_name;
705	}
706
707	switch (config->hwlock_mode) {
708	case HWLOCK_IRQSTATE:
709	map->lock = regmap_lock_hwlock_irqsave;
710	map->unlock = regmap_unlock_hwlock_irqrestore;
711	break;
712	case HWLOCK_IRQ:
713	map->lock = regmap_lock_hwlock_irq;
714	map->unlock = regmap_unlock_hwlock_irq;
715	break;
716	default:
717	map->lock = regmap_lock_hwlock;
718	map->unlock = regmap_unlock_hwlock;
719	break;
720	}
721
722	map->lock_arg = map;
723	} else {
724	if ((bus && bus->fast_io) ||
725	config->fast_io) {
726	if (config->use_raw_spinlock) {
727	raw_spin_lock_init(&map->raw_spinlock);
728	map->lock = regmap_lock_raw_spinlock;
729	map->unlock = regmap_unlock_raw_spinlock;
730	lockdep_set_class_and_name(&map->raw_spinlock,
731	lock_key, lock_name);
732	} else {
733	spin_lock_init(&map->spinlock);
734	map->lock = regmap_lock_spinlock;
735	map->unlock = regmap_unlock_spinlock;
736	lockdep_set_class_and_name(&map->spinlock,
737	lock_key, lock_name);
738	}
739	} else {
740	mutex_init(&map->mutex);
741	map->lock = regmap_lock_mutex;
742	map->unlock = regmap_unlock_mutex;
743	map->can_sleep = true;
744	lockdep_set_class_and_name(&map->mutex,
745	lock_key, lock_name);
746	}
747	map->lock_arg = map;
748	}
749
750	/*
751	* When we write in fast-paths with regmap_bulk_write() don't allocate
752	* scratch buffers with sleeping allocations.
753	*/
754	if ((bus && bus->fast_io) || config->fast_io)
755	map->alloc_flags = GFP_ATOMIC;
756	else
757	map->alloc_flags = GFP_KERNEL;
758
759	map->reg_base = config->reg_base;
760
761	map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
762	map->format.pad_bytes = config->pad_bits / 8;
763	map->format.reg_shift = config->reg_shift;
764	map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
765	map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
766	config->val_bits + config->pad_bits, 8);
767	map->reg_shift = config->pad_bits % 8;
768	if (config->reg_stride)
769	map->reg_stride = config->reg_stride;
770	else
771	map->reg_stride = 1;
772	if (is_power_of_2(n: map->reg_stride))
773	map->reg_stride_order = ilog2(map->reg_stride);
774	else
775	map->reg_stride_order = -1;
776	map->use_single_read = config->use_single_read || !(config->read || (bus && bus->read));
777	map->use_single_write = config->use_single_write || !(config->write || (bus && bus->write));
778	map->can_multi_write = config->can_multi_write && (config->write || (bus && bus->write));
779	if (bus) {
780	map->max_raw_read = bus->max_raw_read;
781	map->max_raw_write = bus->max_raw_write;
782	} else if (config->max_raw_read && config->max_raw_write) {
783	map->max_raw_read = config->max_raw_read;
784	map->max_raw_write = config->max_raw_write;
785	}
786	map->dev = dev;
787	map->bus = bus;
788	map->bus_context = bus_context;
789	map->max_register = config->max_register;
790	map->max_register_is_set = map->max_register ?: config->max_register_is_0;
791	map->wr_table = config->wr_table;
792	map->rd_table = config->rd_table;
793	map->volatile_table = config->volatile_table;
794	map->precious_table = config->precious_table;
795	map->wr_noinc_table = config->wr_noinc_table;
796	map->rd_noinc_table = config->rd_noinc_table;
797	map->writeable_reg = config->writeable_reg;
798	map->readable_reg = config->readable_reg;
799	map->volatile_reg = config->volatile_reg;
800	map->precious_reg = config->precious_reg;
801	map->writeable_noinc_reg = config->writeable_noinc_reg;
802	map->readable_noinc_reg = config->readable_noinc_reg;
803	map->cache_type = config->cache_type;
804
805	spin_lock_init(&map->async_lock);
806	INIT_LIST_HEAD(list: &map->async_list);
807	INIT_LIST_HEAD(list: &map->async_free);
808	init_waitqueue_head(&map->async_waitq);
809
810	if (config->read_flag_mask ||
811	config->write_flag_mask ||
812	config->zero_flag_mask) {
813	map->read_flag_mask = config->read_flag_mask;
814	map->write_flag_mask = config->write_flag_mask;
815	} else if (bus) {
816	map->read_flag_mask = bus->read_flag_mask;
817	}
818
819	if (config && config->read && config->write) {
820	map->reg_read = _regmap_bus_read;
821	if (config->reg_update_bits)
822	map->reg_update_bits = config->reg_update_bits;
823
824	/* Bulk read/write */
825	map->read = config->read;
826	map->write = config->write;
827
828	reg_endian = REGMAP_ENDIAN_NATIVE;
829	val_endian = REGMAP_ENDIAN_NATIVE;
830	} else if (!bus) {
831	map->reg_read = config->reg_read;
832	map->reg_write = config->reg_write;
833	map->reg_update_bits = config->reg_update_bits;
834
835	map->defer_caching = false;
836	goto skip_format_initialization;
837	} else if (!bus->read || !bus->write) {
838	map->reg_read = _regmap_bus_reg_read;
839	map->reg_write = _regmap_bus_reg_write;
840	map->reg_update_bits = bus->reg_update_bits;
841
842	map->defer_caching = false;
843	goto skip_format_initialization;
844	} else {
845	map->reg_read = _regmap_bus_read;
846	map->reg_update_bits = bus->reg_update_bits;
847	/* Bulk read/write */
848	map->read = bus->read;
849	map->write = bus->write;
850
851	reg_endian = regmap_get_reg_endian(bus, config);
852	val_endian = regmap_get_val_endian(dev, bus, config);
853	}
854
855	switch (config->reg_bits + map->reg_shift) {
856	case 2:
857	switch (config->val_bits) {
858	case 6:
859	map->format.format_write = regmap_format_2_6_write;
860	break;
861	default:
862	goto err_hwlock;
863	}
864	break;
865
866	case 4:
867	switch (config->val_bits) {
868	case 12:
869	map->format.format_write = regmap_format_4_12_write;
870	break;
871	default:
872	goto err_hwlock;
873	}
874	break;
875
876	case 7:
877	switch (config->val_bits) {
878	case 9:
879	map->format.format_write = regmap_format_7_9_write;
880	break;
881	case 17:
882	map->format.format_write = regmap_format_7_17_write;
883	break;
884	default:
885	goto err_hwlock;
886	}
887	break;
888
889	case 10:
890	switch (config->val_bits) {
891	case 14:
892	map->format.format_write = regmap_format_10_14_write;
893	break;
894	default:
895	goto err_hwlock;
896	}
897	break;
898
899	case 12:
900	switch (config->val_bits) {
901	case 20:
902	map->format.format_write = regmap_format_12_20_write;
903	break;
904	default:
905	goto err_hwlock;
906	}
907	break;
908
909	case 8:
910	map->format.format_reg = regmap_format_8;
911	break;
912
913	case 16:
914	switch (reg_endian) {
915	case REGMAP_ENDIAN_BIG:
916	map->format.format_reg = regmap_format_16_be;
917	break;
918	case REGMAP_ENDIAN_LITTLE:
919	map->format.format_reg = regmap_format_16_le;
920	break;
921	case REGMAP_ENDIAN_NATIVE:
922	map->format.format_reg = regmap_format_16_native;
923	break;
924	default:
925	goto err_hwlock;
926	}
927	break;
928
929	case 24:
930	switch (reg_endian) {
931	case REGMAP_ENDIAN_BIG:
932	map->format.format_reg = regmap_format_24_be;
933	break;
934	default:
935	goto err_hwlock;
936	}
937	break;
938
939	case 32:
940	switch (reg_endian) {
941	case REGMAP_ENDIAN_BIG:
942	map->format.format_reg = regmap_format_32_be;
943	break;
944	case REGMAP_ENDIAN_LITTLE:
945	map->format.format_reg = regmap_format_32_le;
946	break;
947	case REGMAP_ENDIAN_NATIVE:
948	map->format.format_reg = regmap_format_32_native;
949	break;
950	default:
951	goto err_hwlock;
952	}
953	break;
954
955	default:
956	goto err_hwlock;
957	}
958
959	if (val_endian == REGMAP_ENDIAN_NATIVE)
960	map->format.parse_inplace = regmap_parse_inplace_noop;
961
962	switch (config->val_bits) {
963	case 8:
964	map->format.format_val = regmap_format_8;
965	map->format.parse_val = regmap_parse_8;
966	map->format.parse_inplace = regmap_parse_inplace_noop;
967	break;
968	case 16:
969	switch (val_endian) {
970	case REGMAP_ENDIAN_BIG:
971	map->format.format_val = regmap_format_16_be;
972	map->format.parse_val = regmap_parse_16_be;
973	map->format.parse_inplace = regmap_parse_16_be_inplace;
974	break;
975	case REGMAP_ENDIAN_LITTLE:
976	map->format.format_val = regmap_format_16_le;
977	map->format.parse_val = regmap_parse_16_le;
978	map->format.parse_inplace = regmap_parse_16_le_inplace;
979	break;
980	case REGMAP_ENDIAN_NATIVE:
981	map->format.format_val = regmap_format_16_native;
982	map->format.parse_val = regmap_parse_16_native;
983	break;
984	default:
985	goto err_hwlock;
986	}
987	break;
988	case 24:
989	switch (val_endian) {
990	case REGMAP_ENDIAN_BIG:
991	map->format.format_val = regmap_format_24_be;
992	map->format.parse_val = regmap_parse_24_be;
993	break;
994	default:
995	goto err_hwlock;
996	}
997	break;
998	case 32:
999	switch (val_endian) {
1000	case REGMAP_ENDIAN_BIG:
1001	map->format.format_val = regmap_format_32_be;
1002	map->format.parse_val = regmap_parse_32_be;
1003	map->format.parse_inplace = regmap_parse_32_be_inplace;
1004	break;
1005	case REGMAP_ENDIAN_LITTLE:
1006	map->format.format_val = regmap_format_32_le;
1007	map->format.parse_val = regmap_parse_32_le;
1008	map->format.parse_inplace = regmap_parse_32_le_inplace;
1009	break;
1010	case REGMAP_ENDIAN_NATIVE:
1011	map->format.format_val = regmap_format_32_native;
1012	map->format.parse_val = regmap_parse_32_native;
1013	break;
1014	default:
1015	goto err_hwlock;
1016	}
1017	break;
1018	}
1019
1020	if (map->format.format_write) {
1021	if ((reg_endian != REGMAP_ENDIAN_BIG) ||
1022	(val_endian != REGMAP_ENDIAN_BIG))
1023	goto err_hwlock;
1024	map->use_single_write = true;
1025	}
1026
1027	if (!map->format.format_write &&
1028	!(map->format.format_reg && map->format.format_val))
1029	goto err_hwlock;
1030
1031	map->work_buf = kzalloc(size: map->format.buf_size, GFP_KERNEL);
1032	if (map->work_buf == NULL) {
1033	ret = -ENOMEM;
1034	goto err_hwlock;
1035	}
1036
1037	if (map->format.format_write) {
1038	map->defer_caching = false;
1039	map->reg_write = _regmap_bus_formatted_write;
1040	} else if (map->format.format_val) {
1041	map->defer_caching = true;
1042	map->reg_write = _regmap_bus_raw_write;
1043	}
1044
1045	skip_format_initialization:
1046
1047	map->range_tree = RB_ROOT;
1048	for (i = 0; i < config->num_ranges; i++) {
1049	const struct regmap_range_cfg *range_cfg = &config->ranges[i];
1050	struct regmap_range_node *new;
1051
1052	/* Sanity check */
1053	if (range_cfg->range_max < range_cfg->range_min) {
1054	dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
1055	range_cfg->range_max, range_cfg->range_min);
1056	goto err_range;
1057	}
1058
1059	if (range_cfg->range_max > map->max_register) {
1060	dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
1061	range_cfg->range_max, map->max_register);
1062	goto err_range;
1063	}
1064
1065	if (range_cfg->selector_reg > map->max_register) {
1066	dev_err(map->dev,
1067	"Invalid range %d: selector out of map\n", i);
1068	goto err_range;
1069	}
1070
1071	if (range_cfg->window_len == 0) {
1072	dev_err(map->dev, "Invalid range %d: window_len 0\n",
1073	i);
1074	goto err_range;
1075	}
1076
1077	/* Make sure, that this register range has no selector
1078	or data window within its boundary */
1079	for (j = 0; j < config->num_ranges; j++) {
1080	unsigned int sel_reg = config->ranges[j].selector_reg;
1081	unsigned int win_min = config->ranges[j].window_start;
1082	unsigned int win_max = win_min +
1083	config->ranges[j].window_len - 1;
1084
1085	/* Allow data window inside its own virtual range */
1086	if (j == i)
1087	continue;
1088
1089	if (range_cfg->range_min <= sel_reg &&
1090	sel_reg <= range_cfg->range_max) {
1091	dev_err(map->dev,
1092	"Range %d: selector for %d in window\n",
1093	i, j);
1094	goto err_range;
1095	}
1096
1097	if (!(win_max < range_cfg->range_min ||
1098	win_min > range_cfg->range_max)) {
1099	dev_err(map->dev,
1100	"Range %d: window for %d in window\n",
1101	i, j);
1102	goto err_range;
1103	}
1104	}
1105
1106	new = kzalloc(size: sizeof(*new), GFP_KERNEL);
1107	if (new == NULL) {
1108	ret = -ENOMEM;
1109	goto err_range;
1110	}
1111
1112	new->map = map;
1113	new->name = range_cfg->name;
1114	new->range_min = range_cfg->range_min;
1115	new->range_max = range_cfg->range_max;
1116	new->selector_reg = range_cfg->selector_reg;
1117	new->selector_mask = range_cfg->selector_mask;
1118	new->selector_shift = range_cfg->selector_shift;
1119	new->window_start = range_cfg->window_start;
1120	new->window_len = range_cfg->window_len;
1121
1122	if (!_regmap_range_add(map, data: new)) {
1123	dev_err(map->dev, "Failed to add range %d\n", i);
1124	kfree(objp: new);
1125	goto err_range;
1126	}
1127
1128	if (map->selector_work_buf == NULL) {
1129	map->selector_work_buf =
1130	kzalloc(size: map->format.buf_size, GFP_KERNEL);
1131	if (map->selector_work_buf == NULL) {
1132	ret = -ENOMEM;
1133	goto err_range;
1134	}
1135	}
1136	}
1137
1138	ret = regcache_init(map, config);
1139	if (ret != 0)
1140	goto err_range;
1141
1142	if (dev) {
1143	ret = regmap_attach_dev(dev, map, config);
1144	if (ret != 0)
1145	goto err_regcache;
1146	} else {
1147	regmap_debugfs_init(map);
1148	}
1149
1150	return map;
1151
1152	err_regcache:
1153	regcache_exit(map);
1154	err_range:
1155	regmap_range_exit(map);
1156	kfree(objp: map->work_buf);
1157	err_hwlock:
1158	if (map->hwlock)
1159	hwspin_lock_free(hwlock: map->hwlock);
1160	err_name:
1161	kfree_const(x: map->name);
1162	err_map:
1163	kfree(objp: map);
1164	err:
1165	return ERR_PTR(error: ret);
1166	}
1167	EXPORT_SYMBOL_GPL(__regmap_init);
1168
1169	static void devm_regmap_release(struct device *dev, void *res)
1170	{
1171	regmap_exit(map: *(struct regmap **)res);
1172	}
1173
1174	struct regmap *__devm_regmap_init(struct device *dev,
1175	const struct regmap_bus *bus,
1176	void *bus_context,
1177	const struct regmap_config *config,
1178	struct lock_class_key *lock_key,
1179	const char *lock_name)
1180	{
1181	struct regmap **ptr, *regmap;
1182
1183	ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
1184	if (!ptr)
1185	return ERR_PTR(error: -ENOMEM);
1186
1187	regmap = __regmap_init(dev, bus, bus_context, config,
1188	lock_key, lock_name);
1189	if (!IS_ERR(ptr: regmap)) {
1190	*ptr = regmap;
1191	devres_add(dev, res: ptr);
1192	} else {
1193	devres_free(res: ptr);
1194	}
1195
1196	return regmap;
1197	}
1198	EXPORT_SYMBOL_GPL(__devm_regmap_init);
1199
1200	static void regmap_field_init(struct regmap_field *rm_field,
1201	struct regmap *regmap, struct reg_field reg_field)
1202	{
1203	rm_field->regmap = regmap;
1204	rm_field->reg = reg_field.reg;
1205	rm_field->shift = reg_field.lsb;
1206	rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb);
1207
1208	WARN_ONCE(rm_field->mask == 0, "invalid empty mask defined\n");
1209
1210	rm_field->id_size = reg_field.id_size;
1211	rm_field->id_offset = reg_field.id_offset;
1212	}
1213
1214	/**
1215	* devm_regmap_field_alloc() - Allocate and initialise a register field.
1216	*
1217	* @dev: Device that will be interacted with
1218	* @regmap: regmap bank in which this register field is located.
1219	* @reg_field: Register field with in the bank.
1220	*
1221	* The return value will be an ERR_PTR() on error or a valid pointer
1222	* to a struct regmap_field. The regmap_field will be automatically freed
1223	* by the device management code.
1224	*/
1225	struct regmap_field *devm_regmap_field_alloc(struct device *dev,
1226	struct regmap *regmap, struct reg_field reg_field)
1227	{
1228	struct regmap_field *rm_field = devm_kzalloc(dev,
1229	size: sizeof(*rm_field), GFP_KERNEL);
1230	if (!rm_field)
1231	return ERR_PTR(error: -ENOMEM);
1232
1233	regmap_field_init(rm_field, regmap, reg_field);
1234
1235	return rm_field;
1236
1237	}
1238	EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
1239
1240
1241	/**
1242	* regmap_field_bulk_alloc() - Allocate and initialise a bulk register field.
1243	*
1244	* @regmap: regmap bank in which this register field is located.
1245	* @rm_field: regmap register fields within the bank.
1246	* @reg_field: Register fields within the bank.
1247	* @num_fields: Number of register fields.
1248	*
1249	* The return value will be an -ENOMEM on error or zero for success.
1250	* Newly allocated regmap_fields should be freed by calling
1251	* regmap_field_bulk_free()
1252	*/
1253	int regmap_field_bulk_alloc(struct regmap *regmap,
1254	struct regmap_field **rm_field,
1255	const struct reg_field *reg_field,
1256	int num_fields)
1257	{
1258	struct regmap_field *rf;
1259	int i;
1260
1261	rf = kcalloc(n: num_fields, size: sizeof(*rf), GFP_KERNEL);
1262	if (!rf)
1263	return -ENOMEM;
1264
1265	for (i = 0; i < num_fields; i++) {
1266	regmap_field_init(rm_field: &rf[i], regmap, reg_field: reg_field[i]);
1267	rm_field[i] = &rf[i];
1268	}
1269
1270	return 0;
1271	}
1272	EXPORT_SYMBOL_GPL(regmap_field_bulk_alloc);
1273
1274	/**
1275	* devm_regmap_field_bulk_alloc() - Allocate and initialise a bulk register
1276	* fields.
1277	*
1278	* @dev: Device that will be interacted with
1279	* @regmap: regmap bank in which this register field is located.
1280	* @rm_field: regmap register fields within the bank.
1281	* @reg_field: Register fields within the bank.
1282	* @num_fields: Number of register fields.
1283	*
1284	* The return value will be an -ENOMEM on error or zero for success.
1285	* Newly allocated regmap_fields will be automatically freed by the
1286	* device management code.
1287	*/
1288	int devm_regmap_field_bulk_alloc(struct device *dev,
1289	struct regmap *regmap,
1290	struct regmap_field **rm_field,
1291	const struct reg_field *reg_field,
1292	int num_fields)
1293	{
1294	struct regmap_field *rf;
1295	int i;
1296
1297	rf = devm_kcalloc(dev, n: num_fields, size: sizeof(*rf), GFP_KERNEL);
1298	if (!rf)
1299	return -ENOMEM;
1300
1301	for (i = 0; i < num_fields; i++) {
1302	regmap_field_init(rm_field: &rf[i], regmap, reg_field: reg_field[i]);
1303	rm_field[i] = &rf[i];
1304	}
1305
1306	return 0;
1307	}
1308	EXPORT_SYMBOL_GPL(devm_regmap_field_bulk_alloc);
1309
1310	/**
1311	* regmap_field_bulk_free() - Free register field allocated using
1312	* regmap_field_bulk_alloc.
1313	*
1314	* @field: regmap fields which should be freed.
1315	*/
1316	void regmap_field_bulk_free(struct regmap_field *field)
1317	{
1318	kfree(objp: field);
1319	}
1320	EXPORT_SYMBOL_GPL(regmap_field_bulk_free);
1321
1322	/**
1323	* devm_regmap_field_bulk_free() - Free a bulk register field allocated using
1324	* devm_regmap_field_bulk_alloc.
1325	*
1326	* @dev: Device that will be interacted with
1327	* @field: regmap field which should be freed.
1328	*
1329	* Free register field allocated using devm_regmap_field_bulk_alloc(). Usually
1330	* drivers need not call this function, as the memory allocated via devm
1331	* will be freed as per device-driver life-cycle.
1332	*/
1333	void devm_regmap_field_bulk_free(struct device *dev,
1334	struct regmap_field *field)
1335	{
1336	devm_kfree(dev, p: field);
1337	}
1338	EXPORT_SYMBOL_GPL(devm_regmap_field_bulk_free);
1339
1340	/**
1341	* devm_regmap_field_free() - Free a register field allocated using
1342	* devm_regmap_field_alloc.
1343	*
1344	* @dev: Device that will be interacted with
1345	* @field: regmap field which should be freed.
1346	*
1347	* Free register field allocated using devm_regmap_field_alloc(). Usually
1348	* drivers need not call this function, as the memory allocated via devm
1349	* will be freed as per device-driver life-cyle.
1350	*/
1351	void devm_regmap_field_free(struct device *dev,
1352	struct regmap_field *field)
1353	{
1354	devm_kfree(dev, p: field);
1355	}
1356	EXPORT_SYMBOL_GPL(devm_regmap_field_free);
1357
1358	/**
1359	* regmap_field_alloc() - Allocate and initialise a register field.
1360	*
1361	* @regmap: regmap bank in which this register field is located.
1362	* @reg_field: Register field with in the bank.
1363	*
1364	* The return value will be an ERR_PTR() on error or a valid pointer
1365	* to a struct regmap_field. The regmap_field should be freed by the
1366	* user once its finished working with it using regmap_field_free().
1367	*/
1368	struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1369	struct reg_field reg_field)
1370	{
1371	struct regmap_field *rm_field = kzalloc(size: sizeof(*rm_field), GFP_KERNEL);
1372
1373	if (!rm_field)
1374	return ERR_PTR(error: -ENOMEM);
1375
1376	regmap_field_init(rm_field, regmap, reg_field);
1377
1378	return rm_field;
1379	}
1380	EXPORT_SYMBOL_GPL(regmap_field_alloc);
1381
1382	/**
1383	* regmap_field_free() - Free register field allocated using
1384	* regmap_field_alloc.
1385	*
1386	* @field: regmap field which should be freed.
1387	*/
1388	void regmap_field_free(struct regmap_field *field)
1389	{
1390	kfree(objp: field);
1391	}
1392	EXPORT_SYMBOL_GPL(regmap_field_free);
1393
1394	/**
1395	* regmap_reinit_cache() - Reinitialise the current register cache
1396	*
1397	* @map: Register map to operate on.
1398	* @config: New configuration. Only the cache data will be used.
1399	*
1400	* Discard any existing register cache for the map and initialize a
1401	* new cache. This can be used to restore the cache to defaults or to
1402	* update the cache configuration to reflect runtime discovery of the
1403	* hardware.
1404	*
1405	* No explicit locking is done here, the user needs to ensure that
1406	* this function will not race with other calls to regmap.
1407	*/
1408	int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
1409	{
1410	int ret;
1411
1412	regcache_exit(map);
1413	regmap_debugfs_exit(map);
1414
1415	map->max_register = config->max_register;
1416	map->max_register_is_set = map->max_register ?: config->max_register_is_0;
1417	map->writeable_reg = config->writeable_reg;
1418	map->readable_reg = config->readable_reg;
1419	map->volatile_reg = config->volatile_reg;
1420	map->precious_reg = config->precious_reg;
1421	map->writeable_noinc_reg = config->writeable_noinc_reg;
1422	map->readable_noinc_reg = config->readable_noinc_reg;
1423	map->cache_type = config->cache_type;
1424
1425	ret = regmap_set_name(map, config);
1426	if (ret)
1427	return ret;
1428
1429	regmap_debugfs_init(map);
1430
1431	map->cache_bypass = false;
1432	map->cache_only = false;
1433
1434	return regcache_init(map, config);
1435	}
1436	EXPORT_SYMBOL_GPL(regmap_reinit_cache);
1437
1438	/**
1439	* regmap_exit() - Free a previously allocated register map
1440	*
1441	* @map: Register map to operate on.
1442	*/
1443	void regmap_exit(struct regmap *map)
1444	{
1445	struct regmap_async *async;
1446
1447	regcache_exit(map);
1448	regmap_debugfs_exit(map);
1449	regmap_range_exit(map);
1450	if (map->bus && map->bus->free_context)
1451	map->bus->free_context(map->bus_context);
1452	kfree(objp: map->work_buf);
1453	while (!list_empty(head: &map->async_free)) {
1454	async = list_first_entry_or_null(&map->async_free,
1455	struct regmap_async,
1456	list);
1457	list_del(entry: &async->list);
1458	kfree(objp: async->work_buf);
1459	kfree(objp: async);
1460	}
1461	if (map->hwlock)
1462	hwspin_lock_free(hwlock: map->hwlock);
1463	if (map->lock == regmap_lock_mutex)
1464	mutex_destroy(lock: &map->mutex);
1465	kfree_const(x: map->name);
1466	kfree(objp: map->patch);
1467	if (map->bus && map->bus->free_on_exit)
1468	kfree(objp: map->bus);
1469	kfree(objp: map);
1470	}
1471	EXPORT_SYMBOL_GPL(regmap_exit);
1472
1473	static int dev_get_regmap_match(struct device *dev, void *res, void *data)
1474	{
1475	struct regmap **r = res;
1476	if (!r || !*r) {
1477	WARN_ON(!r || !*r);
1478	return 0;
1479	}
1480
1481	/* If the user didn't specify a name match any */
1482	if (data)
1483	return (*r)->name && !strcmp((*r)->name, data);
1484	else
1485	return 1;
1486	}
1487
1488	/**
1489	* dev_get_regmap() - Obtain the regmap (if any) for a device
1490	*
1491	* @dev: Device to retrieve the map for
1492	* @name: Optional name for the register map, usually NULL.
1493	*
1494	* Returns the regmap for the device if one is present, or NULL. If
1495	* name is specified then it must match the name specified when
1496	* registering the device, if it is NULL then the first regmap found
1497	* will be used. Devices with multiple register maps are very rare,
1498	* generic code should normally not need to specify a name.
1499	*/
1500	struct regmap *dev_get_regmap(struct device *dev, const char *name)
1501	{
1502	struct regmap **r = devres_find(dev, release: dev_get_regmap_release,
1503	match: dev_get_regmap_match, match_data: (void *)name);
1504
1505	if (!r)
1506	return NULL;
1507	return *r;
1508	}
1509	EXPORT_SYMBOL_GPL(dev_get_regmap);
1510
1511	/**
1512	* regmap_get_device() - Obtain the device from a regmap
1513	*
1514	* @map: Register map to operate on.
1515	*
1516	* Returns the underlying device that the regmap has been created for.
1517	*/
1518	struct device *regmap_get_device(struct regmap *map)
1519	{
1520	return map->dev;
1521	}
1522	EXPORT_SYMBOL_GPL(regmap_get_device);
1523
1524	static int _regmap_select_page(struct regmap *map, unsigned int *reg,
1525	struct regmap_range_node *range,
1526	unsigned int val_num)
1527	{
1528	void *orig_work_buf;
1529	unsigned int win_offset;
1530	unsigned int win_page;
1531	bool page_chg;
1532	int ret;
1533
1534	win_offset = (*reg - range->range_min) % range->window_len;
1535	win_page = (*reg - range->range_min) / range->window_len;
1536
1537	if (val_num > 1) {
1538	/* Bulk write shouldn't cross range boundary */
1539	if (*reg + val_num - 1 > range->range_max)
1540	return -EINVAL;
1541
1542	/* ... or single page boundary */
1543	if (val_num > range->window_len - win_offset)
1544	return -EINVAL;
1545	}
1546
1547	/* It is possible to have selector register inside data window.
1548	In that case, selector register is located on every page and
1549	it needs no page switching, when accessed alone. */
1550	if (val_num > 1 ||
1551	range->window_start + win_offset != range->selector_reg) {
1552	/* Use separate work_buf during page switching */
1553	orig_work_buf = map->work_buf;
1554	map->work_buf = map->selector_work_buf;
1555
1556	ret = _regmap_update_bits(map, reg: range->selector_reg,
1557	mask: range->selector_mask,
1558	val: win_page << range->selector_shift,
1559	change: &page_chg, force_write: false);
1560
1561	map->work_buf = orig_work_buf;
1562
1563	if (ret != 0)
1564	return ret;
1565	}
1566
1567	*reg = range->window_start + win_offset;
1568
1569	return 0;
1570	}
1571
1572	static void regmap_set_work_buf_flag_mask(struct regmap *map, int max_bytes,
1573	unsigned long mask)
1574	{
1575	u8 *buf;
1576	int i;
1577
1578	if (!mask || !map->work_buf)
1579	return;
1580
1581	buf = map->work_buf;
1582
1583	for (i = 0; i < max_bytes; i++)
1584	buf[i] |= (mask >> (8 * i)) & 0xff;
1585	}
1586
1587	static unsigned int regmap_reg_addr(struct regmap *map, unsigned int reg)
1588	{
1589	reg += map->reg_base;
1590
1591	if (map->format.reg_shift > 0)
1592	reg >>= map->format.reg_shift;
1593	else if (map->format.reg_shift < 0)
1594	reg <<= -(map->format.reg_shift);
1595
1596	return reg;
1597	}
1598
1599	static int _regmap_raw_write_impl(struct regmap *map, unsigned int reg,
1600	const void *val, size_t val_len, bool noinc)
1601	{
1602	struct regmap_range_node *range;
1603	unsigned long flags;
1604	void *work_val = map->work_buf + map->format.reg_bytes +
1605	map->format.pad_bytes;
1606	void *buf;
1607	int ret = -ENOTSUPP;
1608	size_t len;
1609	int i;
1610
1611	/* Check for unwritable or noinc registers in range
1612	* before we start
1613	*/
1614	if (!regmap_writeable_noinc(map, reg)) {
1615	for (i = 0; i < val_len / map->format.val_bytes; i++) {
1616	unsigned int element =
1617	reg + regmap_get_offset(map, index: i);
1618	if (!regmap_writeable(map, reg: element) ||
1619	regmap_writeable_noinc(map, reg: element))
1620	return -EINVAL;
1621	}
1622	}
1623
1624	if (!map->cache_bypass && map->format.parse_val) {
1625	unsigned int ival, offset;
1626	int val_bytes = map->format.val_bytes;
1627
1628	/* Cache the last written value for noinc writes */
1629	i = noinc ? val_len - val_bytes : 0;
1630	for (; i < val_len; i += val_bytes) {
1631	ival = map->format.parse_val(val + i);
1632	offset = noinc ? 0 : regmap_get_offset(map, index: i / val_bytes);
1633	ret = regcache_write(map, reg: reg + offset, value: ival);
1634	if (ret) {
1635	dev_err(map->dev,
1636	"Error in caching of register: %x ret: %d\n",
1637	reg + offset, ret);
1638	return ret;
1639	}
1640	}
1641	if (map->cache_only) {
1642	map->cache_dirty = true;
1643	return 0;
1644	}
1645	}
1646
1647	range = _regmap_range_lookup(map, reg);
1648	if (range) {
1649	int val_num = val_len / map->format.val_bytes;
1650	int win_offset = (reg - range->range_min) % range->window_len;
1651	int win_residue = range->window_len - win_offset;
1652
1653	/* If the write goes beyond the end of the window split it */
1654	while (val_num > win_residue) {
1655	dev_dbg(map->dev, "Writing window %d/%zu\n",
1656	win_residue, val_len / map->format.val_bytes);
1657	ret = _regmap_raw_write_impl(map, reg, val,
1658	val_len: win_residue *
1659	map->format.val_bytes, noinc);
1660	if (ret != 0)
1661	return ret;
1662
1663	reg += win_residue;
1664	val_num -= win_residue;
1665	val += win_residue * map->format.val_bytes;
1666	val_len -= win_residue * map->format.val_bytes;
1667
1668	win_offset = (reg - range->range_min) %
1669	range->window_len;
1670	win_residue = range->window_len - win_offset;
1671	}
1672
1673	ret = _regmap_select_page(map, reg: &reg, range, val_num: noinc ? 1 : val_num);
1674	if (ret != 0)
1675	return ret;
1676	}
1677
1678	reg = regmap_reg_addr(map, reg);
1679	map->format.format_reg(map->work_buf, reg, map->reg_shift);
1680	regmap_set_work_buf_flag_mask(map, max_bytes: map->format.reg_bytes,
1681	mask: map->write_flag_mask);
1682
1683	/*
1684	* Essentially all I/O mechanisms will be faster with a single
1685	* buffer to write. Since register syncs often generate raw
1686	* writes of single registers optimise that case.
1687	*/
1688	if (val != work_val && val_len == map->format.val_bytes) {
1689	memcpy(work_val, val, map->format.val_bytes);
1690	val = work_val;
1691	}
1692
1693	if (map->async && map->bus && map->bus->async_write) {
1694	struct regmap_async *async;
1695
1696	trace_regmap_async_write_start(map, reg, count: val_len);
1697
1698	spin_lock_irqsave(&map->async_lock, flags);
1699	async = list_first_entry_or_null(&map->async_free,
1700	struct regmap_async,
1701	list);
1702	if (async)
1703	list_del(entry: &async->list);
1704	spin_unlock_irqrestore(lock: &map->async_lock, flags);
1705
1706	if (!async) {
1707	async = map->bus->async_alloc();
1708	if (!async)
1709	return -ENOMEM;
1710
1711	async->work_buf = kzalloc(size: map->format.buf_size,
1712	GFP_KERNEL | GFP_DMA);
1713	if (!async->work_buf) {
1714	kfree(objp: async);
1715	return -ENOMEM;
1716	}
1717	}
1718
1719	async->map = map;
1720
1721	/* If the caller supplied the value we can use it safely. */
1722	memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1723	map->format.reg_bytes + map->format.val_bytes);
1724
1725	spin_lock_irqsave(&map->async_lock, flags);
1726	list_add_tail(new: &async->list, head: &map->async_list);
1727	spin_unlock_irqrestore(lock: &map->async_lock, flags);
1728
1729	if (val != work_val)
1730	ret = map->bus->async_write(map->bus_context,
1731	async->work_buf,
1732	map->format.reg_bytes +
1733	map->format.pad_bytes,
1734	val, val_len, async);
1735	else
1736	ret = map->bus->async_write(map->bus_context,
1737	async->work_buf,
1738	map->format.reg_bytes +
1739	map->format.pad_bytes +
1740	val_len, NULL, 0, async);
1741
1742	if (ret != 0) {
1743	dev_err(map->dev, "Failed to schedule write: %d\n",
1744	ret);
1745
1746	spin_lock_irqsave(&map->async_lock, flags);
1747	list_move(list: &async->list, head: &map->async_free);
1748	spin_unlock_irqrestore(lock: &map->async_lock, flags);
1749	}
1750
1751	return ret;
1752	}
1753
1754	trace_regmap_hw_write_start(map, reg, count: val_len / map->format.val_bytes);
1755
1756	/* If we're doing a single register write we can probably just
1757	* send the work_buf directly, otherwise try to do a gather
1758	* write.
1759	*/
1760	if (val == work_val)
1761	ret = map->write(map->bus_context, map->work_buf,
1762	map->format.reg_bytes +
1763	map->format.pad_bytes +
1764	val_len);
1765	else if (map->bus && map->bus->gather_write)
1766	ret = map->bus->gather_write(map->bus_context, map->work_buf,
1767	map->format.reg_bytes +
1768	map->format.pad_bytes,
1769	val, val_len);
1770	else
1771	ret = -ENOTSUPP;
1772
1773	/* If that didn't work fall back on linearising by hand. */
1774	if (ret == -ENOTSUPP) {
1775	len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1776	buf = kzalloc(size: len, GFP_KERNEL);
1777	if (!buf)
1778	return -ENOMEM;
1779
1780	memcpy(buf, map->work_buf, map->format.reg_bytes);
1781	memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1782	val, val_len);
1783	ret = map->write(map->bus_context, buf, len);
1784
1785	kfree(objp: buf);
1786	} else if (ret != 0 && !map->cache_bypass && map->format.parse_val) {
1787	/* regcache_drop_region() takes lock that we already have,
1788	* thus call map->cache_ops->drop() directly
1789	*/
1790	if (map->cache_ops && map->cache_ops->drop)
1791	map->cache_ops->drop(map, reg, reg + 1);
1792	}
1793
1794	trace_regmap_hw_write_done(map, reg, count: val_len / map->format.val_bytes);
1795
1796	return ret;
1797	}
1798
1799	/**
1800	* regmap_can_raw_write - Test if regmap_raw_write() is supported
1801	*
1802	* @map: Map to check.
1803	*/
1804	bool regmap_can_raw_write(struct regmap *map)
1805	{
1806	return map->write && map->format.format_val && map->format.format_reg;
1807	}
1808	EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1809
1810	/**
1811	* regmap_get_raw_read_max - Get the maximum size we can read
1812	*
1813	* @map: Map to check.
1814	*/
1815	size_t regmap_get_raw_read_max(struct regmap *map)
1816	{
1817	return map->max_raw_read;
1818	}
1819	EXPORT_SYMBOL_GPL(regmap_get_raw_read_max);
1820
1821	/**
1822	* regmap_get_raw_write_max - Get the maximum size we can read
1823	*
1824	* @map: Map to check.
1825	*/
1826	size_t regmap_get_raw_write_max(struct regmap *map)
1827	{
1828	return map->max_raw_write;
1829	}
1830	EXPORT_SYMBOL_GPL(regmap_get_raw_write_max);
1831
1832	static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1833	unsigned int val)
1834	{
1835	int ret;
1836	struct regmap_range_node *range;
1837	struct regmap *map = context;
1838
1839	WARN_ON(!map->format.format_write);
1840
1841	range = _regmap_range_lookup(map, reg);
1842	if (range) {
1843	ret = _regmap_select_page(map, reg: &reg, range, val_num: 1);
1844	if (ret != 0)
1845	return ret;
1846	}
1847
1848	reg = regmap_reg_addr(map, reg);
1849	map->format.format_write(map, reg, val);
1850
1851	trace_regmap_hw_write_start(map, reg, count: 1);
1852
1853	ret = map->write(map->bus_context, map->work_buf, map->format.buf_size);
1854
1855	trace_regmap_hw_write_done(map, reg, count: 1);
1856
1857	return ret;
1858	}
1859
1860	static int _regmap_bus_reg_write(void *context, unsigned int reg,
1861	unsigned int val)
1862	{
1863	struct regmap *map = context;
1864	struct regmap_range_node *range;
1865	int ret;
1866
1867	range = _regmap_range_lookup(map, reg);
1868	if (range) {
1869	ret = _regmap_select_page(map, reg: &reg, range, val_num: 1);
1870	if (ret != 0)
1871	return ret;
1872	}
1873
1874	reg = regmap_reg_addr(map, reg);
1875	return map->bus->reg_write(map->bus_context, reg, val);
1876	}
1877
1878	static int _regmap_bus_raw_write(void *context, unsigned int reg,
1879	unsigned int val)
1880	{
1881	struct regmap *map = context;
1882
1883	WARN_ON(!map->format.format_val);
1884
1885	map->format.format_val(map->work_buf + map->format.reg_bytes
1886	+ map->format.pad_bytes, val, 0);
1887	return _regmap_raw_write_impl(map, reg,
1888	val: map->work_buf +
1889	map->format.reg_bytes +
1890	map->format.pad_bytes,
1891	val_len: map->format.val_bytes,
1892	noinc: false);
1893	}
1894
1895	static inline void *_regmap_map_get_context(struct regmap *map)
1896	{
1897	return (map->bus || (!map->bus && map->read)) ? map : map->bus_context;
1898	}
1899
1900	int _regmap_write(struct regmap *map, unsigned int reg,
1901	unsigned int val)
1902	{
1903	int ret;
1904	void *context = _regmap_map_get_context(map);
1905
1906	if (!regmap_writeable(map, reg))
1907	return -EIO;
1908
1909	if (!map->cache_bypass && !map->defer_caching) {
1910	ret = regcache_write(map, reg, value: val);
1911	if (ret != 0)
1912	return ret;
1913	if (map->cache_only) {
1914	map->cache_dirty = true;
1915	return 0;
1916	}
1917	}
1918
1919	ret = map->reg_write(context, reg, val);
1920	if (ret == 0) {
1921	if (regmap_should_log(map))
1922	dev_info(map->dev, "%x <= %x\n", reg, val);
1923
1924	trace_regmap_reg_write(map, reg, val);
1925	}
1926
1927	return ret;
1928	}
1929
1930	/**
1931	* regmap_write() - Write a value to a single register
1932	*
1933	* @map: Register map to write to
1934	* @reg: Register to write to
1935	* @val: Value to be written
1936	*
1937	* A value of zero will be returned on success, a negative errno will
1938	* be returned in error cases.
1939	*/
1940	int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1941	{
1942	int ret;
1943
1944	if (!IS_ALIGNED(reg, map->reg_stride))
1945	return -EINVAL;
1946
1947	map->lock(map->lock_arg);
1948
1949	ret = _regmap_write(map, reg, val);
1950
1951	map->unlock(map->lock_arg);
1952
1953	return ret;
1954	}
1955	EXPORT_SYMBOL_GPL(regmap_write);
1956
1957	/**
1958	* regmap_write_async() - Write a value to a single register asynchronously
1959	*
1960	* @map: Register map to write to
1961	* @reg: Register to write to
1962	* @val: Value to be written
1963	*
1964	* A value of zero will be returned on success, a negative errno will
1965	* be returned in error cases.
1966	*/
1967	int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
1968	{
1969	int ret;
1970
1971	if (!IS_ALIGNED(reg, map->reg_stride))
1972	return -EINVAL;
1973
1974	map->lock(map->lock_arg);
1975
1976	map->async = true;
1977
1978	ret = _regmap_write(map, reg, val);
1979
1980	map->async = false;
1981
1982	map->unlock(map->lock_arg);
1983
1984	return ret;
1985	}
1986	EXPORT_SYMBOL_GPL(regmap_write_async);
1987
1988	int _regmap_raw_write(struct regmap *map, unsigned int reg,
1989	const void *val, size_t val_len, bool noinc)
1990	{
1991	size_t val_bytes = map->format.val_bytes;
1992	size_t val_count = val_len / val_bytes;
1993	size_t chunk_count, chunk_bytes;
1994	size_t chunk_regs = val_count;
1995	int ret, i;
1996
1997	if (!val_count)
1998	return -EINVAL;
1999
2000	if (map->use_single_write)
2001	chunk_regs = 1;
2002	else if (map->max_raw_write && val_len > map->max_raw_write)
2003	chunk_regs = map->max_raw_write / val_bytes;
2004
2005	chunk_count = val_count / chunk_regs;
2006	chunk_bytes = chunk_regs * val_bytes;
2007
2008	/* Write as many bytes as possible with chunk_size */
2009	for (i = 0; i < chunk_count; i++) {
2010	ret = _regmap_raw_write_impl(map, reg, val, val_len: chunk_bytes, noinc);
2011	if (ret)
2012	return ret;
2013
2014	reg += regmap_get_offset(map, index: chunk_regs);
2015	val += chunk_bytes;
2016	val_len -= chunk_bytes;
2017	}
2018
2019	/* Write remaining bytes */
2020	if (val_len)
2021	ret = _regmap_raw_write_impl(map, reg, val, val_len, noinc);
2022
2023	return ret;
2024	}
2025
2026	/**
2027	* regmap_raw_write() - Write raw values to one or more registers
2028	*
2029	* @map: Register map to write to
2030	* @reg: Initial register to write to
2031	* @val: Block of data to be written, laid out for direct transmission to the
2032	* device
2033	* @val_len: Length of data pointed to by val.
2034	*
2035	* This function is intended to be used for things like firmware
2036	* download where a large block of data needs to be transferred to the
2037	* device. No formatting will be done on the data provided.
2038	*
2039	* A value of zero will be returned on success, a negative errno will
2040	* be returned in error cases.
2041	*/
2042	int regmap_raw_write(struct regmap *map, unsigned int reg,
2043	const void *val, size_t val_len)
2044	{
2045	int ret;
2046
2047	if (!regmap_can_raw_write(map))
2048	return -EINVAL;
2049	if (val_len % map->format.val_bytes)
2050	return -EINVAL;
2051
2052	map->lock(map->lock_arg);
2053
2054	ret = _regmap_raw_write(map, reg, val, val_len, noinc: false);
2055
2056	map->unlock(map->lock_arg);
2057
2058	return ret;
2059	}
2060	EXPORT_SYMBOL_GPL(regmap_raw_write);
2061
2062	static int regmap_noinc_readwrite(struct regmap *map, unsigned int reg,
2063	void *val, unsigned int val_len, bool write)
2064	{
2065	size_t val_bytes = map->format.val_bytes;
2066	size_t val_count = val_len / val_bytes;
2067	unsigned int lastval;
2068	u8 *u8p;
2069	u16 *u16p;
2070	u32 *u32p;
2071	int ret;
2072	int i;
2073
2074	switch (val_bytes) {
2075	case 1:
2076	u8p = val;
2077	if (write)
2078	lastval = (unsigned int)u8p[val_count - 1];
2079	break;
2080	case 2:
2081	u16p = val;
2082	if (write)
2083	lastval = (unsigned int)u16p[val_count - 1];
2084	break;
2085	case 4:
2086	u32p = val;
2087	if (write)
2088	lastval = (unsigned int)u32p[val_count - 1];
2089	break;
2090	default:
2091	return -EINVAL;
2092	}
2093
2094	/*
2095	* Update the cache with the last value we write, the rest is just
2096	* gone down in the hardware FIFO. We can't cache FIFOs. This makes
2097	* sure a single read from the cache will work.
2098	*/
2099	if (write) {
2100	if (!map->cache_bypass && !map->defer_caching) {
2101	ret = regcache_write(map, reg, value: lastval);
2102	if (ret != 0)
2103	return ret;
2104	if (map->cache_only) {
2105	map->cache_dirty = true;
2106	return 0;
2107	}
2108	}
2109	ret = map->bus->reg_noinc_write(map->bus_context, reg, val, val_count);
2110	} else {
2111	ret = map->bus->reg_noinc_read(map->bus_context, reg, val, val_count);
2112	}
2113
2114	if (!ret && regmap_should_log(map)) {
2115	dev_info(map->dev, "%x %s [", reg, write ? "<=" : "=>");
2116	for (i = 0; i < val_count; i++) {
2117	switch (val_bytes) {
2118	case 1:
2119	pr_cont("%x", u8p[i]);
2120	break;
2121	case 2:
2122	pr_cont("%x", u16p[i]);
2123	break;
2124	case 4:
2125	pr_cont("%x", u32p[i]);
2126	break;
2127	default:
2128	break;
2129	}
2130	if (i == (val_count - 1))
2131	pr_cont("]\n");
2132	else
2133	pr_cont(",");
2134	}
2135	}
2136
2137	return 0;
2138	}
2139
2140	/**
2141	* regmap_noinc_write(): Write data to a register without incrementing the
2142	* register number
2143	*
2144	* @map: Register map to write to
2145	* @reg: Register to write to
2146	* @val: Pointer to data buffer
2147	* @val_len: Length of output buffer in bytes.
2148	*
2149	* The regmap API usually assumes that bulk bus write operations will write a
2150	* range of registers. Some devices have certain registers for which a write
2151	* operation can write to an internal FIFO.
2152	*
2153	* The target register must be volatile but registers after it can be
2154	* completely unrelated cacheable registers.
2155	*
2156	* This will attempt multiple writes as required to write val_len bytes.
2157	*
2158	* A value of zero will be returned on success, a negative errno will be
2159	* returned in error cases.
2160	*/
2161	int regmap_noinc_write(struct regmap *map, unsigned int reg,
2162	const void *val, size_t val_len)
2163	{
2164	size_t write_len;
2165	int ret;
2166
2167	if (!map->write && !(map->bus && map->bus->reg_noinc_write))
2168	return -EINVAL;
2169	if (val_len % map->format.val_bytes)
2170	return -EINVAL;
2171	if (!IS_ALIGNED(reg, map->reg_stride))
2172	return -EINVAL;
2173	if (val_len == 0)
2174	return -EINVAL;
2175
2176	map->lock(map->lock_arg);
2177
2178	if (!regmap_volatile(map, reg) || !regmap_writeable_noinc(map, reg)) {
2179	ret = -EINVAL;
2180	goto out_unlock;
2181	}
2182
2183	/*
2184	* Use the accelerated operation if we can. The val drops the const
2185	* typing in order to facilitate code reuse in regmap_noinc_readwrite().
2186	*/
2187	if (map->bus->reg_noinc_write) {
2188	ret = regmap_noinc_readwrite(map, reg, val: (void *)val, val_len, write: true);
2189	goto out_unlock;
2190	}
2191
2192	while (val_len) {
2193	if (map->max_raw_write && map->max_raw_write < val_len)
2194	write_len = map->max_raw_write;
2195	else
2196	write_len = val_len;
2197	ret = _regmap_raw_write(map, reg, val, val_len: write_len, noinc: true);
2198	if (ret)
2199	goto out_unlock;
2200	val = ((u8 *)val) + write_len;
2201	val_len -= write_len;
2202	}
2203
2204	out_unlock:
2205	map->unlock(map->lock_arg);
2206	return ret;
2207	}
2208	EXPORT_SYMBOL_GPL(regmap_noinc_write);
2209
2210	/**
2211	* regmap_field_update_bits_base() - Perform a read/modify/write cycle a
2212	* register field.
2213	*
2214	* @field: Register field to write to
2215	* @mask: Bitmask to change
2216	* @val: Value to be written
2217	* @change: Boolean indicating if a write was done
2218	* @async: Boolean indicating asynchronously
2219	* @force: Boolean indicating use force update
2220	*
2221	* Perform a read/modify/write cycle on the register field with change,
2222	* async, force option.
2223	*
2224	* A value of zero will be returned on success, a negative errno will
2225	* be returned in error cases.
2226	*/
2227	int regmap_field_update_bits_base(struct regmap_field *field,
2228	unsigned int mask, unsigned int val,
2229	bool *change, bool async, bool force)
2230	{
2231	mask = (mask << field->shift) & field->mask;
2232
2233	return regmap_update_bits_base(map: field->regmap, reg: field->reg,
2234	mask, val: val << field->shift,
2235	change, async, force);
2236	}
2237	EXPORT_SYMBOL_GPL(regmap_field_update_bits_base);
2238
2239	/**
2240	* regmap_field_test_bits() - Check if all specified bits are set in a
2241	* register field.
2242	*
2243	* @field: Register field to operate on
2244	* @bits: Bits to test
2245	*
2246	* Returns -1 if the underlying regmap_field_read() fails, 0 if at least one of the
2247	* tested bits is not set and 1 if all tested bits are set.
2248	*/
2249	int regmap_field_test_bits(struct regmap_field *field, unsigned int bits)
2250	{
2251	unsigned int val, ret;
2252
2253	ret = regmap_field_read(field, val: &val);
2254	if (ret)
2255	return ret;
2256
2257	return (val & bits) == bits;
2258	}
2259	EXPORT_SYMBOL_GPL(regmap_field_test_bits);
2260
2261	/**
2262	* regmap_fields_update_bits_base() - Perform a read/modify/write cycle a
2263	* register field with port ID
2264	*
2265	* @field: Register field to write to
2266	* @id: port ID
2267	* @mask: Bitmask to change
2268	* @val: Value to be written
2269	* @change: Boolean indicating if a write was done
2270	* @async: Boolean indicating asynchronously
2271	* @force: Boolean indicating use force update
2272	*
2273	* A value of zero will be returned on success, a negative errno will
2274	* be returned in error cases.
2275	*/
2276	int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id,
2277	unsigned int mask, unsigned int val,
2278	bool *change, bool async, bool force)
2279	{
2280	if (id >= field->id_size)
2281	return -EINVAL;
2282
2283	mask = (mask << field->shift) & field->mask;
2284
2285	return regmap_update_bits_base(map: field->regmap,
2286	reg: field->reg + (field->id_offset * id),
2287	mask, val: val << field->shift,
2288	change, async, force);
2289	}
2290	EXPORT_SYMBOL_GPL(regmap_fields_update_bits_base);
2291
2292	/**
2293	* regmap_bulk_write() - Write multiple registers to the device
2294	*
2295	* @map: Register map to write to
2296	* @reg: First register to be write from
2297	* @val: Block of data to be written, in native register size for device
2298	* @val_count: Number of registers to write
2299	*
2300	* This function is intended to be used for writing a large block of
2301	* data to the device either in single transfer or multiple transfer.
2302	*
2303	* A value of zero will be returned on success, a negative errno will
2304	* be returned in error cases.
2305	*/
2306	int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
2307	size_t val_count)
2308	{
2309	int ret = 0, i;
2310	size_t val_bytes = map->format.val_bytes;
2311
2312	if (!IS_ALIGNED(reg, map->reg_stride))
2313	return -EINVAL;
2314
2315	/*
2316	* Some devices don't support bulk write, for them we have a series of
2317	* single write operations.
2318	*/
2319	if (!map->write || !map->format.parse_inplace) {
2320	map->lock(map->lock_arg);
2321	for (i = 0; i < val_count; i++) {
2322	unsigned int ival;
2323
2324	switch (val_bytes) {
2325	case 1:
2326	ival = *(u8 *)(val + (i * val_bytes));
2327	break;
2328	case 2:
2329	ival = *(u16 *)(val + (i * val_bytes));
2330	break;
2331	case 4:
2332	ival = *(u32 *)(val + (i * val_bytes));
2333	break;
2334	default:
2335	ret = -EINVAL;
2336	goto out;
2337	}
2338
2339	ret = _regmap_write(map,
2340	reg: reg + regmap_get_offset(map, index: i),
2341	val: ival);
2342	if (ret != 0)
2343	goto out;
2344	}
2345	out:
2346	map->unlock(map->lock_arg);
2347	} else {
2348	void *wval;
2349
2350	wval = kmemdup(p: val, size: val_count * val_bytes, gfp: map->alloc_flags);
2351	if (!wval)
2352	return -ENOMEM;
2353
2354	for (i = 0; i < val_count * val_bytes; i += val_bytes)
2355	map->format.parse_inplace(wval + i);
2356
2357	ret = regmap_raw_write(map, reg, wval, val_bytes * val_count);
2358
2359	kfree(objp: wval);
2360	}
2361
2362	if (!ret)
2363	trace_regmap_bulk_write(map, reg, val, val_len: val_bytes * val_count);
2364
2365	return ret;
2366	}
2367	EXPORT_SYMBOL_GPL(regmap_bulk_write);
2368
2369	/*
2370	* _regmap_raw_multi_reg_write()
2371	*
2372	* the (register,newvalue) pairs in regs have not been formatted, but
2373	* they are all in the same page and have been changed to being page
2374	* relative. The page register has been written if that was necessary.
2375	*/
2376	static int _regmap_raw_multi_reg_write(struct regmap *map,
2377	const struct reg_sequence *regs,
2378	size_t num_regs)
2379	{
2380	int ret;
2381	void *buf;
2382	int i;
2383	u8 *u8;
2384	size_t val_bytes = map->format.val_bytes;
2385	size_t reg_bytes = map->format.reg_bytes;
2386	size_t pad_bytes = map->format.pad_bytes;
2387	size_t pair_size = reg_bytes + pad_bytes + val_bytes;
2388	size_t len = pair_size * num_regs;
2389
2390	if (!len)
2391	return -EINVAL;
2392
2393	buf = kzalloc(size: len, GFP_KERNEL);
2394	if (!buf)
2395	return -ENOMEM;
2396
2397	/* We have to linearise by hand. */
2398
2399	u8 = buf;
2400
2401	for (i = 0; i < num_regs; i++) {
2402	unsigned int reg = regs[i].reg;
2403	unsigned int val = regs[i].def;
2404	trace_regmap_hw_write_start(map, reg, count: 1);
2405	reg = regmap_reg_addr(map, reg);
2406	map->format.format_reg(u8, reg, map->reg_shift);
2407	u8 += reg_bytes + pad_bytes;
2408	map->format.format_val(u8, val, 0);
2409	u8 += val_bytes;
2410	}
2411	u8 = buf;
2412	*u8 |= map->write_flag_mask;
2413
2414	ret = map->write(map->bus_context, buf, len);
2415
2416	kfree(objp: buf);
2417
2418	for (i = 0; i < num_regs; i++) {
2419	int reg = regs[i].reg;
2420	trace_regmap_hw_write_done(map, reg, count: 1);
2421	}
2422	return ret;
2423	}
2424
2425	static unsigned int _regmap_register_page(struct regmap *map,
2426	unsigned int reg,
2427	struct regmap_range_node *range)
2428	{
2429	unsigned int win_page = (reg - range->range_min) / range->window_len;
2430
2431	return win_page;
2432	}
2433
2434	static int _regmap_range_multi_paged_reg_write(struct regmap *map,
2435	struct reg_sequence *regs,
2436	size_t num_regs)
2437	{
2438	int ret;
2439	int i, n;
2440	struct reg_sequence *base;
2441	unsigned int this_page = 0;
2442	unsigned int page_change = 0;
2443	/*
2444	* the set of registers are not neccessarily in order, but
2445	* since the order of write must be preserved this algorithm
2446	* chops the set each time the page changes. This also applies
2447	* if there is a delay required at any point in the sequence.
2448	*/
2449	base = regs;
2450	for (i = 0, n = 0; i < num_regs; i++, n++) {
2451	unsigned int reg = regs[i].reg;
2452	struct regmap_range_node *range;
2453
2454	range = _regmap_range_lookup(map, reg);
2455	if (range) {
2456	unsigned int win_page = _regmap_register_page(map, reg,
2457	range);
2458
2459	if (i == 0)
2460	this_page = win_page;
2461	if (win_page != this_page) {
2462	this_page = win_page;
2463	page_change = 1;
2464	}
2465	}
2466
2467	/* If we have both a page change and a delay make sure to
2468	* write the regs and apply the delay before we change the
2469	* page.
2470	*/
2471
2472	if (page_change || regs[i].delay_us) {
2473
2474	/* For situations where the first write requires
2475	* a delay we need to make sure we don't call
2476	* raw_multi_reg_write with n=0
2477	* This can't occur with page breaks as we
2478	* never write on the first iteration
2479	*/
2480	if (regs[i].delay_us && i == 0)
2481	n = 1;
2482
2483	ret = _regmap_raw_multi_reg_write(map, regs: base, num_regs: n);
2484	if (ret != 0)
2485	return ret;
2486
2487	if (regs[i].delay_us) {
2488	if (map->can_sleep)
2489	fsleep(usecs: regs[i].delay_us);
2490	else
2491	udelay(regs[i].delay_us);
2492	}
2493
2494	base += n;
2495	n = 0;
2496
2497	if (page_change) {
2498	ret = _regmap_select_page(map,
2499	reg: &base[n].reg,
2500	range, val_num: 1);
2501	if (ret != 0)
2502	return ret;
2503
2504	page_change = 0;
2505	}
2506
2507	}
2508
2509	}
2510	if (n > 0)
2511	return _regmap_raw_multi_reg_write(map, regs: base, num_regs: n);
2512	return 0;
2513	}
2514
2515	static int _regmap_multi_reg_write(struct regmap *map,
2516	const struct reg_sequence *regs,
2517	size_t num_regs)
2518	{
2519	int i;
2520	int ret;
2521
2522	if (!map->can_multi_write) {
2523	for (i = 0; i < num_regs; i++) {
2524	ret = _regmap_write(map, reg: regs[i].reg, val: regs[i].def);
2525	if (ret != 0)
2526	return ret;
2527
2528	if (regs[i].delay_us) {
2529	if (map->can_sleep)
2530	fsleep(usecs: regs[i].delay_us);
2531	else
2532	udelay(regs[i].delay_us);
2533	}
2534	}
2535	return 0;
2536	}
2537
2538	if (!map->format.parse_inplace)
2539	return -EINVAL;
2540
2541	if (map->writeable_reg)
2542	for (i = 0; i < num_regs; i++) {
2543	int reg = regs[i].reg;
2544	if (!map->writeable_reg(map->dev, reg))
2545	return -EINVAL;
2546	if (!IS_ALIGNED(reg, map->reg_stride))
2547	return -EINVAL;
2548	}
2549
2550	if (!map->cache_bypass) {
2551	for (i = 0; i < num_regs; i++) {
2552	unsigned int val = regs[i].def;
2553	unsigned int reg = regs[i].reg;
2554	ret = regcache_write(map, reg, value: val);
2555	if (ret) {
2556	dev_err(map->dev,
2557	"Error in caching of register: %x ret: %d\n",
2558	reg, ret);
2559	return ret;
2560	}
2561	}
2562	if (map->cache_only) {
2563	map->cache_dirty = true;
2564	return 0;
2565	}
2566	}
2567
2568	WARN_ON(!map->bus);
2569
2570	for (i = 0; i < num_regs; i++) {
2571	unsigned int reg = regs[i].reg;
2572	struct regmap_range_node *range;
2573
2574	/* Coalesce all the writes between a page break or a delay
2575	* in a sequence
2576	*/
2577	range = _regmap_range_lookup(map, reg);
2578	if (range || regs[i].delay_us) {
2579	size_t len = sizeof(struct reg_sequence)*num_regs;
2580	struct reg_sequence *base = kmemdup(p: regs, size: len,
2581	GFP_KERNEL);
2582	if (!base)
2583	return -ENOMEM;
2584	ret = _regmap_range_multi_paged_reg_write(map, regs: base,
2585	num_regs);
2586	kfree(objp: base);
2587
2588	return ret;
2589	}
2590	}
2591	return _regmap_raw_multi_reg_write(map, regs, num_regs);
2592	}
2593
2594	/**
2595	* regmap_multi_reg_write() - Write multiple registers to the device
2596	*
2597	* @map: Register map to write to
2598	* @regs: Array of structures containing register,value to be written
2599	* @num_regs: Number of registers to write
2600	*
2601	* Write multiple registers to the device where the set of register, value
2602	* pairs are supplied in any order, possibly not all in a single range.
2603	*
2604	* The 'normal' block write mode will send ultimately send data on the
2605	* target bus as R,V1,V2,V3,..,Vn where successively higher registers are
2606	* addressed. However, this alternative block multi write mode will send
2607	* the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
2608	* must of course support the mode.
2609	*
2610	* A value of zero will be returned on success, a negative errno will be
2611	* returned in error cases.
2612	*/
2613	int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs,
2614	int num_regs)
2615	{
2616	int ret;
2617
2618	map->lock(map->lock_arg);
2619
2620	ret = _regmap_multi_reg_write(map, regs, num_regs);
2621
2622	map->unlock(map->lock_arg);
2623
2624	return ret;
2625	}
2626	EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
2627
2628	/**
2629	* regmap_multi_reg_write_bypassed() - Write multiple registers to the
2630	* device but not the cache
2631	*
2632	* @map: Register map to write to
2633	* @regs: Array of structures containing register,value to be written
2634	* @num_regs: Number of registers to write
2635	*
2636	* Write multiple registers to the device but not the cache where the set
2637	* of register are supplied in any order.
2638	*
2639	* This function is intended to be used for writing a large block of data
2640	* atomically to the device in single transfer for those I2C client devices
2641	* that implement this alternative block write mode.
2642	*
2643	* A value of zero will be returned on success, a negative errno will
2644	* be returned in error cases.
2645	*/
2646	int regmap_multi_reg_write_bypassed(struct regmap *map,
2647	const struct reg_sequence *regs,
2648	int num_regs)
2649	{
2650	int ret;
2651	bool bypass;
2652
2653	map->lock(map->lock_arg);
2654
2655	bypass = map->cache_bypass;
2656	map->cache_bypass = true;
2657
2658	ret = _regmap_multi_reg_write(map, regs, num_regs);
2659
2660	map->cache_bypass = bypass;
2661
2662	map->unlock(map->lock_arg);
2663
2664	return ret;
2665	}
2666	EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
2667
2668	/**
2669	* regmap_raw_write_async() - Write raw values to one or more registers
2670	* asynchronously
2671	*
2672	* @map: Register map to write to
2673	* @reg: Initial register to write to
2674	* @val: Block of data to be written, laid out for direct transmission to the
2675	* device. Must be valid until regmap_async_complete() is called.
2676	* @val_len: Length of data pointed to by val.
2677	*
2678	* This function is intended to be used for things like firmware
2679	* download where a large block of data needs to be transferred to the
2680	* device. No formatting will be done on the data provided.
2681	*
2682	* If supported by the underlying bus the write will be scheduled
2683	* asynchronously, helping maximise I/O speed on higher speed buses
2684	* like SPI. regmap_async_complete() can be called to ensure that all
2685	* asynchrnous writes have been completed.
2686	*
2687	* A value of zero will be returned on success, a negative errno will
2688	* be returned in error cases.
2689	*/
2690	int regmap_raw_write_async(struct regmap *map, unsigned int reg,
2691	const void *val, size_t val_len)
2692	{
2693	int ret;
2694
2695	if (val_len % map->format.val_bytes)
2696	return -EINVAL;
2697	if (!IS_ALIGNED(reg, map->reg_stride))
2698	return -EINVAL;
2699
2700	map->lock(map->lock_arg);
2701
2702	map->async = true;
2703
2704	ret = _regmap_raw_write(map, reg, val, val_len, noinc: false);
2705
2706	map->async = false;
2707
2708	map->unlock(map->lock_arg);
2709
2710	return ret;
2711	}
2712	EXPORT_SYMBOL_GPL(regmap_raw_write_async);
2713
2714	static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2715	unsigned int val_len, bool noinc)
2716	{
2717	struct regmap_range_node *range;
2718	int ret;
2719
2720	if (!map->read)
2721	return -EINVAL;
2722
2723	range = _regmap_range_lookup(map, reg);
2724	if (range) {
2725	ret = _regmap_select_page(map, reg: &reg, range,
2726	val_num: noinc ? 1 : val_len / map->format.val_bytes);
2727	if (ret != 0)
2728	return ret;
2729	}
2730
2731	reg = regmap_reg_addr(map, reg);
2732	map->format.format_reg(map->work_buf, reg, map->reg_shift);
2733	regmap_set_work_buf_flag_mask(map, max_bytes: map->format.reg_bytes,
2734	mask: map->read_flag_mask);
2735	trace_regmap_hw_read_start(map, reg, count: val_len / map->format.val_bytes);
2736
2737	ret = map->read(map->bus_context, map->work_buf,
2738	map->format.reg_bytes + map->format.pad_bytes,
2739	val, val_len);
2740
2741	trace_regmap_hw_read_done(map, reg, count: val_len / map->format.val_bytes);
2742
2743	return ret;
2744	}
2745
2746	static int _regmap_bus_reg_read(void *context, unsigned int reg,
2747	unsigned int *val)
2748	{
2749	struct regmap *map = context;
2750	struct regmap_range_node *range;
2751	int ret;
2752
2753	range = _regmap_range_lookup(map, reg);
2754	if (range) {
2755	ret = _regmap_select_page(map, reg: &reg, range, val_num: 1);
2756	if (ret != 0)
2757	return ret;
2758	}
2759
2760	reg = regmap_reg_addr(map, reg);
2761	return map->bus->reg_read(map->bus_context, reg, val);
2762	}
2763
2764	static int _regmap_bus_read(void *context, unsigned int reg,
2765	unsigned int *val)
2766	{
2767	int ret;
2768	struct regmap *map = context;
2769	void *work_val = map->work_buf + map->format.reg_bytes +
2770	map->format.pad_bytes;
2771
2772	if (!map->format.parse_val)
2773	return -EINVAL;
2774
2775	ret = _regmap_raw_read(map, reg, val: work_val, val_len: map->format.val_bytes, noinc: false);
2776	if (ret == 0)
2777	*val = map->format.parse_val(work_val);
2778
2779	return ret;
2780	}
2781
2782	static int _regmap_read(struct regmap *map, unsigned int reg,
2783	unsigned int *val)
2784	{
2785	int ret;
2786	void *context = _regmap_map_get_context(map);
2787
2788	if (!map->cache_bypass) {
2789	ret = regcache_read(map, reg, value: val);
2790	if (ret == 0)
2791	return 0;
2792	}
2793
2794	if (map->cache_only)
2795	return -EBUSY;
2796
2797	if (!regmap_readable(map, reg))
2798	return -EIO;
2799
2800	ret = map->reg_read(context, reg, val);
2801	if (ret == 0) {
2802	if (regmap_should_log(map))
2803	dev_info(map->dev, "%x => %x\n", reg, *val);
2804
2805	trace_regmap_reg_read(map, reg, val: *val);
2806
2807	if (!map->cache_bypass)
2808	regcache_write(map, reg, value: *val);
2809	}
2810
2811	return ret;
2812	}
2813
2814	/**
2815	* regmap_read() - Read a value from a single register
2816	*
2817	* @map: Register map to read from
2818	* @reg: Register to be read from
2819	* @val: Pointer to store read value
2820	*
2821	* A value of zero will be returned on success, a negative errno will
2822	* be returned in error cases.
2823	*/
2824	int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
2825	{
2826	int ret;
2827
2828	if (!IS_ALIGNED(reg, map->reg_stride))
2829	return -EINVAL;
2830
2831	map->lock(map->lock_arg);
2832
2833	ret = _regmap_read(map, reg, val);
2834
2835	map->unlock(map->lock_arg);
2836
2837	return ret;
2838	}
2839	EXPORT_SYMBOL_GPL(regmap_read);
2840
2841	/**
2842	* regmap_raw_read() - Read raw data from the device
2843	*
2844	* @map: Register map to read from
2845	* @reg: First register to be read from
2846	* @val: Pointer to store read value
2847	* @val_len: Size of data to read
2848	*
2849	* A value of zero will be returned on success, a negative errno will
2850	* be returned in error cases.
2851	*/
2852	int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2853	size_t val_len)
2854	{
2855	size_t val_bytes = map->format.val_bytes;
2856	size_t val_count = val_len / val_bytes;
2857	unsigned int v;
2858	int ret, i;
2859
2860	if (val_len % map->format.val_bytes)
2861	return -EINVAL;
2862	if (!IS_ALIGNED(reg, map->reg_stride))
2863	return -EINVAL;
2864	if (val_count == 0)
2865	return -EINVAL;
2866
2867	map->lock(map->lock_arg);
2868
2869	if (regmap_volatile_range(map, reg, num: val_count) || map->cache_bypass ||
2870	map->cache_type == REGCACHE_NONE) {
2871	size_t chunk_count, chunk_bytes;
2872	size_t chunk_regs = val_count;
2873
2874	if (!map->cache_bypass && map->cache_only) {
2875	ret = -EBUSY;
2876	goto out;
2877	}
2878
2879	if (!map->read) {
2880	ret = -ENOTSUPP;
2881	goto out;
2882	}
2883
2884	if (map->use_single_read)
2885	chunk_regs = 1;
2886	else if (map->max_raw_read && val_len > map->max_raw_read)
2887	chunk_regs = map->max_raw_read / val_bytes;
2888
2889	chunk_count = val_count / chunk_regs;
2890	chunk_bytes = chunk_regs * val_bytes;
2891
2892	/* Read bytes that fit into whole chunks */
2893	for (i = 0; i < chunk_count; i++) {
2894	ret = _regmap_raw_read(map, reg, val, val_len: chunk_bytes, noinc: false);
2895	if (ret != 0)
2896	goto out;
2897
2898	reg += regmap_get_offset(map, index: chunk_regs);
2899	val += chunk_bytes;
2900	val_len -= chunk_bytes;
2901	}
2902
2903	/* Read remaining bytes */
2904	if (val_len) {
2905	ret = _regmap_raw_read(map, reg, val, val_len, noinc: false);
2906	if (ret != 0)
2907	goto out;
2908	}
2909	} else {
2910	/* Otherwise go word by word for the cache; should be low
2911	* cost as we expect to hit the cache.
2912	*/
2913	for (i = 0; i < val_count; i++) {
2914	ret = _regmap_read(map, reg: reg + regmap_get_offset(map, index: i),
2915	val: &v);
2916	if (ret != 0)
2917	goto out;
2918
2919	map->format.format_val(val + (i * val_bytes), v, 0);
2920	}
2921	}
2922
2923	out:
2924	map->unlock(map->lock_arg);
2925
2926	return ret;
2927	}
2928	EXPORT_SYMBOL_GPL(regmap_raw_read);
2929
2930	/**
2931	* regmap_noinc_read(): Read data from a register without incrementing the
2932	* register number
2933	*
2934	* @map: Register map to read from
2935	* @reg: Register to read from
2936	* @val: Pointer to data buffer
2937	* @val_len: Length of output buffer in bytes.
2938	*
2939	* The regmap API usually assumes that bulk read operations will read a
2940	* range of registers. Some devices have certain registers for which a read
2941	* operation read will read from an internal FIFO.
2942	*
2943	* The target register must be volatile but registers after it can be
2944	* completely unrelated cacheable registers.
2945	*
2946	* This will attempt multiple reads as required to read val_len bytes.
2947	*
2948	* A value of zero will be returned on success, a negative errno will be
2949	* returned in error cases.
2950	*/
2951	int regmap_noinc_read(struct regmap *map, unsigned int reg,
2952	void *val, size_t val_len)
2953	{
2954	size_t read_len;
2955	int ret;
2956
2957	if (!map->read)
2958	return -ENOTSUPP;
2959
2960	if (val_len % map->format.val_bytes)
2961	return -EINVAL;
2962	if (!IS_ALIGNED(reg, map->reg_stride))
2963	return -EINVAL;
2964	if (val_len == 0)
2965	return -EINVAL;
2966
2967	map->lock(map->lock_arg);
2968
2969	if (!regmap_volatile(map, reg) || !regmap_readable_noinc(map, reg)) {
2970	ret = -EINVAL;
2971	goto out_unlock;
2972	}
2973
2974	/*
2975	* We have not defined the FIFO semantics for cache, as the
2976	* cache is just one value deep. Should we return the last
2977	* written value? Just avoid this by always reading the FIFO
2978	* even when using cache. Cache only will not work.
2979	*/
2980	if (!map->cache_bypass && map->cache_only) {
2981	ret = -EBUSY;
2982	goto out_unlock;
2983	}
2984
2985	/* Use the accelerated operation if we can */
2986	if (map->bus->reg_noinc_read) {
2987	ret = regmap_noinc_readwrite(map, reg, val, val_len, write: false);
2988	goto out_unlock;
2989	}
2990
2991	while (val_len) {
2992	if (map->max_raw_read && map->max_raw_read < val_len)
2993	read_len = map->max_raw_read;
2994	else
2995	read_len = val_len;
2996	ret = _regmap_raw_read(map, reg, val, val_len: read_len, noinc: true);
2997	if (ret)
2998	goto out_unlock;
2999	val = ((u8 *)val) + read_len;
3000	val_len -= read_len;
3001	}
3002
3003	out_unlock:
3004	map->unlock(map->lock_arg);
3005	return ret;
3006	}
3007	EXPORT_SYMBOL_GPL(regmap_noinc_read);
3008
3009	/**
3010	* regmap_field_read(): Read a value to a single register field
3011	*
3012	* @field: Register field to read from
3013	* @val: Pointer to store read value
3014	*
3015	* A value of zero will be returned on success, a negative errno will
3016	* be returned in error cases.
3017	*/
3018	int regmap_field_read(struct regmap_field *field, unsigned int *val)
3019	{
3020	int ret;
3021	unsigned int reg_val;
3022	ret = regmap_read(field->regmap, field->reg, &reg_val);
3023	if (ret != 0)
3024	return ret;
3025
3026	reg_val &= field->mask;
3027	reg_val >>= field->shift;
3028	*val = reg_val;
3029
3030	return ret;
3031	}
3032	EXPORT_SYMBOL_GPL(regmap_field_read);
3033
3034	/**
3035	* regmap_fields_read() - Read a value to a single register field with port ID
3036	*
3037	* @field: Register field to read from
3038	* @id: port ID
3039	* @val: Pointer to store read value
3040	*
3041	* A value of zero will be returned on success, a negative errno will
3042	* be returned in error cases.
3043	*/
3044	int regmap_fields_read(struct regmap_field *field, unsigned int id,
3045	unsigned int *val)
3046	{
3047	int ret;
3048	unsigned int reg_val;
3049
3050	if (id >= field->id_size)
3051	return -EINVAL;
3052
3053	ret = regmap_read(field->regmap,
3054	field->reg + (field->id_offset * id),
3055	&reg_val);
3056	if (ret != 0)
3057	return ret;
3058
3059	reg_val &= field->mask;
3060	reg_val >>= field->shift;
3061	*val = reg_val;
3062
3063	return ret;
3064	}
3065	EXPORT_SYMBOL_GPL(regmap_fields_read);
3066
3067	/**
3068	* regmap_bulk_read() - Read multiple registers from the device
3069	*
3070	* @map: Register map to read from
3071	* @reg: First register to be read from
3072	* @val: Pointer to store read value, in native register size for device
3073	* @val_count: Number of registers to read
3074	*
3075	* A value of zero will be returned on success, a negative errno will
3076	* be returned in error cases.
3077	*/
3078	int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
3079	size_t val_count)
3080	{
3081	int ret, i;
3082	size_t val_bytes = map->format.val_bytes;
3083	bool vol = regmap_volatile_range(map, reg, num: val_count);
3084
3085	if (!IS_ALIGNED(reg, map->reg_stride))
3086	return -EINVAL;
3087	if (val_count == 0)
3088	return -EINVAL;
3089
3090	if (map->read && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
3091	ret = regmap_raw_read(map, reg, val, val_bytes * val_count);
3092	if (ret != 0)
3093	return ret;
3094
3095	for (i = 0; i < val_count * val_bytes; i += val_bytes)
3096	map->format.parse_inplace(val + i);
3097	} else {
3098	u32 *u32 = val;
3099	u16 *u16 = val;
3100	u8 *u8 = val;
3101
3102	map->lock(map->lock_arg);
3103
3104	for (i = 0; i < val_count; i++) {
3105	unsigned int ival;
3106
3107	ret = _regmap_read(map, reg: reg + regmap_get_offset(map, index: i),
3108	val: &ival);
3109	if (ret != 0)
3110	goto out;
3111
3112	switch (map->format.val_bytes) {
3113	case 4:
3114	u32[i] = ival;
3115	break;
3116	case 2:
3117	u16[i] = ival;
3118	break;
3119	case 1:
3120	u8[i] = ival;
3121	break;
3122	default:
3123	ret = -EINVAL;
3124	goto out;
3125	}
3126	}
3127
3128	out:
3129	map->unlock(map->lock_arg);
3130	}
3131
3132	if (!ret)
3133	trace_regmap_bulk_read(map, reg, val, val_len: val_bytes * val_count);
3134
3135	return ret;
3136	}
3137	EXPORT_SYMBOL_GPL(regmap_bulk_read);
3138
3139	static int _regmap_update_bits(struct regmap *map, unsigned int reg,
3140	unsigned int mask, unsigned int val,
3141	bool *change, bool force_write)
3142	{
3143	int ret;
3144	unsigned int tmp, orig;
3145
3146	if (change)
3147	*change = false;
3148
3149	if (regmap_volatile(map, reg) && map->reg_update_bits) {
3150	reg = regmap_reg_addr(map, reg);
3151	ret = map->reg_update_bits(map->bus_context, reg, mask, val);
3152	if (ret == 0 && change)
3153	*change = true;
3154	} else {
3155	ret = _regmap_read(map, reg, val: &orig);
3156	if (ret != 0)
3157	return ret;
3158
3159	tmp = orig & ~mask;
3160	tmp |= val & mask;
3161
3162	if (force_write || (tmp != orig) || map->force_write_field) {
3163	ret = _regmap_write(map, reg, val: tmp);
3164	if (ret == 0 && change)
3165	*change = true;
3166	}
3167	}
3168
3169	return ret;
3170	}
3171
3172	/**
3173	* regmap_update_bits_base() - Perform a read/modify/write cycle on a register
3174	*
3175	* @map: Register map to update
3176	* @reg: Register to update
3177	* @mask: Bitmask to change
3178	* @val: New value for bitmask
3179	* @change: Boolean indicating if a write was done
3180	* @async: Boolean indicating asynchronously
3181	* @force: Boolean indicating use force update
3182	*
3183	* Perform a read/modify/write cycle on a register map with change, async, force
3184	* options.
3185	*
3186	* If async is true:
3187	*
3188	* With most buses the read must be done synchronously so this is most useful
3189	* for devices with a cache which do not need to interact with the hardware to
3190	* determine the current register value.
3191	*
3192	* Returns zero for success, a negative number on error.
3193	*/
3194	int regmap_update_bits_base(struct regmap *map, unsigned int reg,
3195	unsigned int mask, unsigned int val,
3196	bool *change, bool async, bool force)
3197	{
3198	int ret;
3199
3200	map->lock(map->lock_arg);
3201
3202	map->async = async;
3203
3204	ret = _regmap_update_bits(map, reg, mask, val, change, force_write: force);
3205
3206	map->async = false;
3207
3208	map->unlock(map->lock_arg);
3209
3210	return ret;
3211	}
3212	EXPORT_SYMBOL_GPL(regmap_update_bits_base);
3213
3214	/**
3215	* regmap_test_bits() - Check if all specified bits are set in a register.
3216	*
3217	* @map: Register map to operate on
3218	* @reg: Register to read from
3219	* @bits: Bits to test
3220	*
3221	* Returns 0 if at least one of the tested bits is not set, 1 if all tested
3222	* bits are set and a negative error number if the underlying regmap_read()
3223	* fails.
3224	*/
3225	int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits)
3226	{
3227	unsigned int val, ret;
3228
3229	ret = regmap_read(map, reg, &val);
3230	if (ret)
3231	return ret;
3232
3233	return (val & bits) == bits;
3234	}
3235	EXPORT_SYMBOL_GPL(regmap_test_bits);
3236
3237	void regmap_async_complete_cb(struct regmap_async *async, int ret)
3238	{
3239	struct regmap *map = async->map;
3240	bool wake;
3241
3242	trace_regmap_async_io_complete(map);
3243
3244	spin_lock(lock: &map->async_lock);
3245	list_move(list: &async->list, head: &map->async_free);
3246	wake = list_empty(head: &map->async_list);
3247
3248	if (ret != 0)
3249	map->async_ret = ret;
3250
3251	spin_unlock(lock: &map->async_lock);
3252
3253	if (wake)
3254	wake_up(&map->async_waitq);
3255	}
3256	EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
3257
3258	static int regmap_async_is_done(struct regmap *map)
3259	{
3260	unsigned long flags;
3261	int ret;
3262
3263	spin_lock_irqsave(&map->async_lock, flags);
3264	ret = list_empty(head: &map->async_list);
3265	spin_unlock_irqrestore(lock: &map->async_lock, flags);
3266
3267	return ret;
3268	}
3269
3270	/**
3271	* regmap_async_complete - Ensure all asynchronous I/O has completed.
3272	*
3273	* @map: Map to operate on.
3274	*
3275	* Blocks until any pending asynchronous I/O has completed. Returns
3276	* an error code for any failed I/O operations.
3277	*/
3278	int regmap_async_complete(struct regmap *map)
3279	{
3280	unsigned long flags;
3281	int ret;
3282
3283	/* Nothing to do with no async support */
3284	if (!map->bus || !map->bus->async_write)
3285	return 0;
3286
3287	trace_regmap_async_complete_start(map);
3288
3289	wait_event(map->async_waitq, regmap_async_is_done(map));
3290
3291	spin_lock_irqsave(&map->async_lock, flags);
3292	ret = map->async_ret;
3293	map->async_ret = 0;
3294	spin_unlock_irqrestore(lock: &map->async_lock, flags);
3295
3296	trace_regmap_async_complete_done(map);
3297
3298	return ret;
3299	}
3300	EXPORT_SYMBOL_GPL(regmap_async_complete);
3301
3302	/**
3303	* regmap_register_patch - Register and apply register updates to be applied
3304	* on device initialistion
3305	*
3306	* @map: Register map to apply updates to.
3307	* @regs: Values to update.
3308	* @num_regs: Number of entries in regs.
3309	*
3310	* Register a set of register updates to be applied to the device
3311	* whenever the device registers are synchronised with the cache and
3312	* apply them immediately. Typically this is used to apply
3313	* corrections to be applied to the device defaults on startup, such
3314	* as the updates some vendors provide to undocumented registers.
3315	*
3316	* The caller must ensure that this function cannot be called
3317	* concurrently with either itself or regcache_sync().
3318	*/
3319	int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs,
3320	int num_regs)
3321	{
3322	struct reg_sequence *p;
3323	int ret;
3324	bool bypass;
3325
3326	if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
3327	num_regs))
3328	return 0;
3329
3330	p = krealloc(objp: map->patch,
3331	new_size: sizeof(struct reg_sequence) * (map->patch_regs + num_regs),
3332	GFP_KERNEL);
3333	if (p) {
3334	memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
3335	map->patch = p;
3336	map->patch_regs += num_regs;
3337	} else {
3338	return -ENOMEM;
3339	}
3340
3341	map->lock(map->lock_arg);
3342
3343	bypass = map->cache_bypass;
3344
3345	map->cache_bypass = true;
3346	map->async = true;
3347
3348	ret = _regmap_multi_reg_write(map, regs, num_regs);
3349
3350	map->async = false;
3351	map->cache_bypass = bypass;
3352
3353	map->unlock(map->lock_arg);
3354
3355	regmap_async_complete(map);
3356
3357	return ret;
3358	}
3359	EXPORT_SYMBOL_GPL(regmap_register_patch);
3360
3361	/**
3362	* regmap_get_val_bytes() - Report the size of a register value
3363	*
3364	* @map: Register map to operate on.
3365	*
3366	* Report the size of a register value, mainly intended to for use by
3367	* generic infrastructure built on top of regmap.
3368	*/
3369	int regmap_get_val_bytes(struct regmap *map)
3370	{
3371	if (map->format.format_write)
3372	return -EINVAL;
3373
3374	return map->format.val_bytes;
3375	}
3376	EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
3377
3378	/**
3379	* regmap_get_max_register() - Report the max register value
3380	*
3381	* @map: Register map to operate on.
3382	*
3383	* Report the max register value, mainly intended to for use by
3384	* generic infrastructure built on top of regmap.
3385	*/
3386	int regmap_get_max_register(struct regmap *map)
3387	{
3388	return map->max_register_is_set ? map->max_register : -EINVAL;
3389	}
3390	EXPORT_SYMBOL_GPL(regmap_get_max_register);
3391
3392	/**
3393	* regmap_get_reg_stride() - Report the register address stride
3394	*
3395	* @map: Register map to operate on.
3396	*
3397	* Report the register address stride, mainly intended to for use by
3398	* generic infrastructure built on top of regmap.
3399	*/
3400	int regmap_get_reg_stride(struct regmap *map)
3401	{
3402	return map->reg_stride;
3403	}
3404	EXPORT_SYMBOL_GPL(regmap_get_reg_stride);
3405
3406	/**
3407	* regmap_might_sleep() - Returns whether a regmap access might sleep.
3408	*
3409	* @map: Register map to operate on.
3410	*
3411	* Returns true if an access to the register might sleep, else false.
3412	*/
3413	bool regmap_might_sleep(struct regmap *map)
3414	{
3415	return map->can_sleep;
3416	}
3417	EXPORT_SYMBOL_GPL(regmap_might_sleep);
3418
3419	int regmap_parse_val(struct regmap *map, const void *buf,
3420	unsigned int *val)
3421	{
3422	if (!map->format.parse_val)
3423	return -EINVAL;
3424
3425	*val = map->format.parse_val(buf);
3426
3427	return 0;
3428	}
3429	EXPORT_SYMBOL_GPL(regmap_parse_val);
3430
3431	static int __init regmap_initcall(void)
3432	{
3433	regmap_debugfs_initcall();
3434
3435	return 0;
3436	}
3437	postcore_initcall(regmap_initcall);
3438