1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * COMEDI driver for Advantech PCI-1720U
4 * Copyright (c) 2015 H Hartley Sweeten <hsweeten@visionengravers.com>
5 *
6 * Separated from the adv_pci1710 driver written by:
7 * Michal Dobes <dobes@tesnet.cz>
8 *
9 * COMEDI - Linux Control and Measurement Device Interface
10 * Copyright (C) 2000 David A. Schleef <ds@schleef.org>
11 */
12
13/*
14 * Driver: adv_pci1720
15 * Description: 4-channel Isolated D/A Output board
16 * Devices: [Advantech] PCI-7120U (adv_pci1720)
17 * Author: H Hartley Sweeten <hsweeten@visionengravers.com>
18 * Updated: Fri, 29 Oct 2015 17:19:35 -0700
19 * Status: untested
20 *
21 * Configuration options: not applicable, uses PCI auto config
22 *
23 * The PCI-1720 has 4 isolated 12-bit analog output channels with multiple
24 * output ranges. It also has a BoardID switch to allow differentiating
25 * multiple boards in the system.
26 *
27 * The analog outputs can operate in two modes, immediate and synchronized.
28 * This driver currently does not support the synchronized output mode.
29 *
30 * Jumpers JP1 to JP4 are used to set the current sink ranges for each
31 * analog output channel. In order to use the current sink ranges, the
32 * unipolar 5V range must be used. The voltage output and sink output for
33 * each channel is available on the connector as separate pins.
34 *
35 * Jumper JP5 controls the "hot" reset state of the analog outputs.
36 * Depending on its setting, the analog outputs will either keep the
37 * last settings and output values or reset to the default state after
38 * a "hot" reset. The default state for all channels is uniploar 5V range
39 * and all the output values are 0V. To allow this feature to work, the
40 * analog outputs are not "reset" when the driver attaches.
41 */
42
43#include <linux/module.h>
44#include <linux/delay.h>
45#include <linux/comedi/comedi_pci.h>
46
47/*
48 * PCI BAR2 Register map (dev->iobase)
49 */
50#define PCI1720_AO_LSB_REG(x) (0x00 + ((x) * 2))
51#define PCI1720_AO_MSB_REG(x) (0x01 + ((x) * 2))
52#define PCI1720_AO_RANGE_REG 0x08
53#define PCI1720_AO_RANGE(c, r) (((r) & 0x3) << ((c) * 2))
54#define PCI1720_AO_RANGE_MASK(c) PCI1720_AO_RANGE((c), 0x3)
55#define PCI1720_SYNC_REG 0x09
56#define PCI1720_SYNC_CTRL_REG 0x0f
57#define PCI1720_SYNC_CTRL_SC0 BIT(0)
58#define PCI1720_BOARDID_REG 0x14
59
60static const struct comedi_lrange pci1720_ao_range = {
61 4, {
62 UNI_RANGE(5),
63 UNI_RANGE(10),
64 BIP_RANGE(5),
65 BIP_RANGE(10)
66 }
67};
68
69static int pci1720_ao_insn_write(struct comedi_device *dev,
70 struct comedi_subdevice *s,
71 struct comedi_insn *insn,
72 unsigned int *data)
73{
74 unsigned int chan = CR_CHAN(insn->chanspec);
75 unsigned int range = CR_RANGE(insn->chanspec);
76 unsigned int val;
77 int i;
78
79 /* set the channel range and polarity */
80 val = inb(port: dev->iobase + PCI1720_AO_RANGE_REG);
81 val &= ~PCI1720_AO_RANGE_MASK(chan);
82 val |= PCI1720_AO_RANGE(chan, range);
83 outb(value: val, port: dev->iobase + PCI1720_AO_RANGE_REG);
84
85 val = s->readback[chan];
86 for (i = 0; i < insn->n; i++) {
87 val = data[i];
88
89 outb(value: val & 0xff, port: dev->iobase + PCI1720_AO_LSB_REG(chan));
90 outb(value: (val >> 8) & 0xff, port: dev->iobase + PCI1720_AO_MSB_REG(chan));
91
92 /* conversion time is 2us (500 kHz throughput) */
93 usleep_range(min: 2, max: 100);
94 }
95
96 s->readback[chan] = val;
97
98 return insn->n;
99}
100
101static int pci1720_di_insn_bits(struct comedi_device *dev,
102 struct comedi_subdevice *s,
103 struct comedi_insn *insn,
104 unsigned int *data)
105{
106 data[1] = inb(port: dev->iobase + PCI1720_BOARDID_REG);
107
108 return insn->n;
109}
110
111static int pci1720_auto_attach(struct comedi_device *dev,
112 unsigned long context)
113{
114 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
115 struct comedi_subdevice *s;
116 int ret;
117
118 ret = comedi_pci_enable(dev);
119 if (ret)
120 return ret;
121 dev->iobase = pci_resource_start(pcidev, 2);
122
123 ret = comedi_alloc_subdevices(dev, num_subdevices: 2);
124 if (ret)
125 return ret;
126
127 /* Analog Output subdevice */
128 s = &dev->subdevices[0];
129 s->type = COMEDI_SUBD_AO;
130 s->subdev_flags = SDF_WRITABLE;
131 s->n_chan = 4;
132 s->maxdata = 0x0fff;
133 s->range_table = &pci1720_ao_range;
134 s->insn_write = pci1720_ao_insn_write;
135
136 ret = comedi_alloc_subdev_readback(s);
137 if (ret)
138 return ret;
139
140 /* Digital Input subdevice (BoardID SW1) */
141 s = &dev->subdevices[1];
142 s->type = COMEDI_SUBD_DI;
143 s->subdev_flags = SDF_READABLE;
144 s->n_chan = 4;
145 s->maxdata = 1;
146 s->range_table = &range_digital;
147 s->insn_bits = pci1720_di_insn_bits;
148
149 /* disable synchronized output, channels update when written */
150 outb(value: 0, port: dev->iobase + PCI1720_SYNC_CTRL_REG);
151
152 return 0;
153}
154
155static struct comedi_driver adv_pci1720_driver = {
156 .driver_name = "adv_pci1720",
157 .module = THIS_MODULE,
158 .auto_attach = pci1720_auto_attach,
159 .detach = comedi_pci_detach,
160};
161
162static int adv_pci1720_pci_probe(struct pci_dev *dev,
163 const struct pci_device_id *id)
164{
165 return comedi_pci_auto_config(pcidev: dev, driver: &adv_pci1720_driver,
166 context: id->driver_data);
167}
168
169static const struct pci_device_id adv_pci1720_pci_table[] = {
170 { PCI_DEVICE(PCI_VENDOR_ID_ADVANTECH, 0x1720) },
171 { 0 }
172};
173MODULE_DEVICE_TABLE(pci, adv_pci1720_pci_table);
174
175static struct pci_driver adv_pci1720_pci_driver = {
176 .name = "adv_pci1720",
177 .id_table = adv_pci1720_pci_table,
178 .probe = adv_pci1720_pci_probe,
179 .remove = comedi_pci_auto_unconfig,
180};
181module_comedi_pci_driver(adv_pci1720_driver, adv_pci1720_pci_driver);
182
183MODULE_AUTHOR("H Hartley Sweeten <hsweeten@visionengravers.com>");
184MODULE_DESCRIPTION("Comedi driver for Advantech PCI-1720 Analog Output board");
185MODULE_LICENSE("GPL");
186

source code of linux/drivers/comedi/drivers/adv_pci1720.c