1// SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only)
2/* Copyright(c) 2015 - 2021 Intel Corporation */
3#include <adf_accel_devices.h>
4#include <adf_common_drv.h>
5#include <adf_gen2_config.h>
6#include <adf_gen2_hw_csr_data.h>
7#include <adf_gen2_hw_data.h>
8#include <adf_gen2_pfvf.h>
9#include <adf_pfvf_vf_msg.h>
10#include "adf_dh895xccvf_hw_data.h"
11
12static struct adf_hw_device_class dh895xcciov_class = {
13 .name = ADF_DH895XCCVF_DEVICE_NAME,
14 .type = DEV_DH895XCCVF,
15};
16
17static u32 get_accel_mask(struct adf_hw_device_data *self)
18{
19 return ADF_DH895XCCIOV_ACCELERATORS_MASK;
20}
21
22static u32 get_ae_mask(struct adf_hw_device_data *self)
23{
24 return ADF_DH895XCCIOV_ACCELENGINES_MASK;
25}
26
27static u32 get_num_accels(struct adf_hw_device_data *self)
28{
29 return ADF_DH895XCCIOV_MAX_ACCELERATORS;
30}
31
32static u32 get_num_aes(struct adf_hw_device_data *self)
33{
34 return ADF_DH895XCCIOV_MAX_ACCELENGINES;
35}
36
37static u32 get_misc_bar_id(struct adf_hw_device_data *self)
38{
39 return ADF_DH895XCCIOV_PMISC_BAR;
40}
41
42static u32 get_etr_bar_id(struct adf_hw_device_data *self)
43{
44 return ADF_DH895XCCIOV_ETR_BAR;
45}
46
47static enum dev_sku_info get_sku(struct adf_hw_device_data *self)
48{
49 return DEV_SKU_VF;
50}
51
52static int adf_vf_int_noop(struct adf_accel_dev *accel_dev)
53{
54 return 0;
55}
56
57static void adf_vf_void_noop(struct adf_accel_dev *accel_dev)
58{
59}
60
61void adf_init_hw_data_dh895xcciov(struct adf_hw_device_data *hw_data)
62{
63 hw_data->dev_class = &dh895xcciov_class;
64 hw_data->num_banks = ADF_DH895XCCIOV_ETR_MAX_BANKS;
65 hw_data->num_rings_per_bank = ADF_ETR_MAX_RINGS_PER_BANK;
66 hw_data->num_accel = ADF_DH895XCCIOV_MAX_ACCELERATORS;
67 hw_data->num_logical_accel = 1;
68 hw_data->num_engines = ADF_DH895XCCIOV_MAX_ACCELENGINES;
69 hw_data->tx_rx_gap = ADF_DH895XCCIOV_RX_RINGS_OFFSET;
70 hw_data->tx_rings_mask = ADF_DH895XCCIOV_TX_RINGS_MASK;
71 hw_data->ring_to_svc_map = ADF_GEN2_DEFAULT_RING_TO_SRV_MAP;
72 hw_data->alloc_irq = adf_vf_isr_resource_alloc;
73 hw_data->free_irq = adf_vf_isr_resource_free;
74 hw_data->enable_error_correction = adf_vf_void_noop;
75 hw_data->init_admin_comms = adf_vf_int_noop;
76 hw_data->exit_admin_comms = adf_vf_void_noop;
77 hw_data->send_admin_init = adf_vf2pf_notify_init;
78 hw_data->init_arb = adf_vf_int_noop;
79 hw_data->exit_arb = adf_vf_void_noop;
80 hw_data->disable_iov = adf_vf2pf_notify_shutdown;
81 hw_data->get_accel_mask = get_accel_mask;
82 hw_data->get_ae_mask = get_ae_mask;
83 hw_data->get_num_accels = get_num_accels;
84 hw_data->get_num_aes = get_num_aes;
85 hw_data->get_etr_bar_id = get_etr_bar_id;
86 hw_data->get_misc_bar_id = get_misc_bar_id;
87 hw_data->get_sku = get_sku;
88 hw_data->enable_ints = adf_vf_void_noop;
89 hw_data->dev_class->instances++;
90 hw_data->dev_config = adf_gen2_dev_config;
91 adf_devmgr_update_class_index(hw_data);
92 adf_gen2_init_vf_pfvf_ops(pfvf_ops: &hw_data->pfvf_ops);
93 adf_gen2_init_hw_csr_ops(csr_ops: &hw_data->csr_ops);
94 adf_gen2_init_dc_ops(dc_ops: &hw_data->dc_ops);
95}
96
97void adf_clean_hw_data_dh895xcciov(struct adf_hw_device_data *hw_data)
98{
99 hw_data->dev_class->instances--;
100 adf_devmgr_update_class_index(hw_data);
101}
102

source code of linux/drivers/crypto/intel/qat/qat_dh895xccvf/adf_dh895xccvf_hw_data.c