| 1 | // SPDX-License-Identifier: GPL-2.0-only |
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| 2 | /* Copyright(c) 2023 Intel Corporation. All rights reserved. */ |
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| 3 | #include <linux/module.h> |
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| 4 | #include <linux/dax.h> |
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| 5 | |
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| 6 | #include "../cxl/cxl.h" |
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| 7 | #include "bus.h" |
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| 8 | |
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| 9 | static int cxl_dax_region_probe(struct device *dev) |
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| 10 | { |
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| 11 | struct cxl_dax_region *cxlr_dax = to_cxl_dax_region(dev); |
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| 12 | int nid = phys_to_target_node(start: cxlr_dax->hpa_range.start); |
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| 13 | struct cxl_region *cxlr = cxlr_dax->cxlr; |
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| 14 | struct dax_region *dax_region; |
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| 15 | struct dev_dax_data data; |
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| 16 | |
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| 17 | if (nid == NUMA_NO_NODE) |
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| 18 | nid = memory_add_physaddr_to_nid(start: cxlr_dax->hpa_range.start); |
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| 19 | |
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| 20 | dax_region = alloc_dax_region(parent: dev, region_id: cxlr->id, range: &cxlr_dax->hpa_range, target_node: nid, |
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| 21 | PMD_SIZE, IORESOURCE_DAX_KMEM); |
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| 22 | if (!dax_region) |
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| 23 | return -ENOMEM; |
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| 24 | |
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| 25 | data = (struct dev_dax_data) { |
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| 26 | .dax_region = dax_region, |
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| 27 | .id = -1, |
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| 28 | .size = range_len(range: &cxlr_dax->hpa_range), |
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| 29 | .memmap_on_memory = true, |
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| 30 | }; |
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| 31 | |
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| 32 | return PTR_ERR_OR_ZERO(ptr: devm_create_dev_dax(data: &data)); |
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| 33 | } |
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| 34 | |
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| 35 | static struct cxl_driver cxl_dax_region_driver = { |
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| 36 | .name = "cxl_dax_region" , |
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| 37 | .probe = cxl_dax_region_probe, |
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| 38 | .id = CXL_DEVICE_DAX_REGION, |
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| 39 | .drv = { |
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| 40 | .suppress_bind_attrs = true, |
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| 41 | }, |
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| 42 | }; |
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| 43 | |
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| 44 | module_cxl_driver(cxl_dax_region_driver); |
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| 45 | MODULE_ALIAS_CXL(CXL_DEVICE_DAX_REGION); |
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| 46 | MODULE_LICENSE("GPL" ); |
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| 47 | MODULE_AUTHOR("Intel Corporation" ); |
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| 48 | MODULE_IMPORT_NS(CXL); |
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| 49 | |
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