| 1 | /* |
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| 2 | * Copyright 2020 Advanced Micro Devices, Inc. |
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| 3 | * |
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| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
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| 5 | * copy of this software and associated documentation files (the "Software"), |
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| 6 | * to deal in the Software without restriction, including without limitation |
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| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
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| 9 | * Software is furnished to do so, subject to the following conditions: |
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| 10 | * |
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| 11 | * The above copyright notice and this permission notice shall be included in |
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| 12 | * all copies or substantial portions of the Software. |
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| 13 | * |
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| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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| 17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
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| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
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| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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| 20 | * OTHER DEALINGS IN THE SOFTWARE. |
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| 21 | * |
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| 22 | * Authors: AMD |
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| 23 | * |
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| 24 | */ |
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| 25 | |
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| 26 | #ifndef __DML30_DISPLAY_RQ_DLG_CALC_H__ |
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| 27 | #define __DML30_DISPLAY_RQ_DLG_CALC_H__ |
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| 28 | |
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| 29 | #include "../display_rq_dlg_helpers.h" |
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| 30 | |
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| 31 | struct display_mode_lib; |
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| 32 | |
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| 33 | // Function: dml_rq_dlg_get_rq_reg |
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| 34 | // Main entry point for test to get the register values out of this DML class. |
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| 35 | // This function calls <get_rq_param> and <extract_rq_regs> functions to calculate |
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| 36 | // and then populate the rq_regs struct |
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| 37 | // Input: |
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| 38 | // pipe_param - pipe source configuration (e.g. vp, pitch, scaling, dest, etc.) |
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| 39 | // Output: |
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| 40 | // rq_regs - struct that holds all the RQ registers field value. |
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| 41 | // See also: <display_rq_regs_st> |
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| 42 | void dml30_rq_dlg_get_rq_reg(struct display_mode_lib *mode_lib, |
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| 43 | display_rq_regs_st *rq_regs, |
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| 44 | const display_pipe_params_st *pipe_param); |
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| 45 | |
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| 46 | // Function: dml_rq_dlg_get_dlg_reg |
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| 47 | // Calculate and return DLG and TTU register struct given the system setting |
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| 48 | // Output: |
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| 49 | // dlg_regs - output DLG register struct |
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| 50 | // ttu_regs - output DLG TTU register struct |
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| 51 | // Input: |
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| 52 | // e2e_pipe_param - "compacted" array of e2e pipe param struct |
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| 53 | // num_pipes - num of active "pipe" or "route" |
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| 54 | // pipe_idx - index that identifies the e2e_pipe_param that corresponding to this dlg |
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| 55 | // cstate - 0: when calculate min_ttu_vblank it is assumed cstate is not required. 1: Normal mode, cstate is considered. |
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| 56 | // Added for legacy or unrealistic timing tests. |
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| 57 | void dml30_rq_dlg_get_dlg_reg(struct display_mode_lib *mode_lib, |
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| 58 | display_dlg_regs_st *dlg_regs, |
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| 59 | display_ttu_regs_st *ttu_regs, |
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| 60 | const display_e2e_pipe_params_st *e2e_pipe_param, |
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| 61 | const unsigned int num_pipes, |
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| 62 | const unsigned int pipe_idx, |
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| 63 | const bool cstate_en, |
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| 64 | const bool pstate_en, |
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| 65 | const bool vm_en, |
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| 66 | const bool ignore_viewport_pos, |
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| 67 | const bool immediate_flip_support); |
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| 68 | |
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| 69 | #endif |
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| 70 | |
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