1/*
2 * Copyright (C) 2017 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
18 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
19 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
20 */
21#ifndef _thm_10_0_DEFAULT_HEADER
22#define _thm_10_0_DEFAULT_HEADER
23
24
25// addressBlock: thm_thm_SmuThmDec
26#define mmTHM_TCON_CUR_TMP_DEFAULT 0x00000000
27#define mmTHM_TCON_HTC_DEFAULT 0x00004000
28#define mmTHM_TCON_THERM_TRIP_DEFAULT 0x00000001
29#define mmTHM_CTF_DELAY_DEFAULT 0x00000000
30#define mmTHM_GPIO_PROCHOT_CTRL_DEFAULT 0x000000f9
31#define mmTHM_THERMAL_INT_ENA_DEFAULT 0x00000000
32#define mmTHM_THERMAL_INT_CTRL_DEFAULT 0x0fff0078
33#define mmTHM_THERMAL_INT_STATUS_DEFAULT 0x00000000
34#define mmTHM_TMON0_RDIL0_DATA_DEFAULT 0x00000000
35#define mmTHM_TMON0_RDIL1_DATA_DEFAULT 0x00000000
36#define mmTHM_TMON0_RDIL2_DATA_DEFAULT 0x00000000
37#define mmTHM_TMON0_RDIL3_DATA_DEFAULT 0x00000000
38#define mmTHM_TMON0_RDIL4_DATA_DEFAULT 0x00000000
39#define mmTHM_TMON0_RDIL5_DATA_DEFAULT 0x00000000
40#define mmTHM_TMON0_RDIL6_DATA_DEFAULT 0x00000000
41#define mmTHM_TMON0_RDIL7_DATA_DEFAULT 0x00000000
42#define mmTHM_TMON0_RDIL8_DATA_DEFAULT 0x00000000
43#define mmTHM_TMON0_RDIL9_DATA_DEFAULT 0x00000000
44#define mmTHM_TMON0_RDIL10_DATA_DEFAULT 0x00000000
45#define mmTHM_TMON0_RDIL11_DATA_DEFAULT 0x00000000
46#define mmTHM_TMON0_RDIL12_DATA_DEFAULT 0x00000000
47#define mmTHM_TMON0_RDIL13_DATA_DEFAULT 0x00000000
48#define mmTHM_TMON0_RDIL14_DATA_DEFAULT 0x00000000
49#define mmTHM_TMON0_RDIL15_DATA_DEFAULT 0x00000000
50#define mmTHM_TMON0_RDIR0_DATA_DEFAULT 0x00000000
51#define mmTHM_TMON0_RDIR1_DATA_DEFAULT 0x00000000
52#define mmTHM_TMON0_RDIR2_DATA_DEFAULT 0x00000000
53#define mmTHM_TMON0_RDIR3_DATA_DEFAULT 0x00000000
54#define mmTHM_TMON0_RDIR4_DATA_DEFAULT 0x00000000
55#define mmTHM_TMON0_RDIR5_DATA_DEFAULT 0x00000000
56#define mmTHM_TMON0_RDIR6_DATA_DEFAULT 0x00000000
57#define mmTHM_TMON0_RDIR7_DATA_DEFAULT 0x00000000
58#define mmTHM_TMON0_RDIR8_DATA_DEFAULT 0x00000000
59#define mmTHM_TMON0_RDIR9_DATA_DEFAULT 0x00000000
60#define mmTHM_TMON0_RDIR10_DATA_DEFAULT 0x00000000
61#define mmTHM_TMON0_RDIR11_DATA_DEFAULT 0x00000000
62#define mmTHM_TMON0_RDIR12_DATA_DEFAULT 0x00000000
63#define mmTHM_TMON0_RDIR13_DATA_DEFAULT 0x00000000
64#define mmTHM_TMON0_RDIR14_DATA_DEFAULT 0x00000000
65#define mmTHM_TMON0_RDIR15_DATA_DEFAULT 0x00000000
66#define mmTHM_TMON0_INT_DATA_DEFAULT 0x00000000
67#define mmTHM_TMON0_CTRL_DEFAULT 0x00000100
68#define mmTHM_TMON0_CTRL2_DEFAULT 0x0fffffff
69#define mmTHM_TMON0_DEBUG_DEFAULT 0x00000000
70#define mmTHM_DIE1_TEMP_DEFAULT 0x00000000
71#define mmTHM_DIE2_TEMP_DEFAULT 0x00000000
72#define mmTHM_DIE3_TEMP_DEFAULT 0x00000000
73#define mmTHM_SW_TEMP_DEFAULT 0x00000000
74#define mmCG_MULT_THERMAL_CTRL_DEFAULT 0x08400001
75#define mmCG_MULT_THERMAL_STATUS_DEFAULT 0x00000000
76#define mmCG_THERMAL_RANGE_DEFAULT 0x00000000
77#define mmTHM_TMON_CONFIG_DEFAULT 0xc0800005
78#define mmTHM_TMON_CONFIG2_DEFAULT 0x30c8680e
79#define mmTHM_TMON0_COEFF_DEFAULT 0x00024068
80#define mmTHM_TCON_LOCAL0_DEFAULT 0x00000000
81#define mmTHM_TCON_LOCAL1_DEFAULT 0x00000000
82#define mmTHM_TCON_LOCAL2_DEFAULT 0x00000060
83#define mmTHM_TCON_LOCAL3_DEFAULT 0x00000000
84#define mmTHM_TCON_LOCAL4_DEFAULT 0x00000000
85#define mmTHM_TCON_LOCAL5_DEFAULT 0x00000000
86#define mmTHM_TCON_LOCAL6_DEFAULT 0x00000000
87#define mmTHM_TCON_LOCAL7_DEFAULT 0x00000000
88#define mmTHM_TCON_LOCAL8_DEFAULT 0x00000000
89#define mmTHM_TCON_LOCAL9_DEFAULT 0x00000000
90#define mmTHM_TCON_LOCAL10_DEFAULT 0x00000000
91#define mmTHM_TCON_LOCAL11_DEFAULT 0x00000000
92#define mmTHM_TCON_LOCAL12_DEFAULT 0x00000000
93#define mmTHM_TCON_LOCAL13_DEFAULT 0x00000000
94#define mmTHM_PWRMGT_DEFAULT 0x00010000
95#define mmSMUSBI_SBIREGADDR_DEFAULT 0x00000000
96#define mmSMUSBI_SBIREGDATA_DEFAULT 0x00000000
97#define mmSMUSBI_ERRATA_STAT_REG_DEFAULT 0x00000000
98#define mmSMUSBI_SBICTRL_DEFAULT 0x00000002
99#define mmSMUSBI_CKNBIRESET_DEFAULT 0x00000000
100#define mmSMUSBI_TIMING_DEFAULT 0x001f001a
101#define mmSMUSBI_HS_TIMING_DEFAULT 0x00050003
102#define mmSBTSI_REMOTE_TEMP_DEFAULT 0x00000000
103#define mmSBRMI_CONTROL_DEFAULT 0x00000000
104#define mmSBRMI_COMMAND_DEFAULT 0x00000000
105#define mmSBRMI_WRITE_DATA0_DEFAULT 0x00000000
106#define mmSBRMI_WRITE_DATA1_DEFAULT 0x00000000
107#define mmSBRMI_WRITE_DATA2_DEFAULT 0x00000000
108#define mmSBRMI_READ_DATA0_DEFAULT 0x00000000
109#define mmSBRMI_READ_DATA1_DEFAULT 0x00000000
110#define mmSBRMI_CORE_EN_NUMBER_DEFAULT 0x00000010
111#define mmSBRMI_CORE_EN_STATUS0_DEFAULT 0x00000000
112#define mmSBRMI_CORE_EN_STATUS1_DEFAULT 0x00000000
113#define mmSBRMI_APIC_STATUS0_DEFAULT 0x00000000
114#define mmSBRMI_APIC_STATUS1_DEFAULT 0x00000000
115#define mmSBRMI_MCE_STATUS0_DEFAULT 0x00000000
116#define mmSBRMI_MCE_STATUS1_DEFAULT 0x00000000
117#define mmSMBUS_CNTL0_DEFAULT 0x00030082
118#define mmSMBUS_CNTL1_DEFAULT 0x0000063f
119#define mmSMBUS_BLKWR_CMD_CTRL0_DEFAULT 0x12110201
120#define mmSMBUS_BLKWR_CMD_CTRL1_DEFAULT 0x0003005a
121#define mmSMBUS_BLKRD_CMD_CTRL0_DEFAULT 0x00001303
122#define mmSMBUS_BLKRD_CMD_CTRL1_DEFAULT 0x00000000
123#define mmSMBUS_TIMING_CNTL0_DEFAULT 0x028a4f5c
124#define mmSMBUS_TIMING_CNTL1_DEFAULT 0x08036927
125#define mmSMBUS_TIMING_CNTL2_DEFAULT 0x0021e548
126#define mmSMBUS_TRIGGER_CNTL_DEFAULT 0x00000000
127#define mmSMBUS_UDID_CNTL0_DEFAULT 0x7fffffff
128#define mmSMBUS_UDID_CNTL1_DEFAULT 0x00000000
129#define mmSMBUS_UDID_CNTL2_DEFAULT 0x00000043
130#define mmSMUSBI_SMBUS_DEFAULT 0x000001c0
131#define mmSMUSBI_ALERT_DEFAULT 0x000000f9
132#define mmTHM_TMON0_REMOTE_START_DEFAULT 0x00000000
133#define mmTHM_TMON0_REMOTE_END_DEFAULT 0x00000000
134#define mmTHM_TMON1_REMOTE_START_DEFAULT 0x00000000
135#define mmTHM_TMON1_REMOTE_END_DEFAULT 0x00000000
136#define mmTHM_TMON2_REMOTE_START_DEFAULT 0x00000000
137#define mmTHM_TMON2_REMOTE_END_DEFAULT 0x00000000
138#define mmTHM_TMON3_REMOTE_START_DEFAULT 0x00000000
139#define mmTHM_TMON3_REMOTE_END_DEFAULT 0x00000000
140
141#endif
142

source code of linux/drivers/gpu/drm/amd/include/asic_reg/thm/thm_10_0_default.h