1 | /* |
2 | * Copyright 2021 Advanced Micro Devices, Inc. |
3 | * |
4 | * Permission is hereby granted, free of charge, to any person obtaining a |
5 | * copy of this software and associated documentation files (the "Software"), |
6 | * to deal in the Software without restriction, including without limitation |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
8 | * and/or sell copies of the Software, and to permit persons to whom the |
9 | * Software is furnished to do so, subject to the following conditions: |
10 | * |
11 | * The above copyright notice and this permission notice shall be included in |
12 | * all copies or substantial portions of the Software. |
13 | * |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
20 | * OTHER DEALINGS IN THE SOFTWARE. |
21 | * |
22 | */ |
23 | #ifndef __IRQSRCS_GFX_11_0_0_H__ |
24 | #define __IRQSRCS_GFX_11_0_0_H__ |
25 | |
26 | |
27 | #define GFX_11_0_0__SRCID__UTCL2_FAULT 0 // UTCL2 has encountered a fault or retry scenario |
28 | #define GFX_11_0_0__SRCID__UTCL2_DATA_POISONING 1 // UTCL2 for data poisoning |
29 | |
30 | #define GFX_11_0_0__SRCID__MEM_ACCES_MON 10 // 0x0A EA memory access monitor interrupt |
31 | |
32 | #define GFX_11_0_0__SRCID__SDMA_ATOMIC_RTN_DONE 48 // 0x30 SDMA atomic*_rtn ops complete |
33 | #define GFX_11_0_0__SRCID__SDMA_TRAP 49 // 0x31 Trap |
34 | #define GFX_11_0_0__SRCID__SDMA_SRBMWRITE 50 // 0x32 SRBM write Protection |
35 | #define GFX_11_0_0__SRCID__SDMA_CTXEMPTY 51 // 0x33 Context Empty |
36 | #define GFX_11_0_0__SRCID__SDMA_PREEMPT 52 // 0x34 SDMA New Run List |
37 | #define GFX_11_0_0__SRCID__SDMA_IB_PREEMPT 53 // 0x35 sdma mid - command buffer preempt interrupt |
38 | #define GFX_11_0_0__SRCID__SDMA_DOORBELL_INVALID 54 // 0x36 Doorbell BE invalid |
39 | #define GFX_11_0_0__SRCID__SDMA_QUEUE_HANG 55 // 0x37 Queue hang or Command timeout |
40 | #define GFX_11_0_0__SRCID__SDMA_ATOMIC_TIMEOUT 56 // 0x38 SDMA atomic CMPSWAP loop timeout |
41 | #define GFX_11_0_0__SRCID__SDMA_POLL_TIMEOUT 57 // 0x39 SRBM read poll timeout |
42 | #define GFX_11_0_0__SRCID__SDMA_PAGE_TIMEOUT 58 // 0x3A Page retry timeout after UTCL2 return nack = 1 |
43 | #define GFX_11_0_0__SRCID__SDMA_PAGE_NULL 59 // 0x3B Page Null from UTCL2 when nack = 2 |
44 | #define GFX_11_0_0__SRCID__SDMA_PAGE_FAULT 60 // 0x3C Page Fault Error from UTCL2 when nack = 3 |
45 | #define GFX_11_0_0__SRCID__SDMA_VM_HOLE 61 // 0x3D MC or SEM address in VM hole |
46 | #define GFX_11_0_0__SRCID__SDMA_ECC 62 // 0x3E ECC Error |
47 | #define GFX_11_0_0__SRCID__SDMA_FROZEN 63 // 0x3F SDMA Frozen |
48 | #define GFX_11_0_0__SRCID__SDMA_SRAM_ECC 64 // 0x40 SRAM ECC Error |
49 | #define GFX_11_0_0__SRCID__SDMA_SEM_INCOMPLETE_TIMEOUT 65 // 0x41 GPF(Sem incomplete timeout) |
50 | #define GFX_11_0_0__SRCID__SDMA_SEM_WAIT_FAIL_TIMEOUT 66 // 0x42 Semaphore wait fail timeout |
51 | |
52 | #define GFX_11_0_0__SRCID__RLC_GC_FED_INTERRUPT 128 // 0x80 FED Interrupt (for data poisoning) |
53 | |
54 | #define GFX_11_0_0__SRCID__CP_GENERIC_INT 177 // 0xB1 CP_GENERIC int |
55 | #define GFX_11_0_0__SRCID__CP_PM4_PKT_RSVD_BIT_ERROR 180 // 0xB4 PM4 Pkt Rsvd Bits Error |
56 | #define GFX_11_0_0__SRCID__CP_EOP_INTERRUPT 181 // 0xB5 End-of-Pipe Interrupt |
57 | #define GFX_11_0_0__SRCID__CP_BAD_OPCODE_ERROR 183 // 0xB7 Bad Opcode Error |
58 | #define GFX_11_0_0__SRCID__CP_PRIV_REG_FAULT 184 // 0xB8 Privileged Register Fault |
59 | #define GFX_11_0_0__SRCID__CP_PRIV_INSTR_FAULT 185 // 0xB9 Privileged Instr Fault |
60 | #define GFX_11_0_0__SRCID__CP_WAIT_MEM_SEM_FAULT 186 // 0xBA Wait Memory Semaphore Fault (Synchronization Object Fault) |
61 | #define GFX_11_0_0__SRCID__CP_CTX_EMPTY_INTERRUPT 187 // 0xBB Context Empty Interrupt |
62 | #define GFX_11_0_0__SRCID__CP_CTX_BUSY_INTERRUPT 188 // 0xBC Context Busy Interrupt |
63 | #define GFX_11_0_0__SRCID__CP_ME_WAIT_REG_MEM_POLL_TIMEOUT 192 // 0xC0 CP.ME Wait_Reg_Mem Poll Timeout |
64 | #define GFX_11_0_0__SRCID__CP_SIG_INCOMPLETE 193 // 0xC1 "Surface Probe Fault Signal Incomplete" |
65 | #define GFX_11_0_0__SRCID__CP_PREEMPT_ACK 194 // 0xC2 Preemption Ack-wledge |
66 | #define GFX_11_0_0__SRCID__CP_GPF 195 // 0xC3 General Protection Fault (GPF) |
67 | #define GFX_11_0_0__SRCID__CP_GDS_ALLOC_ERROR 196 // 0xC4 GDS Alloc Error |
68 | #define GFX_11_0_0__SRCID__CP_ECC_ERROR 197 // 0xC5 ECC Error |
69 | #define GFX_11_0_0__SRCID__CP_COMPUTE_QUERY_STATUS 199 // 0xC7 Compute query status |
70 | #define GFX_11_0_0__SRCID__CP_VM_DOORBELL 200 // 0xC8 Unattached VM Doorbell Received |
71 | #define GFX_11_0_0__SRCID__CP_FUE_ERROR 201 // 0xC9 ECC FUE Error |
72 | #define GFX_11_0_0__SRCID__RLC_STRM_PERF_MONITOR_INTERRUPT 202 // 0xCA Streaming Perf Monitor Interrupt |
73 | #define GFX_11_0_0__SRCID__GRBM_RD_TIMEOUT_ERROR 232 // 0xE8 CRead timeout error |
74 | #define GFX_11_0_0__SRCID__GRBM_REG_GUI_IDLE 233 // 0xE9 Register GUI Idle |
75 | |
76 | #define GFX_11_0_0__SRCID__SQ_INTERRUPT_ID 239 // 0xEF SQ Interrupt (ttrace wrap, errors) |
77 | |
78 | |
79 | #endif |
80 | |