1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
2 | /* |
3 | * Copyright(c) 2016, Analogix Semiconductor. |
4 | * Copyright(c) 2017, Icenowy Zheng <icenowy@aosc.io> |
5 | * |
6 | * Based on anx7808 driver obtained from chromeos with copyright: |
7 | * Copyright(c) 2013, Google Inc. |
8 | */ |
9 | #include <linux/delay.h> |
10 | #include <linux/err.h> |
11 | #include <linux/gpio/consumer.h> |
12 | #include <linux/i2c.h> |
13 | #include <linux/interrupt.h> |
14 | #include <linux/kernel.h> |
15 | #include <linux/module.h> |
16 | #include <linux/of_platform.h> |
17 | #include <linux/regmap.h> |
18 | #include <linux/regulator/consumer.h> |
19 | #include <linux/types.h> |
20 | |
21 | #include <drm/display/drm_dp_helper.h> |
22 | #include <drm/drm_atomic_helper.h> |
23 | #include <drm/drm_bridge.h> |
24 | #include <drm/drm_crtc.h> |
25 | #include <drm/drm_edid.h> |
26 | #include <drm/drm_of.h> |
27 | #include <drm/drm_panel.h> |
28 | #include <drm/drm_print.h> |
29 | #include <drm/drm_probe_helper.h> |
30 | |
31 | #include "analogix-i2c-dptx.h" |
32 | #include "analogix-i2c-txcommon.h" |
33 | |
34 | #define POLL_DELAY 50000 /* us */ |
35 | #define POLL_TIMEOUT 5000000 /* us */ |
36 | |
37 | #define I2C_IDX_DPTX 0 |
38 | #define I2C_IDX_TXCOM 1 |
39 | |
40 | static const u8 anx6345_i2c_addresses[] = { |
41 | [I2C_IDX_DPTX] = 0x70, |
42 | [I2C_IDX_TXCOM] = 0x72, |
43 | }; |
44 | #define I2C_NUM_ADDRESSES ARRAY_SIZE(anx6345_i2c_addresses) |
45 | |
46 | struct anx6345 { |
47 | struct drm_dp_aux aux; |
48 | struct drm_bridge bridge; |
49 | struct i2c_client *client; |
50 | struct edid *edid; |
51 | struct drm_connector connector; |
52 | struct drm_panel *panel; |
53 | struct regulator *dvdd12; |
54 | struct regulator *dvdd25; |
55 | struct gpio_desc *gpiod_reset; |
56 | struct mutex lock; /* protect EDID access */ |
57 | |
58 | /* I2C Slave addresses of ANX6345 are mapped as DPTX and SYS */ |
59 | struct i2c_client *i2c_clients[I2C_NUM_ADDRESSES]; |
60 | struct regmap *map[I2C_NUM_ADDRESSES]; |
61 | |
62 | u16 chipid; |
63 | u8 dpcd[DP_RECEIVER_CAP_SIZE]; |
64 | |
65 | bool powered; |
66 | }; |
67 | |
68 | static inline struct anx6345 *connector_to_anx6345(struct drm_connector *c) |
69 | { |
70 | return container_of(c, struct anx6345, connector); |
71 | } |
72 | |
73 | static inline struct anx6345 *bridge_to_anx6345(struct drm_bridge *bridge) |
74 | { |
75 | return container_of(bridge, struct anx6345, bridge); |
76 | } |
77 | |
78 | static int anx6345_set_bits(struct regmap *map, u8 reg, u8 mask) |
79 | { |
80 | return regmap_update_bits(map, reg, mask, val: mask); |
81 | } |
82 | |
83 | static int anx6345_clear_bits(struct regmap *map, u8 reg, u8 mask) |
84 | { |
85 | return regmap_update_bits(map, reg, mask, val: 0); |
86 | } |
87 | |
88 | static ssize_t anx6345_aux_transfer(struct drm_dp_aux *aux, |
89 | struct drm_dp_aux_msg *msg) |
90 | { |
91 | struct anx6345 *anx6345 = container_of(aux, struct anx6345, aux); |
92 | |
93 | return anx_dp_aux_transfer(map_dptx: anx6345->map[I2C_IDX_DPTX], msg); |
94 | } |
95 | |
96 | static int anx6345_dp_link_training(struct anx6345 *anx6345) |
97 | { |
98 | unsigned int value; |
99 | u8 dp_bw, dpcd[2]; |
100 | int err; |
101 | |
102 | err = anx6345_clear_bits(map: anx6345->map[I2C_IDX_TXCOM], |
103 | SP_POWERDOWN_CTRL_REG, |
104 | SP_TOTAL_PD); |
105 | if (err) |
106 | return err; |
107 | |
108 | err = drm_dp_dpcd_readb(aux: &anx6345->aux, DP_MAX_LINK_RATE, valuep: &dp_bw); |
109 | if (err < 0) |
110 | return err; |
111 | |
112 | switch (dp_bw) { |
113 | case DP_LINK_BW_1_62: |
114 | case DP_LINK_BW_2_7: |
115 | break; |
116 | |
117 | default: |
118 | DRM_DEBUG_KMS("DP bandwidth (%#02x) not supported\n" , dp_bw); |
119 | return -EINVAL; |
120 | } |
121 | |
122 | err = anx6345_set_bits(map: anx6345->map[I2C_IDX_TXCOM], SP_VID_CTRL1_REG, |
123 | SP_VIDEO_MUTE); |
124 | if (err) |
125 | return err; |
126 | |
127 | err = anx6345_clear_bits(map: anx6345->map[I2C_IDX_TXCOM], |
128 | SP_VID_CTRL1_REG, SP_VIDEO_EN); |
129 | if (err) |
130 | return err; |
131 | |
132 | /* Get DPCD info */ |
133 | err = drm_dp_dpcd_read(aux: &anx6345->aux, DP_DPCD_REV, |
134 | buffer: &anx6345->dpcd, DP_RECEIVER_CAP_SIZE); |
135 | if (err < 0) { |
136 | DRM_ERROR("Failed to read DPCD: %d\n" , err); |
137 | return err; |
138 | } |
139 | |
140 | /* Clear channel x SERDES power down */ |
141 | err = anx6345_clear_bits(map: anx6345->map[I2C_IDX_DPTX], |
142 | SP_DP_ANALOG_POWER_DOWN_REG, SP_CH0_PD); |
143 | if (err) |
144 | return err; |
145 | |
146 | /* |
147 | * Power up the sink (DP_SET_POWER register is only available on DPCD |
148 | * v1.1 and later). |
149 | */ |
150 | if (anx6345->dpcd[DP_DPCD_REV] >= 0x11) { |
151 | err = drm_dp_dpcd_readb(aux: &anx6345->aux, DP_SET_POWER, valuep: &dpcd[0]); |
152 | if (err < 0) { |
153 | DRM_ERROR("Failed to read DP_SET_POWER register: %d\n" , |
154 | err); |
155 | return err; |
156 | } |
157 | |
158 | dpcd[0] &= ~DP_SET_POWER_MASK; |
159 | dpcd[0] |= DP_SET_POWER_D0; |
160 | |
161 | err = drm_dp_dpcd_writeb(aux: &anx6345->aux, DP_SET_POWER, value: dpcd[0]); |
162 | if (err < 0) { |
163 | DRM_ERROR("Failed to power up DisplayPort link: %d\n" , |
164 | err); |
165 | return err; |
166 | } |
167 | |
168 | /* |
169 | * According to the DP 1.1 specification, a "Sink Device must |
170 | * exit the power saving state within 1 ms" (Section 2.5.3.1, |
171 | * Table 5-52, "Sink Control Field" (register 0x600). |
172 | */ |
173 | usleep_range(min: 1000, max: 2000); |
174 | } |
175 | |
176 | /* Possibly enable downspread on the sink */ |
177 | err = regmap_write(map: anx6345->map[I2C_IDX_DPTX], |
178 | SP_DP_DOWNSPREAD_CTRL1_REG, val: 0); |
179 | if (err) |
180 | return err; |
181 | |
182 | if (anx6345->dpcd[DP_MAX_DOWNSPREAD] & DP_MAX_DOWNSPREAD_0_5) { |
183 | DRM_DEBUG("Enable downspread on the sink\n" ); |
184 | /* 4000PPM */ |
185 | err = regmap_write(map: anx6345->map[I2C_IDX_DPTX], |
186 | SP_DP_DOWNSPREAD_CTRL1_REG, val: 8); |
187 | if (err) |
188 | return err; |
189 | |
190 | err = drm_dp_dpcd_writeb(aux: &anx6345->aux, DP_DOWNSPREAD_CTRL, |
191 | DP_SPREAD_AMP_0_5); |
192 | if (err < 0) |
193 | return err; |
194 | } else { |
195 | err = drm_dp_dpcd_writeb(aux: &anx6345->aux, DP_DOWNSPREAD_CTRL, value: 0); |
196 | if (err < 0) |
197 | return err; |
198 | } |
199 | |
200 | /* Set the lane count and the link rate on the sink */ |
201 | if (drm_dp_enhanced_frame_cap(dpcd: anx6345->dpcd)) |
202 | err = anx6345_set_bits(map: anx6345->map[I2C_IDX_DPTX], |
203 | SP_DP_SYSTEM_CTRL_BASE + 4, |
204 | SP_ENHANCED_MODE); |
205 | else |
206 | err = anx6345_clear_bits(map: anx6345->map[I2C_IDX_DPTX], |
207 | SP_DP_SYSTEM_CTRL_BASE + 4, |
208 | SP_ENHANCED_MODE); |
209 | if (err) |
210 | return err; |
211 | |
212 | dpcd[0] = dp_bw; |
213 | err = regmap_write(map: anx6345->map[I2C_IDX_DPTX], |
214 | SP_DP_MAIN_LINK_BW_SET_REG, val: dpcd[0]); |
215 | if (err) |
216 | return err; |
217 | |
218 | dpcd[1] = drm_dp_max_lane_count(dpcd: anx6345->dpcd); |
219 | |
220 | err = regmap_write(map: anx6345->map[I2C_IDX_DPTX], |
221 | SP_DP_LANE_COUNT_SET_REG, val: dpcd[1]); |
222 | if (err) |
223 | return err; |
224 | |
225 | if (drm_dp_enhanced_frame_cap(dpcd: anx6345->dpcd)) |
226 | dpcd[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN; |
227 | |
228 | err = drm_dp_dpcd_write(aux: &anx6345->aux, DP_LINK_BW_SET, buffer: dpcd, |
229 | size: sizeof(dpcd)); |
230 | |
231 | if (err < 0) { |
232 | DRM_ERROR("Failed to configure link: %d\n" , err); |
233 | return err; |
234 | } |
235 | |
236 | /* Start training on the source */ |
237 | err = regmap_write(map: anx6345->map[I2C_IDX_DPTX], SP_DP_LT_CTRL_REG, |
238 | SP_LT_EN); |
239 | if (err) |
240 | return err; |
241 | |
242 | return regmap_read_poll_timeout(anx6345->map[I2C_IDX_DPTX], |
243 | SP_DP_LT_CTRL_REG, |
244 | value, !(value & SP_DP_LT_INPROGRESS), |
245 | POLL_DELAY, POLL_TIMEOUT); |
246 | } |
247 | |
248 | static int anx6345_tx_initialization(struct anx6345 *anx6345) |
249 | { |
250 | int err, i; |
251 | |
252 | /* FIXME: colordepth is hardcoded for now */ |
253 | err = regmap_write(map: anx6345->map[I2C_IDX_TXCOM], SP_VID_CTRL2_REG, |
254 | SP_IN_BPC_6BIT << SP_IN_BPC_SHIFT); |
255 | if (err) |
256 | return err; |
257 | |
258 | err = regmap_write(map: anx6345->map[I2C_IDX_DPTX], SP_DP_PLL_CTRL_REG, val: 0); |
259 | if (err) |
260 | return err; |
261 | |
262 | err = regmap_write(map: anx6345->map[I2C_IDX_TXCOM], |
263 | SP_ANALOG_DEBUG1_REG, val: 0); |
264 | if (err) |
265 | return err; |
266 | |
267 | err = regmap_write(map: anx6345->map[I2C_IDX_DPTX], |
268 | SP_DP_LINK_DEBUG_CTRL_REG, |
269 | SP_NEW_PRBS7 | SP_M_VID_DEBUG); |
270 | if (err) |
271 | return err; |
272 | |
273 | err = regmap_write(map: anx6345->map[I2C_IDX_DPTX], |
274 | SP_DP_ANALOG_POWER_DOWN_REG, val: 0); |
275 | if (err) |
276 | return err; |
277 | |
278 | /* Force HPD */ |
279 | err = anx6345_set_bits(map: anx6345->map[I2C_IDX_DPTX], |
280 | SP_DP_SYSTEM_CTRL_BASE + 3, |
281 | SP_HPD_FORCE | SP_HPD_CTRL); |
282 | if (err) |
283 | return err; |
284 | |
285 | for (i = 0; i < 4; i++) { |
286 | /* 4 lanes */ |
287 | err = regmap_write(map: anx6345->map[I2C_IDX_DPTX], |
288 | SP_DP_LANE0_LT_CTRL_REG + i, val: 0); |
289 | if (err) |
290 | return err; |
291 | } |
292 | |
293 | /* Reset AUX */ |
294 | err = anx6345_set_bits(map: anx6345->map[I2C_IDX_TXCOM], |
295 | SP_RESET_CTRL2_REG, SP_AUX_RST); |
296 | if (err) |
297 | return err; |
298 | |
299 | return anx6345_clear_bits(map: anx6345->map[I2C_IDX_TXCOM], |
300 | SP_RESET_CTRL2_REG, SP_AUX_RST); |
301 | } |
302 | |
303 | static void anx6345_poweron(struct anx6345 *anx6345) |
304 | { |
305 | int err; |
306 | |
307 | /* Ensure reset is asserted before starting power on sequence */ |
308 | gpiod_set_value_cansleep(desc: anx6345->gpiod_reset, value: 1); |
309 | usleep_range(min: 1000, max: 2000); |
310 | |
311 | err = regulator_enable(regulator: anx6345->dvdd12); |
312 | if (err) { |
313 | DRM_ERROR("Failed to enable dvdd12 regulator: %d\n" , |
314 | err); |
315 | return; |
316 | } |
317 | |
318 | /* T1 - delay between VDD12 and VDD25 should be 0-2ms */ |
319 | usleep_range(min: 1000, max: 2000); |
320 | |
321 | err = regulator_enable(regulator: anx6345->dvdd25); |
322 | if (err) { |
323 | DRM_ERROR("Failed to enable dvdd25 regulator: %d\n" , |
324 | err); |
325 | return; |
326 | } |
327 | |
328 | /* T2 - delay between RESETN and all power rail stable, |
329 | * should be 2-5ms |
330 | */ |
331 | usleep_range(min: 2000, max: 5000); |
332 | |
333 | gpiod_set_value_cansleep(desc: anx6345->gpiod_reset, value: 0); |
334 | |
335 | /* Power on registers module */ |
336 | anx6345_set_bits(map: anx6345->map[I2C_IDX_TXCOM], SP_POWERDOWN_CTRL_REG, |
337 | SP_HDCP_PD | SP_AUDIO_PD | SP_VIDEO_PD | SP_LINK_PD); |
338 | anx6345_clear_bits(map: anx6345->map[I2C_IDX_TXCOM], SP_POWERDOWN_CTRL_REG, |
339 | SP_REGISTER_PD | SP_TOTAL_PD); |
340 | |
341 | if (anx6345->panel) |
342 | drm_panel_prepare(panel: anx6345->panel); |
343 | |
344 | anx6345->powered = true; |
345 | } |
346 | |
347 | static void anx6345_poweroff(struct anx6345 *anx6345) |
348 | { |
349 | int err; |
350 | |
351 | gpiod_set_value_cansleep(desc: anx6345->gpiod_reset, value: 1); |
352 | usleep_range(min: 1000, max: 2000); |
353 | |
354 | if (anx6345->panel) |
355 | drm_panel_unprepare(panel: anx6345->panel); |
356 | |
357 | err = regulator_disable(regulator: anx6345->dvdd25); |
358 | if (err) { |
359 | DRM_ERROR("Failed to disable dvdd25 regulator: %d\n" , |
360 | err); |
361 | return; |
362 | } |
363 | |
364 | usleep_range(min: 5000, max: 10000); |
365 | |
366 | err = regulator_disable(regulator: anx6345->dvdd12); |
367 | if (err) { |
368 | DRM_ERROR("Failed to disable dvdd12 regulator: %d\n" , |
369 | err); |
370 | return; |
371 | } |
372 | |
373 | usleep_range(min: 1000, max: 2000); |
374 | |
375 | anx6345->powered = false; |
376 | } |
377 | |
378 | static int anx6345_start(struct anx6345 *anx6345) |
379 | { |
380 | int err; |
381 | |
382 | if (!anx6345->powered) |
383 | anx6345_poweron(anx6345); |
384 | |
385 | /* Power on needed modules */ |
386 | err = anx6345_clear_bits(map: anx6345->map[I2C_IDX_TXCOM], |
387 | SP_POWERDOWN_CTRL_REG, |
388 | SP_VIDEO_PD | SP_LINK_PD); |
389 | |
390 | err = anx6345_tx_initialization(anx6345); |
391 | if (err) { |
392 | DRM_ERROR("Failed eDP transmitter initialization: %d\n" , err); |
393 | anx6345_poweroff(anx6345); |
394 | return err; |
395 | } |
396 | |
397 | err = anx6345_dp_link_training(anx6345); |
398 | if (err) { |
399 | DRM_ERROR("Failed link training: %d\n" , err); |
400 | anx6345_poweroff(anx6345); |
401 | return err; |
402 | } |
403 | |
404 | /* |
405 | * This delay seems to help keep the hardware in a good state. Without |
406 | * it, there are times where it fails silently. |
407 | */ |
408 | usleep_range(min: 10000, max: 15000); |
409 | |
410 | return 0; |
411 | } |
412 | |
413 | static int anx6345_config_dp_output(struct anx6345 *anx6345) |
414 | { |
415 | int err; |
416 | |
417 | err = anx6345_clear_bits(map: anx6345->map[I2C_IDX_TXCOM], SP_VID_CTRL1_REG, |
418 | SP_VIDEO_MUTE); |
419 | if (err) |
420 | return err; |
421 | |
422 | /* Enable DP output */ |
423 | err = anx6345_set_bits(map: anx6345->map[I2C_IDX_TXCOM], SP_VID_CTRL1_REG, |
424 | SP_VIDEO_EN); |
425 | if (err) |
426 | return err; |
427 | |
428 | /* Force stream valid */ |
429 | return anx6345_set_bits(map: anx6345->map[I2C_IDX_DPTX], |
430 | SP_DP_SYSTEM_CTRL_BASE + 3, |
431 | SP_STRM_FORCE | SP_STRM_CTRL); |
432 | } |
433 | |
434 | static int anx6345_get_downstream_info(struct anx6345 *anx6345) |
435 | { |
436 | u8 value; |
437 | int err; |
438 | |
439 | err = drm_dp_dpcd_readb(aux: &anx6345->aux, DP_SINK_COUNT, valuep: &value); |
440 | if (err < 0) { |
441 | DRM_ERROR("Get sink count failed %d\n" , err); |
442 | return err; |
443 | } |
444 | |
445 | if (!DP_GET_SINK_COUNT(value)) { |
446 | DRM_ERROR("Downstream disconnected\n" ); |
447 | return -EIO; |
448 | } |
449 | |
450 | return 0; |
451 | } |
452 | |
453 | static int anx6345_get_modes(struct drm_connector *connector) |
454 | { |
455 | struct anx6345 *anx6345 = connector_to_anx6345(c: connector); |
456 | int err, num_modes = 0; |
457 | bool power_off = false; |
458 | |
459 | mutex_lock(&anx6345->lock); |
460 | |
461 | if (!anx6345->edid) { |
462 | if (!anx6345->powered) { |
463 | anx6345_poweron(anx6345); |
464 | power_off = true; |
465 | } |
466 | |
467 | err = anx6345_get_downstream_info(anx6345); |
468 | if (err) { |
469 | DRM_ERROR("Failed to get downstream info: %d\n" , err); |
470 | goto unlock; |
471 | } |
472 | |
473 | anx6345->edid = drm_get_edid(connector, adapter: &anx6345->aux.ddc); |
474 | if (!anx6345->edid) |
475 | DRM_ERROR("Failed to read EDID from panel\n" ); |
476 | |
477 | err = drm_connector_update_edid_property(connector, |
478 | edid: anx6345->edid); |
479 | if (err) { |
480 | DRM_ERROR("Failed to update EDID property: %d\n" , err); |
481 | goto unlock; |
482 | } |
483 | } |
484 | |
485 | num_modes += drm_add_edid_modes(connector, edid: anx6345->edid); |
486 | |
487 | /* Driver currently supports only 6bpc */ |
488 | connector->display_info.bpc = 6; |
489 | |
490 | unlock: |
491 | if (power_off) |
492 | anx6345_poweroff(anx6345); |
493 | |
494 | mutex_unlock(lock: &anx6345->lock); |
495 | |
496 | if (!num_modes && anx6345->panel) |
497 | num_modes += drm_panel_get_modes(panel: anx6345->panel, connector); |
498 | |
499 | return num_modes; |
500 | } |
501 | |
502 | static const struct drm_connector_helper_funcs anx6345_connector_helper_funcs = { |
503 | .get_modes = anx6345_get_modes, |
504 | }; |
505 | |
506 | static void |
507 | anx6345_connector_destroy(struct drm_connector *connector) |
508 | { |
509 | drm_connector_cleanup(connector); |
510 | } |
511 | |
512 | static const struct drm_connector_funcs anx6345_connector_funcs = { |
513 | .fill_modes = drm_helper_probe_single_connector_modes, |
514 | .destroy = anx6345_connector_destroy, |
515 | .reset = drm_atomic_helper_connector_reset, |
516 | .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state, |
517 | .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, |
518 | }; |
519 | |
520 | static int anx6345_bridge_attach(struct drm_bridge *bridge, |
521 | enum drm_bridge_attach_flags flags) |
522 | { |
523 | struct anx6345 *anx6345 = bridge_to_anx6345(bridge); |
524 | int err; |
525 | |
526 | if (flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR) { |
527 | DRM_ERROR("Fix bridge driver to make connector optional!" ); |
528 | return -EINVAL; |
529 | } |
530 | |
531 | if (!bridge->encoder) { |
532 | DRM_ERROR("Parent encoder object not found" ); |
533 | return -ENODEV; |
534 | } |
535 | |
536 | /* Register aux channel */ |
537 | anx6345->aux.name = "DP-AUX" ; |
538 | anx6345->aux.dev = &anx6345->client->dev; |
539 | anx6345->aux.drm_dev = bridge->dev; |
540 | anx6345->aux.transfer = anx6345_aux_transfer; |
541 | |
542 | err = drm_dp_aux_register(aux: &anx6345->aux); |
543 | if (err < 0) { |
544 | DRM_ERROR("Failed to register aux channel: %d\n" , err); |
545 | return err; |
546 | } |
547 | |
548 | err = drm_connector_init(dev: bridge->dev, connector: &anx6345->connector, |
549 | funcs: &anx6345_connector_funcs, |
550 | DRM_MODE_CONNECTOR_eDP); |
551 | if (err) { |
552 | DRM_ERROR("Failed to initialize connector: %d\n" , err); |
553 | goto aux_unregister; |
554 | } |
555 | |
556 | drm_connector_helper_add(connector: &anx6345->connector, |
557 | funcs: &anx6345_connector_helper_funcs); |
558 | |
559 | anx6345->connector.polled = DRM_CONNECTOR_POLL_HPD; |
560 | |
561 | err = drm_connector_attach_encoder(connector: &anx6345->connector, |
562 | encoder: bridge->encoder); |
563 | if (err) { |
564 | DRM_ERROR("Failed to link up connector to encoder: %d\n" , err); |
565 | goto connector_cleanup; |
566 | } |
567 | |
568 | err = drm_connector_register(connector: &anx6345->connector); |
569 | if (err) { |
570 | DRM_ERROR("Failed to register connector: %d\n" , err); |
571 | goto connector_cleanup; |
572 | } |
573 | |
574 | return 0; |
575 | connector_cleanup: |
576 | drm_connector_cleanup(connector: &anx6345->connector); |
577 | aux_unregister: |
578 | drm_dp_aux_unregister(aux: &anx6345->aux); |
579 | return err; |
580 | } |
581 | |
582 | static void anx6345_bridge_detach(struct drm_bridge *bridge) |
583 | { |
584 | drm_dp_aux_unregister(aux: &bridge_to_anx6345(bridge)->aux); |
585 | } |
586 | |
587 | static enum drm_mode_status |
588 | anx6345_bridge_mode_valid(struct drm_bridge *bridge, |
589 | const struct drm_display_info *info, |
590 | const struct drm_display_mode *mode) |
591 | { |
592 | if (mode->flags & DRM_MODE_FLAG_INTERLACE) |
593 | return MODE_NO_INTERLACE; |
594 | |
595 | /* Max 1200p at 5.4 Ghz, one lane */ |
596 | if (mode->clock > 154000) |
597 | return MODE_CLOCK_HIGH; |
598 | |
599 | return MODE_OK; |
600 | } |
601 | |
602 | static void anx6345_bridge_disable(struct drm_bridge *bridge) |
603 | { |
604 | struct anx6345 *anx6345 = bridge_to_anx6345(bridge); |
605 | |
606 | /* Power off all modules except configuration registers access */ |
607 | anx6345_set_bits(map: anx6345->map[I2C_IDX_TXCOM], SP_POWERDOWN_CTRL_REG, |
608 | SP_HDCP_PD | SP_AUDIO_PD | SP_VIDEO_PD | SP_LINK_PD); |
609 | if (anx6345->panel) |
610 | drm_panel_disable(panel: anx6345->panel); |
611 | |
612 | if (anx6345->powered) |
613 | anx6345_poweroff(anx6345); |
614 | } |
615 | |
616 | static void anx6345_bridge_enable(struct drm_bridge *bridge) |
617 | { |
618 | struct anx6345 *anx6345 = bridge_to_anx6345(bridge); |
619 | int err; |
620 | |
621 | if (anx6345->panel) |
622 | drm_panel_enable(panel: anx6345->panel); |
623 | |
624 | err = anx6345_start(anx6345); |
625 | if (err) { |
626 | DRM_ERROR("Failed to initialize: %d\n" , err); |
627 | return; |
628 | } |
629 | |
630 | err = anx6345_config_dp_output(anx6345); |
631 | if (err) |
632 | DRM_ERROR("Failed to enable DP output: %d\n" , err); |
633 | } |
634 | |
635 | static const struct drm_bridge_funcs anx6345_bridge_funcs = { |
636 | .attach = anx6345_bridge_attach, |
637 | .detach = anx6345_bridge_detach, |
638 | .mode_valid = anx6345_bridge_mode_valid, |
639 | .disable = anx6345_bridge_disable, |
640 | .enable = anx6345_bridge_enable, |
641 | }; |
642 | |
643 | static void unregister_i2c_dummy_clients(struct anx6345 *anx6345) |
644 | { |
645 | unsigned int i; |
646 | |
647 | for (i = 1; i < ARRAY_SIZE(anx6345->i2c_clients); i++) |
648 | if (anx6345->i2c_clients[i] && |
649 | anx6345->i2c_clients[i]->addr != anx6345->client->addr) |
650 | i2c_unregister_device(client: anx6345->i2c_clients[i]); |
651 | } |
652 | |
653 | static const struct regmap_config anx6345_regmap_config = { |
654 | .reg_bits = 8, |
655 | .val_bits = 8, |
656 | .max_register = 0xff, |
657 | .cache_type = REGCACHE_NONE, |
658 | }; |
659 | |
660 | static const u16 anx6345_chipid_list[] = { |
661 | 0x6345, |
662 | }; |
663 | |
664 | static bool anx6345_get_chip_id(struct anx6345 *anx6345) |
665 | { |
666 | unsigned int i, idl, idh, version; |
667 | |
668 | if (regmap_read(map: anx6345->map[I2C_IDX_TXCOM], SP_DEVICE_IDL_REG, val: &idl)) |
669 | return false; |
670 | |
671 | if (regmap_read(map: anx6345->map[I2C_IDX_TXCOM], SP_DEVICE_IDH_REG, val: &idh)) |
672 | return false; |
673 | |
674 | anx6345->chipid = (u8)idl | ((u8)idh << 8); |
675 | |
676 | if (regmap_read(map: anx6345->map[I2C_IDX_TXCOM], SP_DEVICE_VERSION_REG, |
677 | val: &version)) |
678 | return false; |
679 | |
680 | for (i = 0; i < ARRAY_SIZE(anx6345_chipid_list); i++) { |
681 | if (anx6345->chipid == anx6345_chipid_list[i]) { |
682 | DRM_INFO("Found ANX%x (ver. %d) eDP Transmitter\n" , |
683 | anx6345->chipid, version); |
684 | return true; |
685 | } |
686 | } |
687 | |
688 | DRM_ERROR("ANX%x (ver. %d) not supported by this driver\n" , |
689 | anx6345->chipid, version); |
690 | |
691 | return false; |
692 | } |
693 | |
694 | static int anx6345_i2c_probe(struct i2c_client *client) |
695 | { |
696 | struct anx6345 *anx6345; |
697 | struct device *dev; |
698 | int i, err; |
699 | |
700 | anx6345 = devm_kzalloc(dev: &client->dev, size: sizeof(*anx6345), GFP_KERNEL); |
701 | if (!anx6345) |
702 | return -ENOMEM; |
703 | |
704 | mutex_init(&anx6345->lock); |
705 | |
706 | anx6345->bridge.of_node = client->dev.of_node; |
707 | |
708 | anx6345->client = client; |
709 | i2c_set_clientdata(client, data: anx6345); |
710 | |
711 | dev = &anx6345->client->dev; |
712 | |
713 | err = drm_of_find_panel_or_bridge(np: client->dev.of_node, port: 1, endpoint: 0, |
714 | panel: &anx6345->panel, NULL); |
715 | if (err == -EPROBE_DEFER) |
716 | return err; |
717 | |
718 | if (err) |
719 | DRM_DEBUG("No panel found\n" ); |
720 | |
721 | /* 1.2V digital core power regulator */ |
722 | anx6345->dvdd12 = devm_regulator_get(dev, id: "dvdd12" ); |
723 | if (IS_ERR(ptr: anx6345->dvdd12)) { |
724 | if (PTR_ERR(ptr: anx6345->dvdd12) != -EPROBE_DEFER) |
725 | DRM_ERROR("Failed to get dvdd12 supply (%ld)\n" , |
726 | PTR_ERR(anx6345->dvdd12)); |
727 | return PTR_ERR(ptr: anx6345->dvdd12); |
728 | } |
729 | |
730 | /* 2.5V digital core power regulator */ |
731 | anx6345->dvdd25 = devm_regulator_get(dev, id: "dvdd25" ); |
732 | if (IS_ERR(ptr: anx6345->dvdd25)) { |
733 | if (PTR_ERR(ptr: anx6345->dvdd25) != -EPROBE_DEFER) |
734 | DRM_ERROR("Failed to get dvdd25 supply (%ld)\n" , |
735 | PTR_ERR(anx6345->dvdd25)); |
736 | return PTR_ERR(ptr: anx6345->dvdd25); |
737 | } |
738 | |
739 | /* GPIO for chip reset */ |
740 | anx6345->gpiod_reset = devm_gpiod_get(dev, con_id: "reset" , flags: GPIOD_OUT_LOW); |
741 | if (IS_ERR(ptr: anx6345->gpiod_reset)) { |
742 | DRM_ERROR("Reset gpio not found\n" ); |
743 | return PTR_ERR(ptr: anx6345->gpiod_reset); |
744 | } |
745 | |
746 | /* Map slave addresses of ANX6345 */ |
747 | for (i = 0; i < I2C_NUM_ADDRESSES; i++) { |
748 | if (anx6345_i2c_addresses[i] >> 1 != client->addr) |
749 | anx6345->i2c_clients[i] = i2c_new_dummy_device(adapter: client->adapter, |
750 | address: anx6345_i2c_addresses[i] >> 1); |
751 | else |
752 | anx6345->i2c_clients[i] = client; |
753 | |
754 | if (IS_ERR(ptr: anx6345->i2c_clients[i])) { |
755 | err = PTR_ERR(ptr: anx6345->i2c_clients[i]); |
756 | DRM_ERROR("Failed to reserve I2C bus %02x\n" , |
757 | anx6345_i2c_addresses[i]); |
758 | goto err_unregister_i2c; |
759 | } |
760 | |
761 | anx6345->map[i] = devm_regmap_init_i2c(anx6345->i2c_clients[i], |
762 | &anx6345_regmap_config); |
763 | if (IS_ERR(ptr: anx6345->map[i])) { |
764 | err = PTR_ERR(ptr: anx6345->map[i]); |
765 | DRM_ERROR("Failed regmap initialization %02x\n" , |
766 | anx6345_i2c_addresses[i]); |
767 | goto err_unregister_i2c; |
768 | } |
769 | } |
770 | |
771 | /* Look for supported chip ID */ |
772 | anx6345_poweron(anx6345); |
773 | if (anx6345_get_chip_id(anx6345)) { |
774 | anx6345->bridge.funcs = &anx6345_bridge_funcs; |
775 | drm_bridge_add(bridge: &anx6345->bridge); |
776 | |
777 | return 0; |
778 | } else { |
779 | anx6345_poweroff(anx6345); |
780 | err = -ENODEV; |
781 | } |
782 | |
783 | err_unregister_i2c: |
784 | unregister_i2c_dummy_clients(anx6345); |
785 | return err; |
786 | } |
787 | |
788 | static void anx6345_i2c_remove(struct i2c_client *client) |
789 | { |
790 | struct anx6345 *anx6345 = i2c_get_clientdata(client); |
791 | |
792 | drm_bridge_remove(bridge: &anx6345->bridge); |
793 | |
794 | unregister_i2c_dummy_clients(anx6345); |
795 | |
796 | kfree(objp: anx6345->edid); |
797 | |
798 | mutex_destroy(lock: &anx6345->lock); |
799 | } |
800 | |
801 | static const struct i2c_device_id anx6345_id[] = { |
802 | { "anx6345" , 0 }, |
803 | { /* sentinel */ } |
804 | }; |
805 | MODULE_DEVICE_TABLE(i2c, anx6345_id); |
806 | |
807 | static const struct of_device_id anx6345_match_table[] = { |
808 | { .compatible = "analogix,anx6345" , }, |
809 | { /* sentinel */ }, |
810 | }; |
811 | MODULE_DEVICE_TABLE(of, anx6345_match_table); |
812 | |
813 | static struct i2c_driver anx6345_driver = { |
814 | .driver = { |
815 | .name = "anx6345" , |
816 | .of_match_table = anx6345_match_table, |
817 | }, |
818 | .probe = anx6345_i2c_probe, |
819 | .remove = anx6345_i2c_remove, |
820 | .id_table = anx6345_id, |
821 | }; |
822 | module_i2c_driver(anx6345_driver); |
823 | |
824 | MODULE_DESCRIPTION("ANX6345 eDP Transmitter driver" ); |
825 | MODULE_AUTHOR("Icenowy Zheng <icenowy@aosc.io>" ); |
826 | MODULE_LICENSE("GPL v2" ); |
827 | |