1/* SPDX-License-Identifier: GPL-2.0-only */
2/* linux/drivers/gpu/drm/exynos/regs-gsc.h
3 *
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * Register definition file for Samsung G-Scaler driver
8 */
9
10#ifndef EXYNOS_REGS_GSC_H_
11#define EXYNOS_REGS_GSC_H_
12
13/* G-Scaler enable */
14#define GSC_ENABLE 0x00
15#define GSC_ENABLE_PP_UPDATE_TIME_MASK (1 << 9)
16#define GSC_ENABLE_PP_UPDATE_TIME_CURR (0 << 9)
17#define GSC_ENABLE_PP_UPDATE_TIME_EOPAS (1 << 9)
18#define GSC_ENABLE_CLK_GATE_MODE_MASK (1 << 8)
19#define GSC_ENABLE_CLK_GATE_MODE_FREE (1 << 8)
20#define GSC_ENABLE_IPC_MODE_MASK (1 << 7)
21#define GSC_ENABLE_NORM_MODE (0 << 7)
22#define GSC_ENABLE_IPC_MODE (1 << 7)
23#define GSC_ENABLE_PP_UPDATE_MODE_MASK (1 << 6)
24#define GSC_ENABLE_PP_UPDATE_FIRE_MODE (1 << 6)
25#define GSC_ENABLE_IN_PP_UPDATE (1 << 5)
26#define GSC_ENABLE_ON_CLEAR_MASK (1 << 4)
27#define GSC_ENABLE_ON_CLEAR_ONESHOT (1 << 4)
28#define GSC_ENABLE_QOS_ENABLE (1 << 3)
29#define GSC_ENABLE_OP_STATUS (1 << 2)
30#define GSC_ENABLE_SFR_UPDATE (1 << 1)
31#define GSC_ENABLE_ON (1 << 0)
32
33/* G-Scaler S/W reset */
34#define GSC_SW_RESET 0x04
35#define GSC_SW_RESET_SRESET (1 << 0)
36
37/* G-Scaler IRQ */
38#define GSC_IRQ 0x08
39#define GSC_IRQ_STATUS_OR_IRQ (1 << 17)
40#define GSC_IRQ_STATUS_OR_FRM_DONE (1 << 16)
41#define GSC_IRQ_OR_MASK (1 << 2)
42#define GSC_IRQ_FRMDONE_MASK (1 << 1)
43#define GSC_IRQ_ENABLE (1 << 0)
44
45/* G-Scaler input control */
46#define GSC_IN_CON 0x10
47#define GSC_IN_CHROM_STRIDE_SEL_MASK (1 << 20)
48#define GSC_IN_CHROM_STRIDE_SEPAR (1 << 20)
49#define GSC_IN_RB_SWAP_MASK (1 << 19)
50#define GSC_IN_RB_SWAP (1 << 19)
51#define GSC_IN_ROT_MASK (7 << 16)
52#define GSC_IN_ROT_270 (7 << 16)
53#define GSC_IN_ROT_90_YFLIP (6 << 16)
54#define GSC_IN_ROT_90_XFLIP (5 << 16)
55#define GSC_IN_ROT_90 (4 << 16)
56#define GSC_IN_ROT_180 (3 << 16)
57#define GSC_IN_ROT_YFLIP (2 << 16)
58#define GSC_IN_ROT_XFLIP (1 << 16)
59#define GSC_IN_RGB_TYPE_MASK (3 << 14)
60#define GSC_IN_RGB_HD_WIDE (3 << 14)
61#define GSC_IN_RGB_HD_NARROW (2 << 14)
62#define GSC_IN_RGB_SD_WIDE (1 << 14)
63#define GSC_IN_RGB_SD_NARROW (0 << 14)
64#define GSC_IN_YUV422_1P_ORDER_MASK (1 << 13)
65#define GSC_IN_YUV422_1P_ORDER_LSB_Y (0 << 13)
66#define GSC_IN_YUV422_1P_OEDER_LSB_C (1 << 13)
67#define GSC_IN_CHROMA_ORDER_MASK (1 << 12)
68#define GSC_IN_CHROMA_ORDER_CBCR (0 << 12)
69#define GSC_IN_CHROMA_ORDER_CRCB (1 << 12)
70#define GSC_IN_FORMAT_MASK (7 << 8)
71#define GSC_IN_XRGB8888 (0 << 8)
72#define GSC_IN_RGB565 (1 << 8)
73#define GSC_IN_YUV420_2P (2 << 8)
74#define GSC_IN_YUV420_3P (3 << 8)
75#define GSC_IN_YUV422_1P (4 << 8)
76#define GSC_IN_YUV422_2P (5 << 8)
77#define GSC_IN_YUV422_3P (6 << 8)
78#define GSC_IN_TILE_TYPE_MASK (1 << 4)
79#define GSC_IN_TILE_C_16x8 (0 << 4)
80#define GSC_IN_TILE_C_16x16 (1 << 4)
81#define GSC_IN_TILE_MODE (1 << 3)
82#define GSC_IN_LOCAL_SEL_MASK (3 << 1)
83#define GSC_IN_LOCAL_CAM3 (3 << 1)
84#define GSC_IN_LOCAL_FIMD_WB (2 << 1)
85#define GSC_IN_LOCAL_CAM1 (1 << 1)
86#define GSC_IN_LOCAL_CAM0 (0 << 1)
87#define GSC_IN_PATH_MASK (1 << 0)
88#define GSC_IN_PATH_LOCAL (1 << 0)
89#define GSC_IN_PATH_MEMORY (0 << 0)
90
91/* G-Scaler source image size */
92#define GSC_SRCIMG_SIZE 0x14
93#define GSC_SRCIMG_HEIGHT_MASK (0x1fff << 16)
94#define GSC_SRCIMG_HEIGHT(x) ((x) << 16)
95#define GSC_SRCIMG_WIDTH_MASK (0x3fff << 0)
96#define GSC_SRCIMG_WIDTH(x) ((x) << 0)
97
98/* G-Scaler source image offset */
99#define GSC_SRCIMG_OFFSET 0x18
100#define GSC_SRCIMG_OFFSET_Y_MASK (0x1fff << 16)
101#define GSC_SRCIMG_OFFSET_Y(x) ((x) << 16)
102#define GSC_SRCIMG_OFFSET_X_MASK (0x1fff << 0)
103#define GSC_SRCIMG_OFFSET_X(x) ((x) << 0)
104
105/* G-Scaler cropped source image size */
106#define GSC_CROPPED_SIZE 0x1C
107#define GSC_CROPPED_HEIGHT_MASK (0x1fff << 16)
108#define GSC_CROPPED_HEIGHT(x) ((x) << 16)
109#define GSC_CROPPED_WIDTH_MASK (0x1fff << 0)
110#define GSC_CROPPED_WIDTH(x) ((x) << 0)
111
112/* G-Scaler output control */
113#define GSC_OUT_CON 0x20
114#define GSC_OUT_GLOBAL_ALPHA_MASK (0xff << 24)
115#define GSC_OUT_GLOBAL_ALPHA(x) ((x) << 24)
116#define GSC_OUT_CHROM_STRIDE_SEL_MASK (1 << 13)
117#define GSC_OUT_CHROM_STRIDE_SEPAR (1 << 13)
118#define GSC_OUT_RB_SWAP_MASK (1 << 12)
119#define GSC_OUT_RB_SWAP (1 << 12)
120#define GSC_OUT_RGB_TYPE_MASK (3 << 10)
121#define GSC_OUT_RGB_HD_NARROW (3 << 10)
122#define GSC_OUT_RGB_HD_WIDE (2 << 10)
123#define GSC_OUT_RGB_SD_NARROW (1 << 10)
124#define GSC_OUT_RGB_SD_WIDE (0 << 10)
125#define GSC_OUT_YUV422_1P_ORDER_MASK (1 << 9)
126#define GSC_OUT_YUV422_1P_ORDER_LSB_Y (0 << 9)
127#define GSC_OUT_YUV422_1P_OEDER_LSB_C (1 << 9)
128#define GSC_OUT_CHROMA_ORDER_MASK (1 << 8)
129#define GSC_OUT_CHROMA_ORDER_CBCR (0 << 8)
130#define GSC_OUT_CHROMA_ORDER_CRCB (1 << 8)
131#define GSC_OUT_FORMAT_MASK (7 << 4)
132#define GSC_OUT_XRGB8888 (0 << 4)
133#define GSC_OUT_RGB565 (1 << 4)
134#define GSC_OUT_YUV420_2P (2 << 4)
135#define GSC_OUT_YUV420_3P (3 << 4)
136#define GSC_OUT_YUV422_1P (4 << 4)
137#define GSC_OUT_YUV422_2P (5 << 4)
138#define GSC_OUT_YUV422_3P (6 << 4)
139#define GSC_OUT_YUV444 (7 << 4)
140#define GSC_OUT_TILE_TYPE_MASK (1 << 2)
141#define GSC_OUT_TILE_C_16x8 (0 << 2)
142#define GSC_OUT_TILE_C_16x16 (1 << 2)
143#define GSC_OUT_TILE_MODE (1 << 1)
144#define GSC_OUT_PATH_MASK (1 << 0)
145#define GSC_OUT_PATH_LOCAL (1 << 0)
146#define GSC_OUT_PATH_MEMORY (0 << 0)
147
148/* G-Scaler scaled destination image size */
149#define GSC_SCALED_SIZE 0x24
150#define GSC_SCALED_HEIGHT_MASK (0x1fff << 16)
151#define GSC_SCALED_HEIGHT(x) ((x) << 16)
152#define GSC_SCALED_WIDTH_MASK (0x1fff << 0)
153#define GSC_SCALED_WIDTH(x) ((x) << 0)
154
155/* G-Scaler pre scale ratio */
156#define GSC_PRE_SCALE_RATIO 0x28
157#define GSC_PRESC_SHFACTOR_MASK (7 << 28)
158#define GSC_PRESC_SHFACTOR(x) ((x) << 28)
159#define GSC_PRESC_V_RATIO_MASK (7 << 16)
160#define GSC_PRESC_V_RATIO(x) ((x) << 16)
161#define GSC_PRESC_H_RATIO_MASK (7 << 0)
162#define GSC_PRESC_H_RATIO(x) ((x) << 0)
163
164/* G-Scaler main scale horizontal ratio */
165#define GSC_MAIN_H_RATIO 0x2C
166#define GSC_MAIN_H_RATIO_MASK (0xfffff << 0)
167#define GSC_MAIN_H_RATIO_VALUE(x) ((x) << 0)
168
169/* G-Scaler main scale vertical ratio */
170#define GSC_MAIN_V_RATIO 0x30
171#define GSC_MAIN_V_RATIO_MASK (0xfffff << 0)
172#define GSC_MAIN_V_RATIO_VALUE(x) ((x) << 0)
173
174/* G-Scaler input chrominance stride */
175#define GSC_IN_CHROM_STRIDE 0x3C
176#define GSC_IN_CHROM_STRIDE_MASK (0x3fff << 0)
177#define GSC_IN_CHROM_STRIDE_VALUE(x) ((x) << 0)
178
179/* G-Scaler destination image size */
180#define GSC_DSTIMG_SIZE 0x40
181#define GSC_DSTIMG_HEIGHT_MASK (0x1fff << 16)
182#define GSC_DSTIMG_HEIGHT(x) ((x) << 16)
183#define GSC_DSTIMG_WIDTH_MASK (0x1fff << 0)
184#define GSC_DSTIMG_WIDTH(x) ((x) << 0)
185
186/* G-Scaler destination image offset */
187#define GSC_DSTIMG_OFFSET 0x44
188#define GSC_DSTIMG_OFFSET_Y_MASK (0x1fff << 16)
189#define GSC_DSTIMG_OFFSET_Y(x) ((x) << 16)
190#define GSC_DSTIMG_OFFSET_X_MASK (0x1fff << 0)
191#define GSC_DSTIMG_OFFSET_X(x) ((x) << 0)
192
193/* G-Scaler output chrominance stride */
194#define GSC_OUT_CHROM_STRIDE 0x48
195#define GSC_OUT_CHROM_STRIDE_MASK (0x3fff << 0)
196#define GSC_OUT_CHROM_STRIDE_VALUE(x) ((x) << 0)
197
198/* G-Scaler input y address mask */
199#define GSC_IN_BASE_ADDR_Y_MASK 0x4C
200/* G-Scaler input y base address */
201#define GSC_IN_BASE_ADDR_Y(n) (0x50 + (n) * 0x4)
202/* G-Scaler input y base current address */
203#define GSC_IN_BASE_ADDR_Y_CUR(n) (0x60 + (n) * 0x4)
204
205/* G-Scaler input cb address mask */
206#define GSC_IN_BASE_ADDR_CB_MASK 0x7C
207/* G-Scaler input cb base address */
208#define GSC_IN_BASE_ADDR_CB(n) (0x80 + (n) * 0x4)
209/* G-Scaler input cb base current address */
210#define GSC_IN_BASE_ADDR_CB_CUR(n) (0x90 + (n) * 0x4)
211
212/* G-Scaler input cr address mask */
213#define GSC_IN_BASE_ADDR_CR_MASK 0xAC
214/* G-Scaler input cr base address */
215#define GSC_IN_BASE_ADDR_CR(n) (0xB0 + (n) * 0x4)
216/* G-Scaler input cr base current address */
217#define GSC_IN_BASE_ADDR_CR_CUR(n) (0xC0 + (n) * 0x4)
218
219/* G-Scaler input address mask */
220#define GSC_IN_CURR_ADDR_INDEX (0xf << 24)
221#define GSC_IN_CURR_GET_INDEX(x) ((x) >> 24)
222#define GSC_IN_BASE_ADDR_PINGPONG(x) ((x) << 16)
223#define GSC_IN_BASE_ADDR_MASK (0xff << 0)
224
225/* G-Scaler output y address mask */
226#define GSC_OUT_BASE_ADDR_Y_MASK 0x10C
227/* G-Scaler output y base address */
228#define GSC_OUT_BASE_ADDR_Y(n) (0x110 + (n) * 0x4)
229
230/* G-Scaler output cb address mask */
231#define GSC_OUT_BASE_ADDR_CB_MASK 0x15C
232/* G-Scaler output cb base address */
233#define GSC_OUT_BASE_ADDR_CB(n) (0x160 + (n) * 0x4)
234
235/* G-Scaler output cr address mask */
236#define GSC_OUT_BASE_ADDR_CR_MASK 0x1AC
237/* G-Scaler output cr base address */
238#define GSC_OUT_BASE_ADDR_CR(n) (0x1B0 + (n) * 0x4)
239
240/* G-Scaler output address mask */
241#define GSC_OUT_CURR_ADDR_INDEX (0xf << 24)
242#define GSC_OUT_CURR_GET_INDEX(x) ((x) >> 24)
243#define GSC_OUT_BASE_ADDR_PINGPONG(x) ((x) << 16)
244#define GSC_OUT_BASE_ADDR_MASK (0xffff << 0)
245
246/* G-Scaler horizontal scaling filter */
247#define GSC_HCOEF(n, s, x) (0x300 + (n) * 0x4 + (s) * 0x30 + (x) * 0x300)
248
249/* G-Scaler vertical scaling filter */
250#define GSC_VCOEF(n, s, x) (0x200 + (n) * 0x4 + (s) * 0x30 + (x) * 0x300)
251
252/* G-Scaler BUS control */
253#define GSC_BUSCON 0xA78
254#define GSC_BUSCON_INT_TIME_MASK (1 << 8)
255#define GSC_BUSCON_INT_DATA_TRANS (0 << 8)
256#define GSC_BUSCON_INT_AXI_RESPONSE (1 << 8)
257#define GSC_BUSCON_AWCACHE(x) ((x) << 4)
258#define GSC_BUSCON_ARCACHE(x) ((x) << 0)
259
260/* G-Scaler V position */
261#define GSC_VPOSITION 0xA7C
262#define GSC_VPOS_F(x) ((x) << 0)
263
264
265/* G-Scaler clock initial count */
266#define GSC_CLK_INIT_COUNT 0xC00
267#define GSC_CLK_GATE_MODE_INIT_CNT(x) ((x) << 0)
268
269/* G-Scaler clock snoop count */
270#define GSC_CLK_SNOOP_COUNT 0xC04
271#define GSC_CLK_GATE_MODE_SNOOP_CNT(x) ((x) << 0)
272
273/* SYSCON. GSCBLK_CFG */
274#define SYSREG_GSCBLK_CFG1 0x0224
275#define GSC_BLK_DISP1WB_DEST(x) (x << 10)
276#define GSC_BLK_SW_RESET_WB_DEST(x) (1 << (18 + x))
277#define GSC_BLK_PXLASYNC_LO_MASK_WB(x) (0 << (14 + x))
278#define GSC_BLK_GSCL_WB_IN_SRC_SEL(x) (1 << (2 * x))
279#define SYSREG_GSCBLK_CFG2 0x2000
280#define PXLASYNC_LO_MASK_CAMIF_GSCL(x) (1 << (x))
281
282#endif /* EXYNOS_REGS_GSC_H_ */
283

source code of linux/drivers/gpu/drm/exynos/regs-gsc.h