| 1 | /* SPDX-License-Identifier: MIT */ |
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| 2 | /* |
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| 3 | * Copyright © 2022 Intel Corporation |
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| 4 | */ |
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| 5 | |
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| 6 | #ifndef __INTEL_DISPLAY_REG_DEFS_H__ |
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| 7 | #define __INTEL_DISPLAY_REG_DEFS_H__ |
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| 8 | |
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| 9 | #include "i915_reg_defs.h" |
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| 10 | |
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| 11 | #define DISPLAY_MMIO_BASE(dev_priv) (DISPLAY_INFO(dev_priv)->mmio_offset) |
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| 12 | |
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| 13 | #define VLV_DISPLAY_BASE 0x180000 |
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| 14 | |
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| 15 | /* |
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| 16 | * Named helper wrappers around _PICK_EVEN() and _PICK_EVEN_2RANGES(). |
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| 17 | */ |
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| 18 | #define _PIPE(pipe, a, b) _PICK_EVEN(pipe, a, b) |
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| 19 | #define _PLANE(plane, a, b) _PICK_EVEN(plane, a, b) |
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| 20 | #define _TRANS(tran, a, b) _PICK_EVEN(tran, a, b) |
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| 21 | #define _PORT(port, a, b) _PICK_EVEN(port, a, b) |
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| 22 | #define _PLL(pll, a, b) _PICK_EVEN(pll, a, b) |
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| 23 | #define _PHY(phy, a, b) _PICK_EVEN(phy, a, b) |
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| 24 | |
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| 25 | #define _MMIO_PIPE(pipe, a, b) _MMIO(_PIPE(pipe, a, b)) |
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| 26 | #define _MMIO_PLANE(plane, a, b) _MMIO(_PLANE(plane, a, b)) |
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| 27 | #define _MMIO_TRANS(tran, a, b) _MMIO(_TRANS(tran, a, b)) |
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| 28 | #define _MMIO_PORT(port, a, b) _MMIO(_PORT(port, a, b)) |
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| 29 | #define _MMIO_PLL(pll, a, b) _MMIO(_PLL(pll, a, b)) |
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| 30 | #define _MMIO_PHY(phy, a, b) _MMIO(_PHY(phy, a, b)) |
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| 31 | |
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| 32 | #define _MMIO_BASE_PIPE3(base, pipe, a, b, c) _MMIO((base) + _PICK_EVEN_2RANGES(pipe, 1, a, a, b, c)) |
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| 33 | #define _MMIO_BASE_PORT3(base, pipe, a, b, c) _MMIO((base) + _PICK_EVEN_2RANGES(pipe, 1, a, a, b, c)) |
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| 34 | |
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| 35 | /* |
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| 36 | * Device info offset array based helpers for groups of registers with unevenly |
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| 37 | * spaced base offsets. |
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| 38 | */ |
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| 39 | #define _MMIO_PIPE2(display, pipe, reg) _MMIO(DISPLAY_INFO(display)->pipe_offsets[(pipe)] - \ |
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| 40 | DISPLAY_INFO(display)->pipe_offsets[PIPE_A] + \ |
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| 41 | DISPLAY_MMIO_BASE(display) + (reg)) |
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| 42 | #define _MMIO_TRANS2(display, tran, reg) _MMIO(DISPLAY_INFO(display)->trans_offsets[(tran)] - \ |
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| 43 | DISPLAY_INFO(display)->trans_offsets[TRANSCODER_A] + \ |
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| 44 | DISPLAY_MMIO_BASE(display) + (reg)) |
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| 45 | #define _MMIO_CURSOR2(display, pipe, reg) _MMIO(DISPLAY_INFO(display)->cursor_offsets[(pipe)] - \ |
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| 46 | DISPLAY_INFO(display)->cursor_offsets[PIPE_A] + \ |
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| 47 | DISPLAY_MMIO_BASE(display) + (reg)) |
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| 48 | |
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| 49 | #endif /* __INTEL_DISPLAY_REG_DEFS_H__ */ |
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| 50 | |
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