| 1 | /* SPDX-License-Identifier: MIT */ |
| 2 | /* |
| 3 | * Copyright © 2019 Intel Corporation |
| 4 | */ |
| 5 | |
| 6 | #ifndef INTEL_RPS_H |
| 7 | #define INTEL_RPS_H |
| 8 | |
| 9 | #include "intel_rps_types.h" |
| 10 | #include "i915_reg_defs.h" |
| 11 | |
| 12 | struct i915_request; |
| 13 | struct drm_printer; |
| 14 | |
| 15 | #define GT_FREQUENCY_MULTIPLIER 50 |
| 16 | #define GEN9_FREQ_SCALER 3 |
| 17 | |
| 18 | void intel_rps_init_early(struct intel_rps *rps); |
| 19 | void intel_rps_init(struct intel_rps *rps); |
| 20 | void intel_rps_sanitize(struct intel_rps *rps); |
| 21 | |
| 22 | void intel_rps_driver_register(struct intel_rps *rps); |
| 23 | void intel_rps_driver_unregister(struct intel_rps *rps); |
| 24 | |
| 25 | void intel_rps_enable(struct intel_rps *rps); |
| 26 | void intel_rps_disable(struct intel_rps *rps); |
| 27 | |
| 28 | void intel_rps_park(struct intel_rps *rps); |
| 29 | void intel_rps_unpark(struct intel_rps *rps); |
| 30 | void intel_rps_boost(struct i915_request *rq); |
| 31 | void intel_rps_dec_waiters(struct intel_rps *rps); |
| 32 | u32 intel_rps_get_boost_frequency(struct intel_rps *rps); |
| 33 | int intel_rps_set_boost_frequency(struct intel_rps *rps, u32 freq); |
| 34 | |
| 35 | int intel_rps_set(struct intel_rps *rps, u8 val); |
| 36 | void intel_rps_mark_interactive(struct intel_rps *rps, bool interactive); |
| 37 | |
| 38 | int intel_gpu_freq(struct intel_rps *rps, int val); |
| 39 | int intel_freq_opcode(struct intel_rps *rps, int val); |
| 40 | u8 intel_rps_get_up_threshold(struct intel_rps *rps); |
| 41 | int intel_rps_set_up_threshold(struct intel_rps *rps, u8 threshold); |
| 42 | u8 intel_rps_get_down_threshold(struct intel_rps *rps); |
| 43 | int intel_rps_set_down_threshold(struct intel_rps *rps, u8 threshold); |
| 44 | u32 intel_rps_read_actual_frequency(struct intel_rps *rps); |
| 45 | u32 intel_rps_read_actual_frequency_fw(struct intel_rps *rps); |
| 46 | u32 intel_rps_get_requested_frequency(struct intel_rps *rps); |
| 47 | u32 intel_rps_get_min_frequency(struct intel_rps *rps); |
| 48 | u32 intel_rps_get_min_raw_freq(struct intel_rps *rps); |
| 49 | int intel_rps_set_min_frequency(struct intel_rps *rps, u32 val); |
| 50 | u32 intel_rps_get_max_frequency(struct intel_rps *rps); |
| 51 | u32 intel_rps_get_max_raw_freq(struct intel_rps *rps); |
| 52 | int intel_rps_set_max_frequency(struct intel_rps *rps, u32 val); |
| 53 | u32 intel_rps_get_rp0_frequency(struct intel_rps *rps); |
| 54 | u32 intel_rps_get_rp1_frequency(struct intel_rps *rps); |
| 55 | u32 intel_rps_get_rpn_frequency(struct intel_rps *rps); |
| 56 | u32 intel_rps_read_punit_req_frequency(struct intel_rps *rps); |
| 57 | u32 intel_rps_read_rpstat(struct intel_rps *rps); |
| 58 | void gen6_rps_get_freq_caps(struct intel_rps *rps, struct intel_rps_freq_caps *caps); |
| 59 | void intel_rps_raise_unslice(struct intel_rps *rps); |
| 60 | void intel_rps_lower_unslice(struct intel_rps *rps); |
| 61 | |
| 62 | u32 intel_rps_read_throttle_reason(struct intel_rps *rps); |
| 63 | bool rps_read_mask_mmio(struct intel_rps *rps, i915_reg_t reg32, u32 mask); |
| 64 | |
| 65 | void gen6_rps_frequency_dump(struct intel_rps *rps, struct drm_printer *p); |
| 66 | |
| 67 | void gen5_rps_irq_handler(struct intel_rps *rps); |
| 68 | void gen6_rps_irq_handler(struct intel_rps *rps, u32 pm_iir); |
| 69 | void gen11_rps_irq_handler(struct intel_rps *rps, u32 pm_iir); |
| 70 | |
| 71 | static inline bool intel_rps_is_enabled(const struct intel_rps *rps) |
| 72 | { |
| 73 | return test_bit(INTEL_RPS_ENABLED, &rps->flags); |
| 74 | } |
| 75 | |
| 76 | static inline void intel_rps_set_enabled(struct intel_rps *rps) |
| 77 | { |
| 78 | set_bit(nr: INTEL_RPS_ENABLED, addr: &rps->flags); |
| 79 | } |
| 80 | |
| 81 | static inline void intel_rps_clear_enabled(struct intel_rps *rps) |
| 82 | { |
| 83 | clear_bit(nr: INTEL_RPS_ENABLED, addr: &rps->flags); |
| 84 | } |
| 85 | |
| 86 | static inline bool intel_rps_is_active(const struct intel_rps *rps) |
| 87 | { |
| 88 | return test_bit(INTEL_RPS_ACTIVE, &rps->flags); |
| 89 | } |
| 90 | |
| 91 | static inline void intel_rps_set_active(struct intel_rps *rps) |
| 92 | { |
| 93 | set_bit(nr: INTEL_RPS_ACTIVE, addr: &rps->flags); |
| 94 | } |
| 95 | |
| 96 | static inline bool intel_rps_clear_active(struct intel_rps *rps) |
| 97 | { |
| 98 | return test_and_clear_bit(nr: INTEL_RPS_ACTIVE, addr: &rps->flags); |
| 99 | } |
| 100 | |
| 101 | static inline bool intel_rps_has_interrupts(const struct intel_rps *rps) |
| 102 | { |
| 103 | return test_bit(INTEL_RPS_INTERRUPTS, &rps->flags); |
| 104 | } |
| 105 | |
| 106 | static inline void intel_rps_set_interrupts(struct intel_rps *rps) |
| 107 | { |
| 108 | set_bit(nr: INTEL_RPS_INTERRUPTS, addr: &rps->flags); |
| 109 | } |
| 110 | |
| 111 | static inline void intel_rps_clear_interrupts(struct intel_rps *rps) |
| 112 | { |
| 113 | clear_bit(nr: INTEL_RPS_INTERRUPTS, addr: &rps->flags); |
| 114 | } |
| 115 | |
| 116 | static inline bool intel_rps_uses_timer(const struct intel_rps *rps) |
| 117 | { |
| 118 | return test_bit(INTEL_RPS_TIMER, &rps->flags); |
| 119 | } |
| 120 | |
| 121 | static inline void intel_rps_set_timer(struct intel_rps *rps) |
| 122 | { |
| 123 | set_bit(nr: INTEL_RPS_TIMER, addr: &rps->flags); |
| 124 | } |
| 125 | |
| 126 | static inline void intel_rps_clear_timer(struct intel_rps *rps) |
| 127 | { |
| 128 | clear_bit(nr: INTEL_RPS_TIMER, addr: &rps->flags); |
| 129 | } |
| 130 | |
| 131 | #endif /* INTEL_RPS_H */ |
| 132 | |