1/* SPDX-License-Identifier: MIT */
2/*
3 * Copyright © 2016 Intel Corporation
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22 * IN THE SOFTWARE.
23 *
24 */
25
26#ifndef __I915_VMA_TYPES_H__
27#define __I915_VMA_TYPES_H__
28
29#include <linux/rbtree.h>
30
31#include <drm/drm_mm.h>
32
33#include "gem/i915_gem_object_types.h"
34
35/**
36 * DOC: Global GTT views
37 *
38 * Background and previous state
39 *
40 * Historically objects could exists (be bound) in global GTT space only as
41 * singular instances with a view representing all of the object's backing pages
42 * in a linear fashion. This view will be called a normal view.
43 *
44 * To support multiple views of the same object, where the number of mapped
45 * pages is not equal to the backing store, or where the layout of the pages
46 * is not linear, concept of a GGTT view was added.
47 *
48 * One example of an alternative view is a stereo display driven by a single
49 * image. In this case we would have a framebuffer looking like this
50 * (2x2 pages):
51 *
52 * 12
53 * 34
54 *
55 * Above would represent a normal GGTT view as normally mapped for GPU or CPU
56 * rendering. In contrast, fed to the display engine would be an alternative
57 * view which could look something like this:
58 *
59 * 1212
60 * 3434
61 *
62 * In this example both the size and layout of pages in the alternative view is
63 * different from the normal view.
64 *
65 * Implementation and usage
66 *
67 * GGTT views are implemented using VMAs and are distinguished via enum
68 * i915_gtt_view_type and struct i915_gtt_view.
69 *
70 * A new flavour of core GEM functions which work with GGTT bound objects were
71 * added with the _ggtt_ infix, and sometimes with _view postfix to avoid
72 * renaming in large amounts of code. They take the struct i915_gtt_view
73 * parameter encapsulating all metadata required to implement a view.
74 *
75 * As a helper for callers which are only interested in the normal view,
76 * globally const i915_gtt_view_normal singleton instance exists. All old core
77 * GEM API functions, the ones not taking the view parameter, are operating on,
78 * or with the normal GGTT view.
79 *
80 * Code wanting to add or use a new GGTT view needs to:
81 *
82 * 1. Add a new enum with a suitable name.
83 * 2. Extend the metadata in the i915_gtt_view structure if required.
84 * 3. Add support to i915_get_vma_pages().
85 *
86 * New views are required to build a scatter-gather table from within the
87 * i915_get_vma_pages function. This table is stored in the vma.gtt_view and
88 * exists for the lifetime of an VMA.
89 *
90 * Core API is designed to have copy semantics which means that passed in
91 * struct i915_gtt_view does not need to be persistent (left around after
92 * calling the core API functions).
93 *
94 */
95
96struct i915_vma_resource;
97
98struct intel_remapped_plane_info {
99 /* in gtt pages */
100 u32 offset:31;
101 u32 linear:1;
102 union {
103 /* in gtt pages for !linear */
104 struct {
105 u16 width;
106 u16 height;
107 u16 src_stride;
108 u16 dst_stride;
109 };
110
111 /* in gtt pages for linear */
112 u32 size;
113 };
114} __packed;
115
116struct intel_remapped_info {
117 struct intel_remapped_plane_info plane[4];
118 /* in gtt pages */
119 u32 plane_alignment;
120} __packed;
121
122struct intel_rotation_info {
123 struct intel_remapped_plane_info plane[2];
124} __packed;
125
126struct intel_partial_info {
127 u64 offset;
128 unsigned int size;
129} __packed;
130
131enum i915_gtt_view_type {
132 I915_GTT_VIEW_NORMAL = 0,
133 I915_GTT_VIEW_ROTATED = sizeof(struct intel_rotation_info),
134 I915_GTT_VIEW_PARTIAL = sizeof(struct intel_partial_info),
135 I915_GTT_VIEW_REMAPPED = sizeof(struct intel_remapped_info),
136};
137
138static inline void assert_i915_gem_gtt_types(void)
139{
140 BUILD_BUG_ON(sizeof(struct intel_rotation_info) != 2 * sizeof(u32) + 8 * sizeof(u16));
141 BUILD_BUG_ON(sizeof(struct intel_partial_info) != sizeof(u64) + sizeof(unsigned int));
142 BUILD_BUG_ON(sizeof(struct intel_remapped_info) != 5 * sizeof(u32) + 16 * sizeof(u16));
143
144 /* Check that rotation/remapped shares offsets for simplicity */
145 BUILD_BUG_ON(offsetof(struct intel_remapped_info, plane[0]) !=
146 offsetof(struct intel_rotation_info, plane[0]));
147 BUILD_BUG_ON(offsetofend(struct intel_remapped_info, plane[1]) !=
148 offsetofend(struct intel_rotation_info, plane[1]));
149
150 /* As we encode the size of each branch inside the union into its type,
151 * we have to be careful that each branch has a unique size.
152 */
153 switch ((enum i915_gtt_view_type)0) {
154 case I915_GTT_VIEW_NORMAL:
155 case I915_GTT_VIEW_PARTIAL:
156 case I915_GTT_VIEW_ROTATED:
157 case I915_GTT_VIEW_REMAPPED:
158 /* gcc complains if these are identical cases */
159 break;
160 }
161}
162
163struct i915_gtt_view {
164 enum i915_gtt_view_type type;
165 union {
166 /* Members need to contain no holes/padding */
167 struct intel_partial_info partial;
168 struct intel_rotation_info rotated;
169 struct intel_remapped_info remapped;
170 };
171};
172
173/**
174 * DOC: Virtual Memory Address
175 *
176 * A VMA represents a GEM BO that is bound into an address space. Therefore, a
177 * VMA's presence cannot be guaranteed before binding, or after unbinding the
178 * object into/from the address space.
179 *
180 * To make things as simple as possible (ie. no refcounting), a VMA's lifetime
181 * will always be <= an objects lifetime. So object refcounting should cover us.
182 */
183struct i915_vma {
184 struct drm_mm_node node;
185
186 struct i915_address_space *vm;
187 const struct i915_vma_ops *ops;
188
189 struct drm_i915_gem_object *obj;
190
191 struct sg_table *pages;
192 void __iomem *iomap;
193 void *private; /* owned by creator */
194
195 struct i915_fence_reg *fence;
196
197 u64 size;
198 struct i915_page_sizes page_sizes;
199
200 /* mmap-offset associated with fencing for this vma */
201 struct i915_mmap_offset *mmo;
202
203 u32 guard; /* padding allocated around vma->pages within the node */
204 u32 fence_size;
205 u32 fence_alignment;
206 u32 display_alignment;
207
208 /**
209 * Count of the number of times this vma has been opened by different
210 * handles (but same file) for execbuf, i.e. the number of aliases
211 * that exist in the ctx->handle_vmas LUT for this vma.
212 */
213 atomic_t open_count;
214 atomic_t flags;
215 /**
216 * How many users have pinned this object in GTT space.
217 *
218 * This is a tightly bound, fairly small number of users, so we
219 * stuff inside the flags field so that we can both check for overflow
220 * and detect a no-op i915_vma_pin() in a single check, while also
221 * pinning the vma.
222 *
223 * The worst case display setup would have the same vma pinned for
224 * use on each plane on each crtc, while also building the next atomic
225 * state and holding a pin for the length of the cleanup queue. In the
226 * future, the flip queue may be increased from 1.
227 * Estimated worst case: 3 [qlen] * 4 [max crtcs] * 7 [max planes] = 84
228 *
229 * For GEM, the number of concurrent users for pwrite/pread is
230 * unbounded. For execbuffer, it is currently one but will in future
231 * be extended to allow multiple clients to pin vma concurrently.
232 *
233 * We also use suballocated pages, with each suballocation claiming
234 * its own pin on the shared vma. At present, this is limited to
235 * exclusive cachelines of a single page, so a maximum of 64 possible
236 * users.
237 */
238#define I915_VMA_PIN_MASK 0x3ff
239#define I915_VMA_OVERFLOW 0x200
240
241 /** Flags and address space this VMA is bound to */
242#define I915_VMA_GLOBAL_BIND_BIT 10
243#define I915_VMA_LOCAL_BIND_BIT 11
244
245#define I915_VMA_GLOBAL_BIND ((int)BIT(I915_VMA_GLOBAL_BIND_BIT))
246#define I915_VMA_LOCAL_BIND ((int)BIT(I915_VMA_LOCAL_BIND_BIT))
247
248#define I915_VMA_BIND_MASK (I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND)
249
250#define I915_VMA_ERROR_BIT 12
251#define I915_VMA_ERROR ((int)BIT(I915_VMA_ERROR_BIT))
252
253#define I915_VMA_GGTT_BIT 13
254#define I915_VMA_CAN_FENCE_BIT 14
255#define I915_VMA_USERFAULT_BIT 15
256#define I915_VMA_GGTT_WRITE_BIT 16
257
258#define I915_VMA_GGTT ((int)BIT(I915_VMA_GGTT_BIT))
259#define I915_VMA_CAN_FENCE ((int)BIT(I915_VMA_CAN_FENCE_BIT))
260#define I915_VMA_USERFAULT ((int)BIT(I915_VMA_USERFAULT_BIT))
261#define I915_VMA_GGTT_WRITE ((int)BIT(I915_VMA_GGTT_WRITE_BIT))
262
263#define I915_VMA_SCANOUT_BIT 17
264#define I915_VMA_SCANOUT ((int)BIT(I915_VMA_SCANOUT_BIT))
265
266 struct i915_active active;
267
268#define I915_VMA_PAGES_BIAS 24
269#define I915_VMA_PAGES_ACTIVE (BIT(24) | 1)
270 atomic_t pages_count; /* number of active binds to the pages */
271
272 /**
273 * Whether we hold a reference on the vm dma_resv lock to temporarily
274 * block vm freeing until the vma is destroyed.
275 * Protected by the vm mutex.
276 */
277 bool vm_ddestroy;
278
279 /**
280 * Support different GGTT views into the same object.
281 * This means there can be multiple VMA mappings per object and per VM.
282 * i915_gtt_view_type is used to distinguish between those entries.
283 * The default one of zero (I915_GTT_VIEW_NORMAL) is default and also
284 * assumed in GEM functions which take no ggtt view parameter.
285 */
286 struct i915_gtt_view gtt_view;
287
288 /** This object's place on the active/inactive lists */
289 struct list_head vm_link;
290
291 struct list_head obj_link; /* Link in the object's VMA list */
292 struct rb_node obj_node;
293 struct hlist_node obj_hash;
294
295 /** This vma's place in the eviction list */
296 struct list_head evict_link;
297
298 struct list_head closed_link;
299
300 /** The async vma resource. Protected by the vm_mutex */
301 struct i915_vma_resource *resource;
302};
303
304#endif
305

source code of linux/drivers/gpu/drm/i915/i915_vma_types.h