| 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
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| 2 | #ifndef __IPUV3_PLANE_H__ |
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| 3 | #define __IPUV3_PLANE_H__ |
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| 4 | |
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| 5 | #include <drm/drm_crtc.h> /* drm_plane */ |
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| 6 | |
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| 7 | struct drm_plane; |
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| 8 | struct drm_device; |
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| 9 | struct ipu_soc; |
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| 10 | struct drm_crtc; |
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| 11 | struct drm_framebuffer; |
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| 12 | |
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| 13 | struct ipuv3_channel; |
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| 14 | struct dmfc_channel; |
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| 15 | struct ipu_dp; |
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| 16 | |
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| 17 | struct ipu_plane { |
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| 18 | struct drm_plane base; |
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| 19 | |
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| 20 | struct ipu_soc *ipu; |
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| 21 | struct ipuv3_channel *ipu_ch; |
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| 22 | struct ipuv3_channel *alpha_ch; |
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| 23 | struct dmfc_channel *dmfc; |
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| 24 | struct ipu_dp *dp; |
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| 25 | |
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| 26 | int dma; |
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| 27 | int dp_flow; |
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| 28 | |
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| 29 | bool disabling; |
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| 30 | }; |
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| 31 | |
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| 32 | struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu, |
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| 33 | int dma, int dp, unsigned int possible_crtcs, |
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| 34 | enum drm_plane_type type); |
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| 35 | |
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| 36 | /* Init IDMAC, DMFC, DP */ |
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| 37 | int ipu_plane_mode_set(struct ipu_plane *plane, struct drm_crtc *crtc, |
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| 38 | struct drm_display_mode *mode, |
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| 39 | struct drm_framebuffer *fb, int crtc_x, int crtc_y, |
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| 40 | unsigned int crtc_w, unsigned int crtc_h, |
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| 41 | uint32_t src_x, uint32_t src_y, uint32_t src_w, |
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| 42 | uint32_t src_h, bool interlaced); |
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| 43 | |
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| 44 | int ipu_plane_irq(struct ipu_plane *plane); |
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| 45 | |
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| 46 | void ipu_plane_disable(struct ipu_plane *ipu_plane, bool disable_dp_channel); |
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| 47 | void ipu_plane_disable_deferred(struct drm_plane *plane); |
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| 48 | bool ipu_plane_atomic_update_pending(struct drm_plane *plane); |
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| 49 | |
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| 50 | #endif |
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| 51 | |
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