1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
2 | /* |
3 | * Copyright (C) 2023 Loongson Technology Corporation Limited |
4 | */ |
5 | |
6 | #ifndef __LSDC_GFXPLL_H__ |
7 | #define __LSDC_GFXPLL_H__ |
8 | |
9 | #include <drm/drm_device.h> |
10 | |
11 | struct loongson_gfxpll; |
12 | |
13 | struct loongson_gfxpll_parms { |
14 | unsigned int ref_clock; |
15 | unsigned int div_ref; |
16 | unsigned int loopc; |
17 | unsigned int div_out_dc; |
18 | unsigned int div_out_gmc; |
19 | unsigned int div_out_gpu; |
20 | }; |
21 | |
22 | struct loongson_gfxpll_funcs { |
23 | int (*init)(struct loongson_gfxpll * const this); |
24 | |
25 | int (*update)(struct loongson_gfxpll * const this, |
26 | struct loongson_gfxpll_parms const *pin); |
27 | |
28 | void (*get_rates)(struct loongson_gfxpll * const this, |
29 | unsigned int *dc, unsigned int *gmc, unsigned int *gpu); |
30 | |
31 | void (*print)(struct loongson_gfxpll * const this, |
32 | struct drm_printer *printer, bool verbose); |
33 | }; |
34 | |
35 | struct loongson_gfxpll { |
36 | struct drm_device *ddev; |
37 | void __iomem *mmio; |
38 | |
39 | /* PLL register offset */ |
40 | u32 reg_base; |
41 | /* PLL register size in bytes */ |
42 | u32 reg_size; |
43 | |
44 | const struct loongson_gfxpll_funcs *funcs; |
45 | |
46 | struct loongson_gfxpll_parms parms; |
47 | }; |
48 | |
49 | int loongson_gfxpll_create(struct drm_device *ddev, |
50 | struct loongson_gfxpll **ppout); |
51 | |
52 | #endif |
53 | |