| 1 | // SPDX-License-Identifier: GPL-2.0+ |
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| 2 | /* |
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| 3 | * Copyright (C) 2023 Loongson Technology Corporation Limited |
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| 4 | */ |
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| 5 | |
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| 6 | #include "lsdc_drv.h" |
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| 7 | #include "lsdc_probe.h" |
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| 8 | |
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| 9 | /* |
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| 10 | * Processor ID (implementation) values for bits 15:8 of the PRID register. |
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| 11 | */ |
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| 12 | #define LOONGSON_CPU_IMP_MASK 0xff00 |
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| 13 | #define LOONGSON_CPU_IMP_SHIFT 8 |
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| 14 | |
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| 15 | #define LOONGARCH_CPU_IMP_LS2K1000 0xa0 |
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| 16 | #define LOONGARCH_CPU_IMP_LS2K2000 0xb0 |
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| 17 | #define LOONGARCH_CPU_IMP_LS3A5000 0xc0 |
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| 18 | |
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| 19 | #define LOONGSON_CPU_MIPS_IMP_LS2K 0x61 /* Loongson 2K Mips series SoC */ |
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| 20 | |
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| 21 | /* |
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| 22 | * Particular Revision values for bits 7:0 of the PRID register. |
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| 23 | */ |
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| 24 | #define LOONGSON_CPU_REV_MASK 0x00ff |
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| 25 | |
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| 26 | #define LOONGARCH_CPUCFG_PRID_REG 0x0 |
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| 27 | |
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| 28 | /* |
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| 29 | * We can achieve fine-grained control with the information about the host. |
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| 30 | */ |
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| 31 | |
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| 32 | unsigned int loongson_cpu_get_prid(u8 *imp, u8 *rev) |
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| 33 | { |
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| 34 | unsigned int prid = 0; |
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| 35 | |
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| 36 | #if defined(__loongarch__) |
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| 37 | __asm__ volatile("cpucfg %0, %1\n\t" |
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| 38 | : "=&r" (prid) |
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| 39 | : "r" (LOONGARCH_CPUCFG_PRID_REG) |
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| 40 | ); |
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| 41 | #endif |
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| 42 | |
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| 43 | #if defined(__mips__) |
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| 44 | __asm__ volatile("mfc0\t%0, $15\n\t" |
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| 45 | : "=r" (prid) |
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| 46 | ); |
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| 47 | #endif |
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| 48 | |
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| 49 | if (imp) |
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| 50 | *imp = (prid & LOONGSON_CPU_IMP_MASK) >> LOONGSON_CPU_IMP_SHIFT; |
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| 51 | |
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| 52 | if (rev) |
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| 53 | *rev = prid & LOONGSON_CPU_REV_MASK; |
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| 54 | |
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| 55 | return prid; |
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| 56 | } |
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| 57 | |
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