1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
2 | /* |
3 | * Copyright (C) 2016 BayLibre, SAS |
4 | * Author: Neil Armstrong <narmstrong@baylibre.com> |
5 | */ |
6 | |
7 | /* |
8 | * Video Encoders |
9 | * - ENCI : Interlace Video Encoder |
10 | * - ENCI_DVI : Interlace Video Encoder for DVI/HDMI |
11 | * - ENCP : Progressive Video Encoder |
12 | */ |
13 | |
14 | #ifndef __MESON_VENC_H |
15 | #define __MESON_VENC_H |
16 | |
17 | struct drm_display_mode; |
18 | |
19 | enum { |
20 | MESON_VENC_MODE_NONE = 0, |
21 | MESON_VENC_MODE_CVBS_PAL, |
22 | MESON_VENC_MODE_CVBS_NTSC, |
23 | MESON_VENC_MODE_HDMI, |
24 | MESON_VENC_MODE_MIPI_DSI, |
25 | }; |
26 | |
27 | struct meson_cvbs_enci_mode { |
28 | unsigned int mode_tag; |
29 | unsigned int hso_begin; /* HSO begin position */ |
30 | unsigned int hso_end; /* HSO end position */ |
31 | unsigned int vso_even; /* VSO even line */ |
32 | unsigned int vso_odd; /* VSO odd line */ |
33 | unsigned int macv_max_amp; /* Macrovision max amplitude */ |
34 | unsigned int video_prog_mode; |
35 | unsigned int video_mode; |
36 | unsigned int sch_adjust; |
37 | unsigned int yc_delay; |
38 | unsigned int pixel_start; |
39 | unsigned int pixel_end; |
40 | unsigned int top_field_line_start; |
41 | unsigned int top_field_line_end; |
42 | unsigned int bottom_field_line_start; |
43 | unsigned int bottom_field_line_end; |
44 | unsigned int video_saturation; |
45 | unsigned int video_contrast; |
46 | unsigned int video_brightness; |
47 | unsigned int video_hue; |
48 | unsigned int analog_sync_adj; |
49 | }; |
50 | |
51 | /* LCD Encoder gamma setup */ |
52 | void meson_encl_load_gamma(struct meson_drm *priv); |
53 | |
54 | /* HDMI Clock parameters */ |
55 | enum drm_mode_status |
56 | meson_venc_hdmi_supported_mode(const struct drm_display_mode *mode); |
57 | bool meson_venc_hdmi_supported_vic(int vic); |
58 | bool meson_venc_hdmi_venc_repeat(int vic); |
59 | |
60 | /* CVBS Timings and Parameters */ |
61 | extern struct meson_cvbs_enci_mode meson_cvbs_enci_pal; |
62 | extern struct meson_cvbs_enci_mode meson_cvbs_enci_ntsc; |
63 | |
64 | void meson_venci_cvbs_mode_set(struct meson_drm *priv, |
65 | struct meson_cvbs_enci_mode *mode); |
66 | void meson_venc_hdmi_mode_set(struct meson_drm *priv, int vic, |
67 | unsigned int ycrcb_map, |
68 | bool yuv420_mode, |
69 | const struct drm_display_mode *mode); |
70 | void meson_venc_mipi_dsi_mode_set(struct meson_drm *priv, |
71 | const struct drm_display_mode *mode); |
72 | unsigned int meson_venci_get_field(struct meson_drm *priv); |
73 | |
74 | void meson_venc_enable_vsync(struct meson_drm *priv); |
75 | void meson_venc_disable_vsync(struct meson_drm *priv); |
76 | |
77 | void meson_venc_init(struct meson_drm *priv); |
78 | |
79 | #endif /* __MESON_VENC_H */ |
80 | |