| 1 | // SPDX-License-Identifier: GPL-2.0-only |
| 2 | /* |
| 3 | * Copyright (C) 2013 Red Hat |
| 4 | * Author: Rob Clark <robdclark@gmail.com> |
| 5 | */ |
| 6 | |
| 7 | #include <drm/drm_print.h> |
| 8 | #include <drm/drm_vblank.h> |
| 9 | |
| 10 | #include "msm_drv.h" |
| 11 | #include "mdp4_kms.h" |
| 12 | |
| 13 | void mdp4_set_irqmask(struct mdp_kms *mdp_kms, uint32_t irqmask, |
| 14 | uint32_t old_irqmask) |
| 15 | { |
| 16 | mdp4_write(to_mdp4_kms(mdp_kms), reg: REG_MDP4_INTR_CLEAR, |
| 17 | data: irqmask ^ (irqmask & old_irqmask)); |
| 18 | mdp4_write(to_mdp4_kms(mdp_kms), reg: REG_MDP4_INTR_ENABLE, data: irqmask); |
| 19 | } |
| 20 | |
| 21 | static void mdp4_irq_error_handler(struct mdp_irq *irq, uint32_t irqstatus) |
| 22 | { |
| 23 | struct mdp4_kms *mdp4_kms = container_of(irq, struct mdp4_kms, error_handler); |
| 24 | static DEFINE_RATELIMIT_STATE(rs, 5*HZ, 1); |
| 25 | extern bool dumpstate; |
| 26 | |
| 27 | DRM_ERROR_RATELIMITED("errors: %08x\n" , irqstatus); |
| 28 | |
| 29 | if (dumpstate && __ratelimit(&rs)) { |
| 30 | struct drm_printer p = drm_info_printer(dev: mdp4_kms->dev->dev); |
| 31 | drm_state_dump(mdp4_kms->dev, &p); |
| 32 | } |
| 33 | } |
| 34 | |
| 35 | void mdp4_irq_preinstall(struct msm_kms *kms) |
| 36 | { |
| 37 | struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms)); |
| 38 | mdp4_enable(mdp4_kms); |
| 39 | mdp4_write(mdp4_kms, reg: REG_MDP4_INTR_CLEAR, data: 0xffffffff); |
| 40 | mdp4_write(mdp4_kms, reg: REG_MDP4_INTR_ENABLE, data: 0x00000000); |
| 41 | mdp4_disable(mdp4_kms); |
| 42 | } |
| 43 | |
| 44 | int mdp4_irq_postinstall(struct msm_kms *kms) |
| 45 | { |
| 46 | struct mdp_kms *mdp_kms = to_mdp_kms(kms); |
| 47 | struct mdp4_kms *mdp4_kms = to_mdp4_kms(mdp_kms); |
| 48 | struct mdp_irq *error_handler = &mdp4_kms->error_handler; |
| 49 | |
| 50 | error_handler->irq = mdp4_irq_error_handler; |
| 51 | error_handler->irqmask = MDP4_IRQ_PRIMARY_INTF_UDERRUN | |
| 52 | MDP4_IRQ_EXTERNAL_INTF_UDERRUN; |
| 53 | |
| 54 | mdp_irq_register(mdp_kms, error_handler); |
| 55 | |
| 56 | return 0; |
| 57 | } |
| 58 | |
| 59 | void mdp4_irq_uninstall(struct msm_kms *kms) |
| 60 | { |
| 61 | struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms)); |
| 62 | mdp4_enable(mdp4_kms); |
| 63 | mdp4_write(mdp4_kms, reg: REG_MDP4_INTR_ENABLE, data: 0x00000000); |
| 64 | mdp4_disable(mdp4_kms); |
| 65 | } |
| 66 | |
| 67 | irqreturn_t mdp4_irq(struct msm_kms *kms) |
| 68 | { |
| 69 | struct mdp_kms *mdp_kms = to_mdp_kms(kms); |
| 70 | struct mdp4_kms *mdp4_kms = to_mdp4_kms(mdp_kms); |
| 71 | struct drm_device *dev = mdp4_kms->dev; |
| 72 | struct drm_crtc *crtc; |
| 73 | uint32_t status, enable; |
| 74 | |
| 75 | enable = mdp4_read(mdp4_kms, reg: REG_MDP4_INTR_ENABLE); |
| 76 | status = mdp4_read(mdp4_kms, reg: REG_MDP4_INTR_STATUS) & enable; |
| 77 | mdp4_write(mdp4_kms, reg: REG_MDP4_INTR_CLEAR, data: status); |
| 78 | |
| 79 | VERB("status=%08x" , status); |
| 80 | |
| 81 | mdp_dispatch_irqs(mdp_kms, status); |
| 82 | |
| 83 | drm_for_each_crtc(crtc, dev) |
| 84 | if (status & mdp4_crtc_vblank(crtc)) |
| 85 | drm_crtc_handle_vblank(crtc); |
| 86 | |
| 87 | return IRQ_HANDLED; |
| 88 | } |
| 89 | |
| 90 | int mdp4_enable_vblank(struct msm_kms *kms, struct drm_crtc *crtc) |
| 91 | { |
| 92 | struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms)); |
| 93 | |
| 94 | mdp4_enable(mdp4_kms); |
| 95 | mdp_update_vblank_mask(to_mdp_kms(kms), |
| 96 | mdp4_crtc_vblank(crtc), true); |
| 97 | mdp4_disable(mdp4_kms); |
| 98 | |
| 99 | return 0; |
| 100 | } |
| 101 | |
| 102 | void mdp4_disable_vblank(struct msm_kms *kms, struct drm_crtc *crtc) |
| 103 | { |
| 104 | struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms)); |
| 105 | |
| 106 | mdp4_enable(mdp4_kms); |
| 107 | mdp_update_vblank_mask(to_mdp_kms(kms), |
| 108 | mdp4_crtc_vblank(crtc), false); |
| 109 | mdp4_disable(mdp4_kms); |
| 110 | } |
| 111 | |